pfc-r8a7778 will have many devices pfc support in the future,
and current pfc-r8a7778 is using pin/mux definition macro for SCIF.
The device definition style using macro is readable code IMO,
but creating new macro for each devices is not good sense.
This patch adds common SH_PFC_xx() macro for each new feature devices
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Refactor the GPIO macro magic to use GPIO numbers directly instead of
the GPIO_GP_x_y enum entries. This will allow removing the GPIO enum
entries from the mach/r8a7790.h header.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Pins are numbered in the R-Car family documentation using a bank number
and a pin number in the bank. As the Linux pin number space is linear,
we need to flatten this by multiplying the bank number by 32 and adding
the pin number. The resulting number bear no directly visible
relationship to the documentation, making it error-prone.
Add a RCAR_GP_PIN macro to convert from the documentation pin number
space to the linear Linux space.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Koji Matsuoka [Mon, 8 Apr 2013 02:08:53 +0000 (11:08 +0900)]
sh-pfc: Initial r8a7790 PFC support
Add initial PFC support for the r8a7790 SoC.
At this point only GPIO interface is supported, move to
newer interfaces planned as incremental changes.
Original authors is Koji Matsuoka-san, thanks for him
and his team for the heavy lifting. Adjusted by Magnus
to work together with updated code in drivers/pinctrl.
Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@rms.renesas.com> Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
ARM: sh-mobile: r8a7790: Make private clock arrays static
Both clock-r8a7740.c and clock-r8a7790.c define a div4_clks array as
non-static. Compiling support for both SoCs thus result in a symbol
redefinition. Fix it by defining the arrays as static.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Almost all clock needs main clock which is basis clock on r8a7790.
This patch adds it, and, set its parent/ratio via MD pin.
It is based on v0.05 datasheet
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
R-Car M1 has many clocks, and it is possible to
read/use clock ratio of these clocks from FRQMRx.
But, these ratio are fixed value and
these are decided by MD pin status.
This patch reads MD pin status,
and used fixed ratio clock for other clocks.
It was tesed on bock-w board.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Sergei Shtylyov [Tue, 9 Apr 2013 17:47:51 +0000 (21:47 +0400)]
ARM: shmobile: R8A7778: fix Ether device name
While recasting the commit "ARM: shmobile: R8A7778: add Ether support", I made a
typo in the platform device's name: used underscore instead of hyphen.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
R-Car series gpio_rcar driver can control GPIO IRQ today.
It needs base IRQ number for gpio_rcar_config :: .irq_base
This patch adds macro for GPIO IRQ.
This patch was tested on Bock-W board
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Mon, 8 Apr 2013 02:08:44 +0000 (11:08 +0900)]
ARM: shmobile: Add second I/O range for r8a7790 PFC
Add the GPIO I/O memory range to the r8a7790 PFC device.
This extra I/O memory range is needed when using the PFC
tables to drive both pin functions (using PINCTRL or
function GPIO for old code) and actual GPIO. The goal is
however to use a separate GPIO driver in the long run
and when that happens this extra I/O memory range can
be removed.
Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch adds r8a7778_init_irq_extpin() for IRQ0 - IRQ3.
But this patch doesn't enable DT settings on r8a7778.dts,
because R8A7778 chip external IRQ depends on
IRQ0 - IRQ3 pin encoding which came from platform board
implementation.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
ARM: shmobile: mackerel: clean up MMCIF vs. SDHI1 selection
MMCIF and SDHI1 share the same slot on mackerel. One of them is selected
by a jumper, which cannot be queried from software. Currently in software
one of the two interfaces is selected, depending whether or not the MMCIF
driver is enabled. This is not optimal, since the kernel has to be rebuilt
to switch from one interface to another. Still, so far there isn't a
better option. At least make this selection consistent.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Fri, 29 Mar 2013 08:00:21 +0000 (17:00 +0900)]
ARM: shmobile: APE6EVM LAN9220 support
Add LAN9220 support to the APE6EVM board using C and DT.
At this point the PFC driver lacks DT bindings so to
configure the PFC we use PINCTRL in C board code.
Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Simon Horman [Wed, 3 Apr 2013 01:49:18 +0000 (10:49 +0900)]
Merge tag 'renesas-pinmux2-for-v3.10' into boards-base
Second round of Renesas ARM and SH based SoC pinmux updates for v3.10
Highlights:
* Compilation fixes for sh7269 and for when CONFIG_BUG is not set
* sh-pfc Support for r8a73a4 SoC
* Move GPIOs handling from the PFC device to separate GPIO devices on the r8a7779 SoC
This pull request is based on a merge of:
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-pinmux-for-v3.10
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-soc2-for-v3.10
This merge is made to supply run-time dependencies for the following
patches that will bea added on top:
ARM: shmobile: APE6EVM LAN9220 support
ARM: shmobile: APE6EVM PFC support
Magnus Damm [Tue, 26 Mar 2013 13:50:09 +0000 (22:50 +0900)]
sh-pfc: r8a73a4: GPIO IRQ support
V2 of code to add GPIO -> IRQ mappings to the
PFC table for the r8a73a4 SoC. Requires the IRQs
to be mapped at a fixed location in Linux IRQ
space. The actual IRQs are not handled by the
PFC, instead IRQC is used on r8a73a4.
Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Tue, 26 Mar 2013 13:49:59 +0000 (22:49 +0900)]
sh-pfc: r8a73a4: Support sparse GPIO numbers
The r8a73a4 SoC has sparse GPIO numbers. Declare ranges for pin numbers
in the PFC SoC data. Pin numbers shall be used with the GPIO API from
this point on.
Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Tue, 26 Mar 2013 13:49:49 +0000 (22:49 +0900)]
sh-pfc: Add r8a73a4 pinmux support
Add initial PFC support for the r8a73a4 SoC.
At this point only GPIO interface is supported, move to newer interfaces
planned as incremental changes.
Original authors are Morimoto-san with help from Yoshii-san, thanks to
them for the heavy lifting. Adjusted by Magnus to work together with
updated code in drivers/pinctrl.
Laurent Pinchart [Sun, 10 Mar 2013 16:30:25 +0000 (17:30 +0100)]
sh-pfc: Configure pins as GPIOs at request time when handled externally
When a GPIO is handled by a separate driver the pinmux
gpio_set_direction() handler won't be called. The pin mux type then need
to be configured to GPIO at request time.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Laurent Pinchart [Sun, 10 Mar 2013 02:19:44 +0000 (03:19 +0100)]
sh-pfc: Skip gpiochip registration when no GPIO resource is found
Boards/platforms that register dedicated GPIO devices will not supply a
memory resource for GPIOs. Try to locate the GPIO memory resource at
initialization time, and skip registration of the gpiochip if the
resource can't be found.
This is a temporary modification to ease the transition to separate GPIO
drivers. It should be reverted when all boards and platforms will have
been moved.
Laurent Pinchart [Sun, 10 Mar 2013 02:19:44 +0000 (03:19 +0100)]
sh-pfc: Make GPIO support optional
When implemented as a separate IP block, GPIOs should be handled by a
separate driver. To make this possible GPIO support needs to be optional
in the sh-pfc driver.
If no GPIO data registers are supplied in the SoC information structure
skip registration of the gpiochip.
The target is to get rid of function GPIOs completely. To reach this,
make function GPIOs support optional by skipping the function GPIO chip
registration if no function GPIOS are defined in SoC data.