]> git.karo-electronics.de Git - karo-tx-linux.git/log
karo-tx-linux.git
11 years agoENGR00213014-1 MX6x Sabrelite: IOMUX setting for HDMI HDCP
Sandor Yu [Tue, 26 Jun 2012 09:28:33 +0000 (17:28 +0800)]
ENGR00213014-1 MX6x Sabrelite: IOMUX setting for HDMI HDCP

Added enable_pins/disable_pins functions for Mx6q sabrelite HDMI.
Added HDMI DDC IOMUX setting.

Signed-off-by: Sandor Yu <R01008@freescale.com>
11 years agoENGR00215182-2 MXC HDMI CEC: Add basic support for HDMI CEC
Zhang Xiaodong [Mon, 2 Jul 2012 07:02:41 +0000 (15:02 +0800)]
ENGR00215182-2 MXC HDMI CEC: Add basic support for HDMI CEC

- Add MXC HDMI CEC to kconfig and makefile under driver/mxc
- Add initial mxc_hdmi-cec.c file to provide basic HDMI CEC
functionality:
    - Basic HDMI CEC resource initilize functional
    - Support for sending and receiving CEC message via CEC line
    - Report HDMI cable status to CEC lib at userspace.
Signed-off-by: Zhang Xiaodong <B39117@freescale.com>
11 years agoENGR00215182-1 sabresd: Add basic support for HDMI CEC
Zhang Xiaodong [Mon, 2 Jul 2012 06:48:35 +0000 (14:48 +0800)]
ENGR00215182-1 sabresd: Add basic support for HDMI CEC

- Changes to IOMUX to allow HDMI CEC controller to use KEY_ROW2
  pin that it needs
- Add cec device in platform-mxc_hdmi.c
- Add MXC_HDMI_CEC in imx6_defconfig

Signed-off-by: Zhang Xiaodong <B39117@freescale.com>
11 years agoENGR00215492-4: Enable caam ahash feature in config.
Terry Lv [Mon, 2 Jul 2012 04:57:30 +0000 (12:57 +0800)]
ENGR00215492-4: Enable caam ahash feature in config.

Enable caam ahash feature in config.
Add caam init to other 6q platforms.

Signed-off-by: Terry Lv <r65388@freescale.com>
11 years agoENGR00215492-3: Detect HW features during alg registration
Steve Cornelius [Sat, 30 Jun 2012 23:11:00 +0000 (16:11 -0700)]
ENGR00215492-3: Detect HW features during alg registration

i.MX6 instantiates a CAAM with a low-power MDHA block, which does not
compute digests larger than 256 bits. Since the driver installs handlers
for hashes longer than 256 bits in several places, added the ability to
read and interpret the CHA version and instantiations registers, and then
only register handlers that it can support.

Signed-off-by: Steve Cornelius <steve.cornelius@freescale.com>
Signed-off-by: Terry Lv <r65388@freescale.com>
11 years agoENGR00215492-2: Add SGT error to formerly reserved entry
Steve Cornelius [Sat, 30 Jun 2012 23:08:09 +0000 (16:08 -0700)]
ENGR00215492-2: Add SGT error to formerly reserved entry

Add SGT error to formerly reserved entry.

Signed-off-by: Steve Cornelius <steve.cornelius@freescale.com>
Signed-off-by: Terry Lv <r65388@freescale.com>
11 years agoENGR00215492-1: Fix DMA size in extended descriptor for ahash_digest()
Steve Cornelius [Fri, 29 Jun 2012 22:53:46 +0000 (15:53 -0700)]
ENGR00215492-1: Fix DMA size in extended descriptor for ahash_digest()

Save of DMA size in extended descriptor was missing, thus crashes could
occur during post-request unmapping.

Also, removed lingering DEBUG def that shouldn't have been there.

Signed-off-by: Steve Cornelius <steve.cornelius@freescale.com>
Signed-off-by: Terry Lv <r65388@freescale.com>
11 years agoENGR00215516 MX6x HDMI, keep HDMI HPD clock on when display blank
Sandor Yu [Mon, 2 Jul 2012 08:20:31 +0000 (16:20 +0800)]
ENGR00215516 MX6x HDMI, keep HDMI HPD clock on when display blank

HDMI Hotplug function should work when display blank,
So keep HDMI HPD clock on.

Signed-off-by: Sandor Yu <R01008@freescale.com>
11 years agoENGR00215354 MX6 USB Host:fix kernel dump when no platform_data
make shi [Fri, 29 Jun 2012 08:56:02 +0000 (16:56 +0800)]
ENGR00215354 MX6 USB Host:fix kernel dump when no platform_data

Kernel dump when no platform_data.
PC is at hub_thread+0xdb0/0x1538
LR is at 0xbfd43400
pc : [<80311eb4>]    lr : [<bfd43400>]    psr: 60000013
sp : bfdbff08  ip : ba3cd500  fp : ba3cd600
r10: bfd43400  r9 : 00000000  r8 : 00000001
r7 : 00000000  r6 : 00000000  r5 : ba3cd600  r4 : 00000001
r3 : 00000000  r2 : bfd24c60  r1 : bfd43400  r0 : 00000000
Flags: nZCv  IRQs on  FIQs on  Mode SVC_32  ISA ARM  Segment kernel
Control: 10c53c7d  Table: 1000404a  DAC: 00000015
Process khubd (pid: 338, stack limit = 0xbfdbe2f0)
Stack: (0xbfdbff08 to 0xbfdc0000)
ff00:                   00000101 00000000 80a01d38 8c008f40 bfdbff3c 8006612c
ff20: bff8c000 bfd43400 bfd43400 ba3cd648 ba62a220 ba3cd608 bfd4349c ba62a200
ff40: 00000000 ba3cd644 ba3cd640 00000101 00000001 0000009e ba3cd500 ba62a220
ff60: 00000009 ba3cd64c bfdbff9c 800654ac ba3cd6a4 bfdbe000 00000000 bfeac3a0
ff80: 8008d700 bfdbff84 bfdbff84 00000000 01010000 00000001 bfdbffbc bff8bf48
ffa0: bfdbffcc 00000000 80311104 00000000 00000000 00000000 00000000 8008d330
ffc0: bff8bf48 00000000 00000000 00000000 00000000 00000000 bfdbffd8 bfdbffd8
ffe0: 00000000 bff8bf48 8008d2ac 80042040 00000013 80042040 00000000 00000000
[<80311eb4>] (hub_thread+0xdb0/0x1538) from [<8008d330>] (kthread+0x84/0x8c)
[<8008d330>] (kthread+0x84/0x8c) from [<80042040>] (kernel_thread_exit+0x0/0x8)

If no platform_data ,the pdata will be NULL.If the driver try to access the
pdata->platform_set_disconnect_det,dump will occor.SO we should check the
pdata is NULL before checking  pdata->platform_set_disconnect_det.

Signed-off-by: make shi <b15407@freescale.com>
11 years agoENGR00215491 [MX6]Need to increase BUS freq when CPU freq is increased
Anson Huang [Mon, 2 Jul 2012 11:23:23 +0000 (19:23 +0800)]
ENGR00215491 [MX6]Need to increase BUS freq when CPU freq is increased

When BUS freq is running at DLL off mode(24M or 50M), when CPU
freq is increased, we need to increase BUS freq to 400M setpoint
in order to achieve high performance when CPU is busy.

Signed-off-by: Anson Huang <b20788@freescale.com>
11 years agoENGR00215489-2 WDOG :add watchdog irq in device structure
Robin Gong [Mon, 2 Jul 2012 02:48:50 +0000 (10:48 +0800)]
ENGR00215489-2 WDOG :add watchdog irq in device structure

1.add watchdog irq in device structure
2.modify watchdog irq macro define to meet _SOC_
Signed-off-by: Robin Gong <B38343@freescale.com>
11 years agoENGR00215489-1 WDOG:add WDIOC_SETPRETIMEOUT and WDIOC_GETPRETIMEOUT interface
Robin Gong [Mon, 2 Jul 2012 02:41:57 +0000 (10:41 +0800)]
ENGR00215489-1 WDOG:add WDIOC_SETPRETIMEOUT and WDIOC_GETPRETIMEOUT interface

Add these two interface, so than user can set and get pre-timeout value to save
some important data before watchdog reboot.
Signed-off-by: Robin Gong <B38343@freescale.com>
11 years agoENGR00215344 GPU became slow after long time run some applications
Richard Liu [Mon, 2 Jul 2012 01:34:31 +0000 (09:34 +0800)]
ENGR00215344 GPU became slow after long time run some applications

GPU became slow after long time run some applications
root cause is when GPU reserved memory exhaust, GPU will request continue physical
memory which will trigger defregment operation in kernel and cause system slow

Signed-off-by: Richard Liu <r66033@freescale.com>
Acked-by: Lily Zhang
11 years agoENGR00215340 HDMI PHY config adjust to pass electrical compliance test
Sandor Yu [Fri, 29 Jun 2012 10:18:55 +0000 (18:18 +0800)]
ENGR00215340 HDMI PHY config adjust to pass electrical compliance test

In the HDMI PHY internal, there are two register that can adjust
waveform of eyediagram.
0x0e -- voltage level control; it can adjust the single end data signals;
0x09 -- define pre-emphasis factor;
(it will affect the rise time and fall time of D0/D1/D2);

Adjust HDMI PHY register 0x09 and 0xe for MX6DL SabreSD and MX6Q SabreSD
waveform of eyediagram to pass HDMI compliance test electrical test case.

Signed-off-by: Sandor Yu <R01008@freescale.com>
11 years agoENGR00215041-3 MX6 SabreSD:Correct camera and audio mclk freq
Liu Ying [Wed, 27 Jun 2012 08:12:22 +0000 (16:12 +0800)]
ENGR00215041-3 MX6 SabreSD:Correct camera and audio mclk freq

This patch corrects camera mclk and audio mclk frequency
to be 24MHz to align with 24MHz osc clock.

Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
(cherry picked from commit 00ea48ba38940c3a908f9a5d2e72ae285a221329)

11 years agoENGR00215041-2 MX6 SabreSD:Set clko parent to be clko2
Liu Ying [Wed, 27 Jun 2012 08:08:49 +0000 (16:08 +0800)]
ENGR00215041-2 MX6 SabreSD:Set clko parent to be clko2

On MX6 SabreSD board, gpio_0 is muxed to clko to be
audio mclk and camera mclk. 24MHz osc clk is a stable
clock source, which can meet the requirement of audio
mclk and camera mclk. This patch sets clko parent
clock to be clko2 clock so that camera mclk and audio
mclk can source from osc clk.
There are 2 benifits after applying this patch:
1) clko's original parent clock(pll4_audio_main_clk)
can be gated off to save power or used by another
module.
2) ov5640/ov5642 camera most settings can reach
claimed 15fps or 30fps with no human eye recognizable
video quality downgrade.

Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
(cherry picked from commit ace3723ceff0d546e0176f74ad38d58a6d11b7ee)

11 years agoENGR00215041-1 MX6 clock:Support clko2 to be clko's parent clk
Liu Ying [Wed, 27 Jun 2012 08:08:23 +0000 (16:08 +0800)]
ENGR00215041-1 MX6 clock:Support clko2 to be clko's parent clk

This patch supports clko2 clock to be clko's parent clock.

Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
(cherry picked from commit 3827c82e439b6a8bbb6569a01327043251875964)

11 years agoENGR00215195 MX6 PM:Add necessary info for waitmode to help debug system issue
Lin Fuzhen [Thu, 28 Jun 2012 06:54:36 +0000 (14:54 +0800)]
ENGR00215195 MX6 PM:Add necessary info for waitmode to help debug system issue

Add debug message for wait mode to check it was enabled or not.
it will easy to get the wait mode status from this info
e.g, if wait mode is enabled, there are below info from console:

wait mode is enabled for i.MX6

Signed-off-by: Lin Fuzhen <fuzhen.lin@freescale.com>
11 years agoENGR00176555 ESAI: Increase DMA buffer size to reslove occasional aplay underrun
Lionel Xu [Fri, 29 Jun 2012 04:50:32 +0000 (12:50 +0800)]
ENGR00176555 ESAI: Increase DMA buffer size to reslove occasional aplay underrun

The underrun warning appears when playback high bit-rate and multi-channel(
greater than 6) wav, increase DMA buffer size can resolve this issue.

Signed-off-by: Lionel Xu <Lionel.Xu@freescale.com>
11 years agoENGR00215228-17: Disable ahash in configs
Terry Lv [Fri, 29 Jun 2012 07:23:24 +0000 (15:23 +0800)]
ENGR00215228-17: Disable ahash in configs

The ahash() still has a dma mapping bug.
So if we turn on hashes, it will crash.
Thus currently we need to disable ahash feature.

Signed-off-by: Terry Lv <r65388@freescale.com>
11 years agoENGR00215228-16: Add API module for asynchronous hashing
Steve Cornelius [Thu, 28 Jun 2012 23:19:46 +0000 (16:19 -0700)]
ENGR00215228-16: Add API module for asynchronous hashing

Add API module for asynchronous hashing

Signed-off-by: Steve Cornelius <steve.cornelius@freescale.com>
Signed-off-by: Terry Lv <r65388@freescale.com>
11 years agoENGR00215228-15: Add API module for /dev/hw_random
Steve Cornelius [Thu, 28 Jun 2012 22:42:23 +0000 (15:42 -0700)]
ENGR00215228-15: Add API module for /dev/hw_random

Add API module for /dev/hw_random

Signed-off-by: Steve Cornelius <steve.cornelius@freescale.com>
Signed-off-by: Terry Lv <r65388@freescale.com>
11 years agoENGR00215228-14: Add in RNG4 kickstart function
Steve Cornelius [Thu, 28 Jun 2012 22:40:43 +0000 (15:40 -0700)]
ENGR00215228-14: Add in RNG4 kickstart function

Add in RNG4 kickstart function

Signed-off-by: Steve Cornelius <steve.cornelius@freescale.com>
11 years agoENGR00215228-13: Add cache coherence to externalized key generation
Steve Cornelius [Thu, 28 Jun 2012 22:39:18 +0000 (15:39 -0700)]
ENGR00215228-13: Add cache coherence to externalized key generation

Add cache coherence to externalized key generation

Signed-off-by: Steve Cornelius <steve.cornelius@freescale.com>
11 years agoENGR00215228-12: Move scatter/gather cache coherence into chained function.
Steve Cornelius [Thu, 28 Jun 2012 22:27:16 +0000 (15:27 -0700)]
ENGR00215228-12: Move scatter/gather cache coherence into chained function.

Last driver revisions began to incorporate optimized mapping functions
for scatter/gather list management, and then centralized them as inlinable
functions usable from multiple modules. Since these became more globally
useful, moved the coupled cache-coherence functions out of the mainline code
and into the inlined ones for simplification.

Signed-off-by: Steve Cornelius <steve.cornelius@freescale.com>
11 years agoENGR00215228-11: Enable ahash and rng configurations
Steve Cornelius [Tue, 26 Jun 2012 01:19:09 +0000 (18:19 -0700)]
ENGR00215228-11: Enable ahash and rng configurations

Add in ahash and rng options for build. Note that because of the way
platform devices detect (as opposed to of-based detection), modularization
of API interfaces is suppressed. Once CONFIG_OF is possible, this
can go away.

Signed-off-by: Steve Cornelius <steve.cornelius@freescale.com>
11 years agoENGR00215228-10: Descriptor optimizations, misc whitespace fixes.
Steve Cornelius [Tue, 26 Jun 2012 00:58:49 +0000 (17:58 -0700)]
ENGR00215228-10: Descriptor optimizations, misc whitespace fixes.

Descriptor optimizations, misc whitespace fixes.

Signed-off-by: Steve Cornelius <steve.cornelius@freescale.com>
Signed-off-by: Terry Lv <r65388@freescale.com>
11 years agoENGR00215228-9: Add hash and RNG initializers for non-OF builds
Steve Cornelius [Tue, 26 Jun 2012 00:51:58 +0000 (17:51 -0700)]
ENGR00215228-9: Add hash and RNG initializers for non-OF builds

Inserted explicit initializers for split-out startup and shutdown functions
needed for kernels using platform devices in place of OF-device-tree
initialization and detection.

Also added necessary ahash algorithm list head to driver private storage
block.

Signed-off-by: Steve Cornelius <steve.cornelius@freescale.com>
11 years agoENGR00215228-8: Add pointer length extensions, non-error-propgation definition.
Steve Cornelius [Sun, 24 Jun 2012 23:18:14 +0000 (16:18 -0700)]
ENGR00215228-8: Add pointer length extensions, non-error-propgation definition.

Add pointer length extensions, non-error-propgation definition.

Signed-off-by: Steve Cornelius <steve.cornelius@freescale.com>
11 years agoENGR00215228-7: Externalize SG lists plus split-key generation
Steve Cornelius [Fri, 22 Jun 2012 23:39:43 +0000 (16:39 -0700)]
ENGR00215228-7: Externalize SG lists plus split-key generation

Split out inline scatter-gather list handlers into an external header,
and moved key generation into standalone source.

Signed-off-by: Steve Cornelius <steve.cornelius@freescale.com>
Signed-off-by: Terry Lv <r65388@freescale.com>
11 years agoENGR00215228-6: Externalize scatter-gather handling for multiple API modules.
Steve Cornelius [Fri, 22 Jun 2012 23:32:08 +0000 (16:32 -0700)]
ENGR00215228-6: Externalize scatter-gather handling for multiple API modules.

Moved scatter-gather list management outside of single API module
in anticipation of multiple API modules which may be switch selectable.
This includes a number of list management optimizations, as well as
some aead descriptor optimizations.

Signed-off-by: Steve Cornelius <steve.cornelius@freescale.com>
11 years agoENGR00215228-5: Add <md5.h> inclusion for expanded aead processing.
Steve Cornelius [Fri, 22 Jun 2012 23:27:01 +0000 (16:27 -0700)]
ENGR00215228-5: Add <md5.h> inclusion for expanded aead processing.

Add <md5.h> inclusion for expanded aead processing.

Signed-off-by: Steve Cornelius <steve.cornelius@freescale.com>
11 years agoENGR00215228-4: Synchronize scatter/gather table definitions with QorIQ defs
Steve Cornelius [Fri, 22 Jun 2012 23:13:53 +0000 (16:13 -0700)]
ENGR00215228-4: Synchronize scatter/gather table definitions with QorIQ defs

Update scatter/gather definitions to more closely correspond with
those in the QorIQ 1.2 release tree. Note that the definition of
the CAAM-local scatter-gather table for QorIQ/Power-based devices
assumed big-endian, and therefore does not burst-read properly into
an ARM-based little-endian instantiation. Therefore, applied
close-as-practical definitions to at least get close until a merge
can be accomplished.

Signed-off-by: Steve Cornelius <steve.cornelius@freescale.com>
11 years agoENGR00215228-3: Merge in RNGB changes
Steve Cornelius [Mon, 18 Jun 2012 22:49:28 +0000 (15:49 -0700)]
ENGR00215228-3: Merge in RNGB changes

Added in register changes to enable RNGB initialization when it is present.

Signed-off-by: Steve Cornelius <steve.cornelius@freescale.com>
11 years agoENGR00215228-2: Add era4 amendments and whitespace fixes
Steve Cornelius [Mon, 18 Jun 2012 22:46:58 +0000 (15:46 -0700)]
ENGR00215228-2: Add era4 amendments and whitespace fixes

Added in era4 additions, and merged in whitespace fixes so as to be
closed to QorIQ 1.2 staged-for-release code base.

Signed-off-by: Steve Cornelius <steve.cornelius@freescale.com>
11 years agoENGR00215228-1: Remove unused DECO base pointer
Steve Cornelius [Mon, 18 Jun 2012 22:43:11 +0000 (15:43 -0700)]
ENGR00215228-1: Remove unused DECO base pointer

Remove unused DECO base pointer to be consistent with staged-for-1.2
QorIQ release.

Signed-off-by: Steve Cornelius <steve.cornelius@freescale.com>
11 years agoENGR00215188-4 PFUZE : remove related old code in pfuze driver
Robin Gong [Thu, 28 Jun 2012 06:35:37 +0000 (14:35 +0800)]
ENGR00215188-4 PFUZE : remove related old code in pfuze driver

1.remove related old code in pfuze driver
2.add i2c write retry as i2c read retry.
Signed-off-by: Robin Gong <B38343@freescale.com>
11 years agoENGR00215188-3 mx6sl:enable LDO bypass function on mx6sl_arm2
Robin Gong [Thu, 28 Jun 2012 06:33:17 +0000 (14:33 +0800)]
ENGR00215188-3 mx6sl:enable LDO bypass function on mx6sl_arm2

enable LDO bypass function on mx6sl_arm2 board as mx6q_sabresd board
Signed-off-by: Robin Gong <B38343@freescale.com>
11 years agoENGR00215188-2 LDO bypass: disable LDO bypass before suspend and back in resume
Robin Gong [Thu, 28 Jun 2012 06:24:40 +0000 (14:24 +0800)]
ENGR00215188-2 LDO bypass: disable LDO bypass before suspend and back in resume

There is one SOC bug if use LDO bypass, VDDARM_CAP will take 2ms to raise up
normal voltage when system resume back, longer than 40us before. Then it will
cause cpu hang if resume back.

Workaround:
We can disable LDO bypass at the last minute of suspend and enable LDO bypass
again as long as system resume back.
Signed-off-by: Robin Gong <B38343@freescale.com>
11 years agoENGR00215188-1 PFUZE CPUFREQ: reconstruct LDO bypass function
Robin Gong [Thu, 28 Jun 2012 06:14:46 +0000 (14:14 +0800)]
ENGR00215188-1 PFUZE CPUFREQ: reconstruct LDO bypass function

As before, raw I2C operation is added in suspend interface of cpufeq driver,so
that we can raise up cpu frequency and voltage after I2C driver suspended.But
the code is not platform independent if customer use another pmic whose I2C
slave address is different with pfuze.
Now, we rasie up cpu frequency and disable cpu frequency change in more earlier
than before. If system begin to suspend flow, we will do this.
Signed-off-by: Robin Gong <B38343@freescale.com>
11 years agoENGR00214799 MX6 PCIe enable the GEN2 mode
Richard Zhu [Fri, 18 May 2012 02:25:49 +0000 (10:25 +0800)]
ENGR00214799 MX6 PCIe enable the GEN2 mode

* enable PCIe on ARD boards
* Configure the DEEM parameters to pass PCIe GEN2 stress tests

Signed-off-by: Richard Zhu <Hong-Xing.Zhu@freescale.com>
11 years agoENGR00213293 : Enable WEIM NOR support on the imx6 ARD revb quad/solo.
Francisco Munoz [Tue, 12 Jun 2012 19:59:31 +0000 (14:59 -0500)]
ENGR00213293 : Enable WEIM NOR support on the imx6 ARD revb quad/solo.

Added IOMUX,GPIO and early param support for the parallel nor to work
on the imx6 revB quad/solo. Since the parallel NOR can clash with I2C3,
and SPI, an early param was added to enable WEIM NOR chips using boot
args.

The Weim NOR needs a HW rework for it to work. This rework is going
to disable the SPI NOR. Modified files:

arch/arm/mach-mx6/board-mx6q_sabreauto.c
arch/arm/mach-mx6/board-mx6q_sabreauto.h
arch/arm/mach-mx6/board-mx6solo_sabreauto.h

Signed-off-by: Francisco Munoz <francisco.munoz@freescale.com>
11 years agoENGR00214810 [MX6]Fix bus freq 50M->528M change issue
Anson Huang [Mon, 25 Jun 2012 18:18:47 +0000 (02:18 +0800)]
ENGR00214810 [MX6]Fix bus freq 50M->528M change issue

50M -> 528M bus freq change will cause system hang, root
cause is that we didn't set 50M as DLL off mode, it should
be DLL off mode.

And make sure bus, axi, ahb, ipg and ipg_perclk are at right
freq during all setpoints.

Can't disable PU LDO again if it is not enabled.

Signed-off-by: Anson Huang <b20788@freescale.com>
11 years agoENGR00214813 MX6DL SabreSD : Kernel, Enable ARM Perfromance Monitor
Eric Sun [Mon, 25 Jun 2012 11:03:46 +0000 (19:03 +0800)]
ENGR00214813 MX6DL SabreSD : Kernel, Enable ARM Perfromance Monitor

Register PMU resources during system bootup, so that "Perf" Command can
be used to get misc performance data of a running program

The "Perf" Exe should be built manually in
"./tools/perf" using the following command line
> make CROSS_COMPILER=... ARCH=arm CFLAGS="-static -DGElf_Nhdr=Elf32_Nhdr"
then copy the "Perf" executable to rootfs/bin

Usage :
perf            # show help content
perf list       # show all available statistics options
perf stat ls    # show all statistics of a "ls" command
perf stat -e cycles tar cvfz bin.tgz /bin
                # show "cycles" statistics of command
                #     "tar cvfz ...."

MX6 Series Chips bound all CPUs PERFMON IRQ to one, this may cause some
problems when get per-CPU statistics. Need further investigation

Signed-off-by: Eric Sun <jian.sun@freescale.com>
11 years agoENGR00214865 mxc_v4l2_capture:Be silent when closing device
Liu Ying [Tue, 26 Jun 2012 04:45:05 +0000 (12:45 +0800)]
ENGR00214865 mxc_v4l2_capture:Be silent when closing device

This patch changes the debug level of a kernel message in
mxc_v4l2_close() from KERN_INFO to KERN_DEBUG to make the
console silent when closing device.

Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
(cherry picked from commit 42bd808baa7c03671665297cd40ae9cce8186d6b)

11 years agoENGR00214791-2 [MX6] GalCore gets baseAddress parameter for kernel
Larry Li [Mon, 25 Jun 2012 08:09:23 +0000 (16:09 +0800)]
ENGR00214791-2 [MX6] GalCore gets baseAddress parameter for kernel

Galcore reads baseAddress parameter from GPU resource set by kernel

Signed-off-by: Larry Li <b20787@freescale.com>
Acked-by: Lily Zhang
11 years agoENGR00214791-1 [MX6] Add baseAddress parameter for GPU resource
Larry Li [Mon, 25 Jun 2012 08:04:08 +0000 (16:04 +0800)]
ENGR00214791-1 [MX6] Add baseAddress parameter for GPU resource

Add baseAddress parameter for GPU resource according to different
SOC

Signed-off-by: Larry Li <b20787@freescale.com>
11 years agoENGR00181659 IPU: Fix 1080i playback on LVDS error
Wayne Zou [Tue, 26 Jun 2012 09:17:32 +0000 (17:17 +0800)]
ENGR00181659 IPU: Fix 1080i playback on LVDS error

For 1080i video, it needs to use vertical split mode because of VDIC
max input width limitation.

Signed-off-by: Wayne Zou <b36644@freescale.com>
11 years agoENGR00214773 V4L2 output: Restore fb base address after video playback
Wayne Zou [Mon, 25 Jun 2012 04:31:14 +0000 (12:31 +0800)]
ENGR00214773 V4L2 output: Restore fb base address after video playback

Restore framebuffer base address after video playback on IPU BG channel

Signed-off-by: Wayne Zou <b36644@freescale.com>
11 years agoENGR00214765 [MX6]Fix resume fail when there is pending wakeup irq
Anson Huang [Mon, 25 Jun 2012 02:32:56 +0000 (10:32 +0800)]
ENGR00214765 [MX6]Fix resume fail when there is pending wakeup irq

r2 is broken by L2 clean function which is used in the flow of
pending wakeup irq there before suspend, need to avoid using
important register.

Signed-off-by: Anson Huang <b20788@freescale.com>
11 years agoENGR00210654 - MSL : fix NFS boot fails issue in sometime
Fugang Duan [Thu, 21 Jun 2012 08:28:57 +0000 (16:28 +0800)]
ENGR00210654 - MSL : fix NFS boot fails issue in sometime

- MX6 sololite cpu board NFS boot fails in sometimes, because MAC
  cannot get any packets while sending DHCP to require IP. The
  reproduce rate is 10%.
- Lan8720 phy enter a unexpected status, and need software reset
  phy before transmition.
- Do some below overnight tests after add the changes, no NFS
  boot issue found.
   1. Kernel boot from MMC, rootfs mount from NFS.
2. Kernel boot from tftp, rootfs mount form NFS.

Signed-off-by: Fugang Duan <B38611@freescale.com>
11 years agoENGR00214607 [MX6]Fix CPUFreq change flow issue
Anson Huang [Thu, 21 Jun 2012 12:07:35 +0000 (20:07 +0800)]
ENGR00214607 [MX6]Fix CPUFreq change flow issue

Previous flow when we change PLL1_SW_CLK from 400M
PFD to PLL1_MAIN_CLK is as below:

1. move PLL1_SW_CLK from 400M PFD to PLL1_MAIN_CLK;
2. change PLL1_MAIN_CLK's freq if necessary;

There is chance that the PLL1_MAIN_CLK freq is higher
than what we want, then after step1, system may hang as
we use low voltage to run high freq.

The correct flow should be as below:

1. make sure PLL1_MAIN_CLK is enabled;
2. make sure pLL1_MAIN_CLK freq is what we want;
3. move PLL1_SW_CLK from 400M PFD to PLL1_MAIN_CLK.

Signed-off-by: Anson Huang <b20788@freescale.com>
11 years agoENGR00214736 [MX6SL]: Enable BUSFREQ at boot
Nancy Chen [Fri, 22 Jun 2012 19:12:00 +0000 (14:12 -0500)]
ENGR00214736 [MX6SL]: Enable BUSFREQ at boot

Busfreq should be enabled at boot by default on i.MX6SL.

Signed-off-by: Nancy Chen <Nancy.Chen@freescale.com>
11 years agoENGR00214735 [MX6SL]: Set conservative governor as default governor.
Nancy Chen [Fri, 22 Jun 2012 17:45:19 +0000 (12:45 -0500)]
ENGR00214735 [MX6SL]: Set conservative governor as default governor.

Set conservative governor as default governor.

Signed-off-by: Nancy Chen <Nancy.Chen@freescale.com>
11 years agoENGR00214578: battery:divide one offset sysfs interface into two interfaces
Rong Dian [Thu, 21 Jun 2012 10:28:30 +0000 (18:28 +0800)]
ENGR00214578: battery:divide one offset sysfs interface into two interfaces

one sysfs interface for offset_discharger ,one sysfs interface for
offset_charger.

Signed-off-by: Rong Dian <b38775@freescale.com>
11 years agoENGR00214568 - SPDC : fix dma free unmatched size
Fugang Duan [Thu, 21 Jun 2012 09:31:24 +0000 (17:31 +0800)]
ENGR00214568 - SPDC : fix dma free unmatched size

- Kernel will print dma free warning when no Sipix panel
  connect. Fix dma free unmatched size.

Signed-off-by: Fugang Duan <B38611@freescale.com>
11 years agoENGR00210937:v4l2: kernel dump caused by remove mxc_v4l2_capture
Wu Guoxing [Thu, 21 Jun 2012 08:11:34 +0000 (16:11 +0800)]
ENGR00210937:v4l2: kernel dump caused by remove mxc_v4l2_capture

kernel dump when do "modprobe -r mxc_v4l2_capture"
this is caused by unregister wrong v4l2 int device when rmmod

Signed-off-by: Wu Guoxing <b39297@freescale.com>
11 years agoENGR00214367-3 imx6 usb charger: disable imx6 usb charger default
Rong Dian [Thu, 21 Jun 2012 06:45:47 +0000 (14:45 +0800)]
ENGR00214367-3 imx6 usb charger: disable imx6 usb charger default

disable imx6 usb charger default

Signed-off-by: Rong Dian <b38775@freescale.com>
11 years agoENGR00214367-2 imx6 usb charger: bind usb charger with power supply
Rong Dian [Thu, 21 Jun 2012 06:26:45 +0000 (14:26 +0800)]
ENGR00214367-2 imx6 usb charger: bind usb charger with power supply

Bind usb charger with power supply, and print some attributes about
usb charger.

Signed-off-by: Rong Dian <b38775@freescale.com>
11 years agoENGR00214367-1 power_supply: add get_supplier_property
Rong Dian [Thu, 21 Jun 2012 03:22:33 +0000 (11:22 +0800)]
ENGR00214367-1 power_supply: add get_supplier_property

add get_supplier_property interface.
This patch was written by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
originally.

Signed-off-by: Rong Dian <b38775@freescale.com>
11 years agoENGR00213944-02: mmc: sdhci: [MX6] support SD v3.0 memory cards.
Ryan QIAN [Thu, 21 Jun 2012 06:40:40 +0000 (14:40 +0800)]
ENGR00213944-02: mmc: sdhci: [MX6] support SD v3.0 memory cards.

- Add variable pad speed setting per SD clk freq.
- Add SD3.0 support on SD1, SD2, and SD3.
- Enhance drive strength on SD pad to improve its compatibility.
- change the definition of pad speed changing interface
- combine pad speed setting for different SD host controllers into one function.

Signed-off-by: Ryan QIAN <b32804@freescale.com>
Acked-by: Lily Zhang
11 years agoENGR00213944-01: mmc: sdhci: support SD v3.0 memory cards.
Ryan QIAN [Mon, 18 Jun 2012 22:56:24 +0000 (06:56 +0800)]
ENGR00213944-01: mmc: sdhci: support SD v3.0 memory cards.

- Correct switcing signaling voltage sequence according to SD3.0 spec,
 that turn off SD clk before switching signaling voltage.
 - previous code can work on MX6Q but failed on MX6SL.
 - only have sequence corrected, it can work on MX6SL.

Signed-off-by: Ryan QIAN <b32804@freescale.com>
11 years agoENGR00182045-2 V4L2 output: Fix bug: VDOA interlaced video can't play normally
Wayne Zou [Thu, 21 Jun 2012 05:56:32 +0000 (13:56 +0800)]
ENGR00182045-2 V4L2 output: Fix bug: VDOA interlaced video can't play normally

Add VDOA tiled field format support for V4L2 output driver
Also add some debug information

Signed-off-by: Wayne Zou <b36644@freescale.com>
11 years agoENGR00182045-1 IPU device: Fix bug: VDOA interlaced video can't play normally
Wayne Zou [Thu, 21 Jun 2012 05:49:46 +0000 (13:49 +0800)]
ENGR00182045-1 IPU device: Fix bug: VDOA interlaced video can't play normally

Add IPU_MAX_VDI_IN_WIDTH for I.MX IPUv3 hardware
For chrome buffer address(uoff) should be offset from luma buffer address

Signed-off-by: Wayne Zou <b36644@freescale.com>
11 years agoENGR00214081-2 PM: Remove unused code in battery driver
Lin Fuzhen [Tue, 19 Jun 2012 08:24:45 +0000 (16:24 +0800)]
ENGR00214081-2 PM: Remove unused code in battery driver

Remove some unused code in battery driver

Signed-off-by: Lin Fuzhen <fuzhen.lin@freescale.com>
11 years agoENGR00214081-1 Input: Remove redefined Item in Kconfig And Makefile
Lin Fuzhen [Tue, 19 Jun 2012 02:37:45 +0000 (10:37 +0800)]
ENGR00214081-1 Input: Remove redefined Item in Kconfig And Makefile

Remove redefined Item in Kconfig And Makefile for MAX11081

Signed-off-by: Lin Fuzhen <fuzhen.lin@freescale.com>
11 years agoENGR00214337 MX6: Enable AXI cache for VDOA/VPU/IPU and set IPU high priority
Wayne Zou [Wed, 20 Jun 2012 04:55:13 +0000 (12:55 +0800)]
ENGR00214337 MX6: Enable AXI cache for VDOA/VPU/IPU and set IPU high priority

set IPU AXI-id0 Qos=0xf(bypass) and  AXI-id1 Qos=0x7,
mx6q use AXI-id0 for IPU display channel, it should has
highest priority(bypass), and AXI-id1 for other IPU channel,
it has high priority.

Also, clear OCRAM_CTL bits to disable OCRAM read/write pipeline control.

Signed-off-by: Wayne Zou <b36644@freescale.com>
11 years agoENGR00212633 [MX6SL]: Add support for SoC power optimization in Idle mode
Nancy Chen [Tue, 19 Jun 2012 22:21:43 +0000 (17:21 -0500)]
ENGR00212633 [MX6SL]: Add support for SoC power optimization in Idle mode

Add support for SoC power optimization in Idle mode (1st phase):
1. ARM @ 198MHz. VDDARM_CAP @ 0.85V
2. AHB @ 24MHz, DDR @ 25MHz
3. PU regulator disabled when system is in IDLE.

Signed-off-by: Nancy Chen <Nancy.Chen@freescale.com>
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
11 years agoENGR00214319: CAAM: Remove CAAM configs from mx6s defconfig
Terry Lv [Wed, 20 Jun 2012 02:24:50 +0000 (10:24 +0800)]
ENGR00214319: CAAM: Remove CAAM configs from mx6s defconfig

As MX6SL has replaced CAAM with DCP+RNGB, CAAM configs need to be
removed from mx6s defconfig.

Signed-off-by: Terry Lv <r65388@freescale.com>
11 years agoENGR00213726: CAAM: Amend crypto API configuration for caam operation
Terry Lv [Fri, 15 Jun 2012 04:38:11 +0000 (12:38 +0800)]
ENGR00213726: CAAM: Amend crypto API configuration for caam operation

Previous configuration suppressed a number of crypto API features that
caused misleading results when using the CAAM driver through the tcrypt.
Enabling the API tests eliminated this.

Also, added in other common ciphers and modes that, if lacking, would
cause confusion with tcrypt behavior.

Signed-off-by: Steve Cornelius <steve.cornelius@freescale.com>
Signed-off-by: Terry Lv <r65388@freescale.com>
11 years agoENGR00214199 [MX6]Need to lower ipg_perclk to 6M before init GPT
Anson Huang [Tue, 19 Jun 2012 10:23:10 +0000 (18:23 +0800)]
ENGR00214199 [MX6]Need to lower ipg_perclk to 6M before init GPT

As Arik TO1.0 GPT use ipg_perclk as clock source, we need to
lower it to 6M before init GPT, or the clock source freq will
be wrong if we lower the ipg_perclk after GPT time already init.

Signed-off-by: Anson Huang <b20788@freescale.com>
11 years agoENGR00213903 [MX6]Improve periph parent change flow
Anson Huang [Mon, 18 Jun 2012 02:58:22 +0000 (10:58 +0800)]
ENGR00213903 [MX6]Improve periph parent change flow

When bus freq is changed, we need to update periph
clk's parent, better to use clk_set_parent API instead
of changing the parent directly.

Signed-off-by: Anson Huang <b20788@freescale.com>
11 years agoENGR00213722:MX6 SABRESD battery:add voltage offset sysfs
Rong Dian [Fri, 15 Jun 2012 04:33:58 +0000 (12:33 +0800)]
ENGR00213722:MX6 SABRESD battery:add voltage offset sysfs

interface and modify driver

1.add battery sample voltage offset sysfs interface.
2.add usb charger powersupply from max8903 UOK.
3.modify battery max coulomb data to 99% in charger full stage and
  modify battery max coulomb data to 100% in discharger stage,because
  hardware cannot support battery internal resistance and coulomb
  calculation.Battery voltage and coulomb may increase a bit in charger
  stage,so keep max coulomb data 99% in charger full stage.

Signed-off-by: Rong Dian <b38775@freescale.com>
11 years agoENGR00213997: Fix Section Mismatch warning
Robby Cai [Mon, 18 Jun 2012 11:46:41 +0000 (19:46 +0800)]
ENGR00213997: Fix Section Mismatch warning

Fix:
WARNING: vmlinux.o(.data+0x8c28): Section mismatch in reference from the
variable mx6_gpmi_nand_platform_data to the function
.init.text:gpmi_nand_platform_init()
The variable mx6_gpmi_nand_platform_data references
the function __init gpmi_nand_platform_init()
If the reference is valid then annotate the
variable with __init* or __refdata (see linux/init.h) or name the variable:
*_template, *_timer, *_sht, *_ops, *_probe, *_probe_one, *_console

Signed-off-by: Robby Cai <R63905@freescale.com>
11 years agoENGR00213751: imx6sl: Add ELAN touchscreen support on EINK-DC3 board
Robby Cai [Mon, 18 Jun 2012 05:14:08 +0000 (13:14 +0800)]
ENGR00213751: imx6sl: Add ELAN touchscreen support on EINK-DC3 board

Add ELAN capacitive TS support on EINK-DC3 stacked on MX6SL_ARM2 board
- configure the iomux setting (need 4.7K Ohm pull up on 'touch_int_b')
- configure the i2c slave addr
- configure the GPIO setting for ELAN ce/int/rst
- update the defconfig

Signed-off-by: Robby Cai <R63905@freescale.com>
11 years agoENGR00213749: imx6sl: Add keypad support on EINK-DC3 board
Robby Cai [Tue, 12 Jun 2012 10:24:54 +0000 (18:24 +0800)]
ENGR00213749: imx6sl: Add keypad support on EINK-DC3 board

Add the support for keypad on EINK-DC3 board which is stacked on ARM2 board.
- configure the iomux setting
- add dummy kpp clock to fool imx_keypad driver
- add platform device for keypad
- add key mapping (4x4 array) used on EINK-DC3
- update the defconfig for keypad driver

Signed-off-by: Robby Cai <R63905@freescale.com>
11 years agoENGR00212318 ASRC:update to in/out width config
Chen Liangjun [Mon, 11 Jun 2012 07:08:18 +0000 (15:08 +0800)]
ENGR00212318 ASRC:update to in/out width config

The origin ASRC driver did not support input and output wordwidth
config but an total wordwidth config instead. And the input wordwith
and output wordwidth are all fixed to 24 bit.

In this path, we do things below:

1 Update to use input wordwidth and output wordwidth config seperately
 instead of an total wordwidth config.
2 Set corresponding DMA(input/output) buswidth according ASRC's input
and output wordwidth config.
3 Support 16/24 bit input wordwidth and 24 bit output wordwidth.

Signed-off-by: Chen Liangjun <b36089@freescale.com>
11 years agoENGR00213684 MX6DL: emmc: mx6dl needs more iomux strength to emmc.
Zhang Jiejing [Thu, 14 Jun 2012 14:20:03 +0000 (22:20 +0800)]
ENGR00213684 MX6DL: emmc: mx6dl needs more iomux strength to emmc.

this patch add more iomux strength to mx6dl's emmc.

otherwise, -110 error when access emmc will occures.
current test show this patch can improve on this issue.

Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
11 years agoENGR00212720 [MX6]Adjust CPU 672M setpoint voltage
Anson Huang [Thu, 14 Jun 2012 10:07:30 +0000 (18:07 +0800)]
ENGR00212720 [MX6]Adjust CPU 672M setpoint voltage

Previous voltage for 672M is 1.05V, normal test is OK,
but if CPU is busy in background and do the CPUFreq change
as well, always fail the stress test at 672M setpoint, after
increase it to 1.1V, stress test is OK.

Signed-off-by: Anson Huang <b20788@freescale.com>
11 years agoENGR00213514 HDMI: adjust hotplugin sequency
Sandor Yu [Thu, 14 Jun 2012 02:05:47 +0000 (10:05 +0800)]
ENGR00213514 HDMI: adjust hotplugin sequency

Not update FB var if video mode same as last HDMI cable plugout.

Signed-off-by: Sandor Yu <R01008@freescale.com>
11 years agoENGR00162848 ov5642: Fix QVGA take photo very dark
Yuxi Sun [Fri, 15 Jun 2012 03:30:09 +0000 (11:30 +0800)]
ENGR00162848 ov5642: Fix QVGA take photo very dark

Using small setting when switch from VGA to QVGA to take picture

Signed-off-by: Yuxi Sun <b36102@freescale.com>
11 years agoENGR00213616 wm8962: set default volume for playback and record
Gary Zhang [Thu, 14 Jun 2012 09:46:24 +0000 (17:46 +0800)]
ENGR00213616 wm8962: set default volume for playback and record

set default volume for playback and record

Signed-off-by: Gary Zhang <b13634@freescale.com>
11 years agoENGR00213158-4 IPU: remove in_interrupt() check in _ipu_get/_ipu_put
Wayne Zou [Tue, 12 Jun 2012 07:02:42 +0000 (15:02 +0800)]
ENGR00213158-4 IPU: remove in_interrupt() check in _ipu_get/_ipu_put

Remove in_interrupt() check in _ipu_get/_ipu_put, since clk_enable and
clk_disable should not happen in interrupt context.

Signed-off-by: Wayne Zou <b36644@freescale.com>
11 years agoENGR00213158-3 FB: Clean up fb interrupt handler
Wayne Zou [Tue, 12 Jun 2012 06:52:21 +0000 (14:52 +0800)]
ENGR00213158-3 FB: Clean up fb interrupt handler

Clean up the fb driver for maintainability:
1. Use completion instead of semaphore API interface.
2. Use IPU oneshot interrupt mode and remove ipu_disable_irq()
   function call in interrupt handler.

Signed-off-by: Wayne Zou <b36644@freescale.com>
11 years agoENGR00213158-2 IPU: Add IPU oneshot interrupt mode
Wayne Zou [Tue, 12 Jun 2012 06:45:52 +0000 (14:45 +0800)]
ENGR00213158-2 IPU: Add IPU oneshot interrupt mode

Add IPU oneshot interrupt mode: IPU_IRQF_ONESHOT.
Interrupt is not reenabled after irq handler finished.

Signed-off-by: Wayne Zou <b36644@freescale.com>
11 years agoENGR00213158-1 IPU: Add IPU oneshot interrupt mode
Wayne Zou [Tue, 12 Jun 2012 06:37:40 +0000 (14:37 +0800)]
ENGR00213158-1 IPU: Add IPU oneshot interrupt mode

Add IPU oneshot interrupt mode: IPU_IRQF_ONESHOT.
Interrupt is not reenabled after irq handler finished.

Signed-off-by: Wayne Zou <b36644@freescale.com>
11 years agoENGR00161873 ov5642: Fix actual VGA 15fps can reach 30fps
Yuxi Sun [Wed, 13 Jun 2012 09:59:50 +0000 (17:59 +0800)]
ENGR00161873 ov5642: Fix actual VGA 15fps can reach 30fps

Delete VGA_2_VGA workflow and using 15fps VGA setting when set
this mode.

Add XGA@15fps, XGA@30fps setting.

Signed-off-by: Yuxi Sun <b36102@freescale.com>
11 years agoENGR00213170-2 [MX6SL] Enable GPU driver
Larry Li [Tue, 12 Jun 2012 09:11:45 +0000 (17:11 +0800)]
ENGR00213170-2 [MX6SL] Enable GPU driver

Use allocated GPU resource to enable GPU.
Memroy address on imx6sl board starts from 0x80000000
and GC320 can access [baseAddress, baseAddress + 2G) only without MMU.
So to make GC320 work, baseAddres must be set to 0x80000000, and all
address sent to GC320 must be a offset to baseAddress. GC355 doesn't
need this baseAddress, that means it needs a real physcial adress,
rather than the offset to baseAddress.
Original code always change phsysical address to 'offset' before use it,
no matter it is used by GC355 or GC320, so only one of them can work.
Solution is to move address adjustion to arch specific part. So each
core can get what it wants.

Signed-off-by: Larry Li <b20787@freescale.com>
Acked-by: Lily Zhang
11 years agoENGR00213170-1 [MX6SL] Add resource needed by GPU
Larry Li [Tue, 12 Jun 2012 09:08:17 +0000 (17:08 +0800)]
ENGR00213170-1 [MX6SL] Add resource needed by GPU

Prepare resourec such as memory, interrupt, clock, regester address
needed by GPU.

Signed-off-by: Larry Li <b20787@freescale.com>
11 years agoENGR00213518 V4L2 output: stop at last frame when video playback on DP-BG
Wayne Zou [Tue, 12 Jun 2012 05:50:09 +0000 (13:50 +0800)]
ENGR00213518 V4L2 output: stop at last frame when video playback on DP-BG

Stop at last frame when video playback on IPU DP-BG channel

Signed-off-by: Wayne Zou <b36644@freescale.com>
11 years agoENGR00212581 V4L2 output: Re-organize tiled format output driver
Wayne Zou [Tue, 5 Jun 2012 05:58:34 +0000 (13:58 +0800)]
ENGR00212581 V4L2 output: Re-organize tiled format output driver

Re-organize v4l2 output driver for tiled format as tiled_bypass_pp mode

Signed-off-by: Wayne Zou <b36644@freescale.com>
11 years agoENGR00180919 [MX6]Update clock tree if BUS freq is changed
Anson Huang [Wed, 13 Jun 2012 12:20:01 +0000 (20:20 +0800)]
ENGR00180919 [MX6]Update clock tree if BUS freq is changed

As DDR freq change is by modifying CCM register directly,
we need to update the clock tree as well, or the clock
tree will be broken. Also, we need to make sure the clock
rate counting is right.

Signed-off-by: Anson Huang <b20788@freescale.com>
11 years agoENGR00213336 sabresd pfuze: support 1.2G by param which pass by u-boot
Robin Gong [Wed, 13 Jun 2012 06:44:00 +0000 (14:44 +0800)]
ENGR00213336 sabresd pfuze: support 1.2G by param which pass by u-boot

There is no fuse data for distinguish 1.2G or 1G, kernel need support passed
param from u-boot that can know 1.2G or 1G. If 1.2G, will configure VDDSOC_IN
&VDDARM_IN to 1.425V by pfuze  and VDDSOC&VDDPU to 1.25V by internal ldo

Signed-off-by: Robin Gong <B38343@freescale.com>
11 years agoENGR00163374 ESAI: ESAI driver does not support mono playback
Lionel Xu [Wed, 13 Jun 2012 06:00:07 +0000 (14:00 +0800)]
ENGR00163374 ESAI: ESAI driver does not support mono playback

To remove mono playback support for ESAI.

Signed-off-by: Lionel Xu <Lionel.Xu@freescale.com>
11 years agoENGR00180937 IPU: Change IPU error message to IPU warning
Sandor Yu [Wed, 13 Jun 2012 11:18:43 +0000 (19:18 +0800)]
ENGR00180937 IPU: Change IPU error message to IPU warning

IPU driver will print unexpect interrupt state in ipu_irq_handler function,
It is for IPU debug and state check, not a IPU error.
So change print function from dev_error to dev_warn.

Signed-off-by: Sandor Yu <R01008@freescale.com>
11 years agoENGR00171743 ov5640_mipi Add XGA mode support
Yuxi Sun [Wed, 13 Jun 2012 08:47:11 +0000 (16:47 +0800)]
ENGR00171743 ov5640_mipi Add XGA mode support

Add XGA@15fps and XGA@30fps setting

Signed-off-by: Yuxi Sun <b36102@freescale.com>
11 years agoENGR00213148 ov5642: Add 720p@15fps mode
Yuxi Sun [Tue, 12 Jun 2012 05:48:19 +0000 (13:48 +0800)]
ENGR00213148 ov5642: Add 720p@15fps mode

Add 1280X720 15fps setting

Signed-off-by: Yuxi Sun <b36102@freescale.com>
11 years agoENGR00212838 FB display lose xoffset/yoffset after HDMI plugout/in
Sandor Yu [Wed, 13 Jun 2012 02:39:55 +0000 (10:39 +0800)]
ENGR00212838 FB display lose xoffset/yoffset after HDMI plugout/in

Save overlay offset before DP disable and restore it after DP enable.

Signed-off-by: Sandor Yu <R01008@freescale.com>
11 years agoENGR00213179 Mx6x,Fix HDMI build warining
Sandor Yu [Tue, 12 Jun 2012 10:21:27 +0000 (18:21 +0800)]
ENGR00213179 Mx6x,Fix HDMI build warining

Fix HDMI build warining

Signed-off-by: Sandor Yu <R01008@freescale.com>
11 years agoENGR00180930 [MX6]Fix low bus mode bug when there is no CPUFreq change
Anson Huang [Tue, 12 Jun 2012 10:50:42 +0000 (18:50 +0800)]
ENGR00180930 [MX6]Fix low bus mode bug when there is no CPUFreq change

If the CPUFreq change is done before enabling low bus freq driver,
the bus freq will be staying at high freq until there is new request
of entering low bus freq. So we need to put the bus freq into low
point if all the conditions are met when we enable bus freq.

Signed-off-by: Anson Huang <b20788@freescale.com>