rmobile/lowlevel_init_ca15.S are common in r8a7790, r8a7791 and r8a7794 of
rmobile SoCs. The initialize L2 cache in lowlevel_init_ca15.S only needed
for Cortex-A15. The r8a7794 is Cortex-A7, not Cortex-A15.
This adds Skip to initialize L2 cache when r8a7794.
rmobile/lowlevel_init_ca15.S are common in r8a7790 and r8a7791 of
rmobile SoC. But L2 cache of r8a7791 does not use L2CTLR[5].
This adds fix to set L2CTLR [5] only when the r8a7790.
Eric Nelson [Thu, 2 Oct 2014 19:16:52 +0000 (12:16 -0700)]
nitrogen6x: config: enable Android fastboot
Enable 'fastboot' command.
This is currently enabled but not yet functional. Including it in the
configuration will ease further testing and development as discussed
on the mailing list.
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Troy Kisky [Thu, 2 Oct 2014 19:16:48 +0000 (12:16 -0700)]
nitrogen6x: config: allow more bootargs parameters
Increase the maximum number of arguments allowed by the Hush parser.
This prevents errors when users or scripts aren't quoting parameters
when setting the "bootargs" variable et al.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Eric Nelson [Thu, 2 Oct 2014 19:16:39 +0000 (12:16 -0700)]
nitrogen6x: display use I2C detect for HDMI
The HPD pin and RX_SENSE registers have proven to be less reliable
than using I2C on the EDID pins for detection of an HDMI monitor.
In particular, when the HDMI output is reset through a "reboot"
cycle, the detect_hdmi() routine often bounces, resulting in
a failure to detect a connected monitor.
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Eric Nelson [Thu, 2 Oct 2014 19:16:33 +0000 (12:16 -0700)]
nitrogen6x: display: add support for LG-9.7 LVDS display
Add support for LG 9.7" LVDS panel (1024x768) with integrated eGalax
touch screen.
Note that this panel differs only slightly from the Hannstar XGA panel
(margins).
No auto-detection is available because it shares the same touch controller
as the Hannstar-XGA display, so you'll need to configure it through the
'panel' environment variable:
Eric Nelson [Thu, 2 Oct 2014 19:16:32 +0000 (12:16 -0700)]
nitrogen6x: display: add qvga panel
Add support for a 1/4 VGA panel with a 24-bit RGB interface.
No auto-detection is enabled, so you must configure the 'panel'
environment variable to use this display:
Robert Winkler [Thu, 2 Oct 2014 19:16:31 +0000 (12:16 -0700)]
nitrogen6x: display: add support lvds jeida screen
Add support for Boundary Devices 7" and 10.1" 1280x800 displays with
integrated FocalTech ft5x06 10-point touch controller.
Because they share the touch controller with the 1024x600 displays,
auto-detection is disabled and you must explicitly set the 'panel'
environment variable:
Eric Nelson [Thu, 2 Oct 2014 19:16:27 +0000 (12:16 -0700)]
nitrogen6x: staticize board file
Declare locally-used data structures and functions as
static and pull in header files to prevent compiler warnings
of "Should it be static?" when building with "make C=1".
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Eric Nelson [Thu, 2 Oct 2014 19:16:22 +0000 (12:16 -0700)]
nitrogen6x: implement board_cfb_skip() to disable text output
Several customers have asked to leave the display quiet during
boot, so allow the user to express this request by the presence
of environment variable "novideo".
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Michael Walle [Sat, 27 Sep 2014 22:05:23 +0000 (00:05 +0200)]
lsxl: convert to generic board and fix typo
Besides converting the LS-XHL and LS-CHLv2 to generic board, fix a typo
which accidentally reverted the bootsource to 'hdd' although the default
bootsource should be 'legacy'.
Cc: Tom Rini <trini@ti.com> Cc: Prafulla Wadaskar <prafulla@marvell.com> Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Masahiro Yamada [Fri, 3 Oct 2014 10:21:04 +0000 (19:21 +0900)]
mtd: denali: add Denali NAND driver for SPL
The SPL-mode driver for Denali(Cadence) NAND Flash Memory Controller IP.
This driver requires two CONFIG macros:
- CONFIG_SPL_NAND_DENALI
Define to enable this driver.
- CONFIG_SYS_NAND_BAD_BLOCK_POS
Specify bad block mark position in the oob space. Typically 0.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Chin Liang See <clsee@altera.com> Cc: Scott Wood <scottwood@freescale.com>
Masahiro Yamada [Fri, 3 Oct 2014 10:21:03 +0000 (19:21 +0900)]
mtd: denali: add Denali controller configs to Kconfig
Commit 3eb3e72a3f66 (nand/denali: Adding Denali NAND driver support)
introduced some new options, and some of them were documented by
commit f9860cf081ef (nand/denali: Document CONFIG symbols).
This commit allows users to enable/disable them via Kconfig
with more detailed help docs.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Chin Liang See <clsee@altera.com> Cc: Scott Wood <scottwood@freescale.com>
This patch move the environment offset in sheevaplug.
The size of the u-boot binary is become too big.
Fix saving environments was result of corrupting the u-boot.
Signed-off-by: Gerald Kerma <drEagle@doukki.net>
Changes in v2:
- patch description
imx: mx6dlarm2: Add support for i.MX6Q/DL arm2 LPDDR2 boards
Update the ddr scripts for LPDDR2 and add two build configs for LPDDR2
arm2 board. Since the LPDDR2 arm2 board has different DDR size, use
CONFIG_DDR_MB in defconfig to replace the PHYS_SDRAM_SIZE.
imx: mx6dlarm2: Add support for i.MX6DL arm2 DDR3 board
This patch adds the i.MX6DL arm2 board support. The i.MX6DL ARM2
shared the same board with i.MX6Q ARM2 board since the i.MX6DL is
pin-pin compatible with i.MX6Q.
The patch also support the DDR 32-BIT mode option. Please define
CONFIG_DDR_32BIT in the board configure file to enable DDR 32-BIT
mode.But due to the board design, it's 64bit DDR buswidth physically,
so, if you CONFIG_DDR_32BIT, the DDR memory size will be half of it.
usb: ehci-mx6: Rename the USB register base address
The mx6sl/mx6sx has 2 OTG and 1 host. So they have name
"USBO2H_USB_BASE_ADDR" in imx-regs.h. The driver hard codes
the USB base address name to "USBOH3", which causes the driver
failed to build for mx6sl/mx6sx.
This patch uniform the address name to "USB_BASE_ADDR" for all
mx6 series.
imx: mx6: Checking PLL2 PFD0 and PFD2 for periph_clk before PFD reset
Checking the pre_periph_clk_sel and pre_periph2_clk of CCM CBCMR
register, if the PLL2 PFD0 or PLL2 PFD2 is used for the clock source,
do not reset this PFD to avoid system hang. Customers may set this
in DDR script or use BT_FREQ to select low freq boot.
Marek Vasut [Mon, 28 Apr 2014 01:38:43 +0000 (03:38 +0200)]
arm: mxs: olinuxino: Fine-tune DRAM configuration
Add fine-tuning for the DRAM configuration according to the DRAM chip
datasheet. THis configuration applies to both Hynix HY5DU12622DTP and
Samsung K5H511538J-D43 .
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
Marek Vasut [Mon, 28 Apr 2014 01:38:41 +0000 (03:38 +0200)]
arm: mxs: Wait for DRAM to start
Instead of waiting for a fixed period of time and hoping for the best
that the DRAM will start, read back an EMI status register which tells
us exactly when the DRAM started.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
Marek Vasut [Mon, 28 Apr 2014 01:38:40 +0000 (03:38 +0200)]
arm: mxs: Wait when disabling VDDMEM current limiter
According to i.MX23 datasheet Table 32-17, we must wait for the supply
to settle before disabling the current limiter. Indeed, not waiting a
little here causes the system to crash at times.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
Marek Vasut [Mon, 28 Apr 2014 01:38:39 +0000 (03:38 +0200)]
usb: ehci: mxs: Add board-specific callbacks
Add board-specific callbacks for enabling/disabling port power
into the MXS EHCI controller driver. This is in-line with the
names of callbacks on other systems.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
Simon Glass [Mon, 15 Sep 2014 12:33:20 +0000 (06:33 -0600)]
sandbox: config: Enable all SPI flash chips
Sandbox may as well support everything. This increases the amount of code
that is built/tested by sandbox, and also provides access to all the
supported SPI flash devices.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Simon Glass [Mon, 15 Sep 2014 12:33:19 +0000 (06:33 -0600)]
sandbox: Convert SPI flash emulation to use sf_params
At present sandbox has its own table of supported SPI flash chips. Now that
the SPI flash system is fully consolidated and has its own list, sandbox
should use that.
This enables us to expand the number of chips that sandbox supports.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
To add the Denali NAND driver support into U-Boot.
This driver is leveraged from Linux with commit ID fdbad98dff8007f2b8bee6698b5d25ebba0471c9. For Denali
controller 64 variance, you need to declare macro
CONFIG_SYS_NAND_DENALI_64BIT.
Stefan Roese [Fri, 5 Sep 2014 07:57:01 +0000 (09:57 +0200)]
mtd: nand: Fix length bug in ioread16_rep() and iowrite16_rep()
The ioread16_rep() and iowrite16_rep() implementations are U-Boot specific
and have been introduced with the Linux MTD v3.14 sync. While introducing
these functions, the length for the loop has been miscalculated. The ">> 1"
is already present in the caller. So lets remove it in the function.
Tested on omap3_ha.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Scott Wood <scottwood@freescale.com> Acked-by: Heiko Schocher <hs@denx.de>
OMAP GPMC driver used with some NAND Flash devices
(e.g. Spansion S34ML08G1) causes that U-boot shows
hundreds of 'nand: bit-flip corrected' error messages.
Possible cause was discussed in the mailinglist thread:
http://lists.denx.de/pipermail/u-boot/2014-April/177508.html
The issue was partially fixed with the cc81a5291910d7a.git
however this has to be done to fix the SPL.
The original author of the code is Belisko Marek
<marek.belisko@gmail.com>
Chris Packham [Wed, 10 Sep 2014 04:03:10 +0000 (16:03 +1200)]
powerpc: add --bss-plt to LDFLAGS
With some versions of gcc (that we know of 4.6.3 and 4.8.2 are affected)
it is necessary to specify --bss-plt to get the final blrl in the
_GOT2_TABLE_. Without this the last symbol does not get it's address
relocated. For the P2041RDB board this ended up being
NetArpWaitTimerStart which caused the ARP packets to timeout
immediately.
Signed-off-by: Joakim Tjernlund <joakim.tjernlund@transmode.se> Signed-off-by: Chris Packham <judge.packham@gmail.com> Acked-by: Joakim Tjernlund <joakim.tjernlund@transmode.se> Acked-by: Scott Wood <scottwood@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
York Sun [Thu, 11 Sep 2014 20:32:07 +0000 (13:32 -0700)]
board/ls1021aqds: Add DDR4 support
LS1021AQDS has a variant with DDR4 slot. This patch adds a new defconfig
for this variant to enable DDR4 support. RAW timing parameters are not
added for DDR4. The board timing parameters are only tuned for single-
rank 1600 and 1800MT/s with Micron DIMM 9ASF51272AZ-2G1A1 due to DIMM
availability.
Signed-off-by: York Sun <yorksun@freescale.com> CC: Alison Wang <alison.wang@freescale.com>
York Sun [Thu, 11 Sep 2014 20:32:06 +0000 (13:32 -0700)]
driver/ddr/fsl: Fix DDR4 driver
When accumulated ECC is enabled, the DQ_MAP for ECC[4:7] needs to be set
to 0, i.e. 0->0, 1->1, etc., required by controller logic, even these pins
are not actually connected.
Also fix a bug when reading from DDR register to use proper accessor for
correct endianess.
York Sun [Mon, 8 Sep 2014 19:20:01 +0000 (12:20 -0700)]
ARMv8/ls2085a: Enable secondary cores
Spin table is at the very beginning of boot code. Each core has an individual
release address within the spin table, the ft_cpu_setup fn updates the
"cpu-release-addr" property of each cpu node with the corresponding release
address.
Also fix CPU_RELEASE_ADDR to point to secondary_boot_func.
Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Arnab Basu <arnab.basu@freescale.com>
York Sun [Mon, 8 Sep 2014 19:20:00 +0000 (12:20 -0700)]
armv8/fsl-lsch3: Release secondary cores from boot hold off with Boot Page
Secondary cores need to be released from holdoff by boot release
registers. With GPP bootrom, they can boot from main memory
directly. Individual spin table is used for each core. Spin table
and the boot page is reserved in device tree so OS won't overwrite.
Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Arnab Basu <arnab.basu@freescale.com>
fdt_support: Make of_bus_default_count_cells non static
of_bus_default_count_cells can be used to get the #address-cells
and #size-cells defined by the current node's parent node. This
is required when using of_read_number to read from FDT nodes that
can be 32 or 64 bytes depending on values defined by the parent.
Signed-off-by: Arnab Basu <arnab.basu@freescale.com> CC: Scott Wood <scottwood@freescale.com>
This is being done so that it can be used outside 'fdt_support.c'. Making
life more convenient when reading device node properties that can be 32
or 64 bits long.
Signed-off-by: Arnab Basu <arnab.basu@freescale.com> Cc: Scott Wood <scottwood@freescale.com>
York Sun [Thu, 21 Aug 2014 23:13:22 +0000 (16:13 -0700)]
driver/ddr/fsl: Fix tXP and tCKE
The driver was written using old DDR3 spec which only covers low speeds.
The value would be suboptimal for higher speeds. Fix both timing according
to latest DDR3 spec, remove tCKE as an config option.
projects / karo-tx-uboot.git / log