This patch adds support for parallel NOR device (S29GL512S10) present on J6-EVM.
The Flash device is connected to GPMC controller on chip-select[0] and accessed
as memory-mapped device. It has data-witdh=x16, capacity-64MBytes(512Mbits) and
is CFI compatible.
As multiple devices are share GPMC pins on this board, so following board
settings are required to detect NOR device:
SW5.1 (NAND_BOOTn) = OFF (logic-1)
SW5.2 (NOR_BOOTn) = ON (logic-0) /* Active-low */
SW5.3 (eMMC_BOOTn) = OFF (logic-1)
SW5.4 (QSPI_BOOTn) = OFF (logic-1)
And also set appropriate SYSBOOT configurations:
SW3.1 (SYSBOOT[ 8])= ON (logic-1) /* selects SYS_CLK1 speed */
SW3.2 (SYSBOOT[ 9])= OFF (logic-0) /* selects SYS_CLK1 speed */
SW3.3 (SYSBOOT[10])= ON (logic-1) /* wait-pin monitoring = enabled */
SW3.4 (SYSBOOT[11])= OFF (logic-0) /* device type: Non Muxed */
SW3.5 (SYSBOOT[12])= OFF (logic-0) /* device type: Non Muxed */
SW3.6 (SYSBOOT[13])= ON (logic-1) /* device bus-width: 1(x16) */
SW3.7 (SYSBOOT[14])= OFF (logic-0) /* reserved */
SW3.8 (SYSBOOT[15])= ON (logic-1) /* reserved */
Also, following changes are required to enable NOR Flash support in
dra7xx_evm board profile:
This patch adds support for x16 NAND device (MT29F2G16AAD) connected to GPMC
chip-select[0] on DRA7xx EVM.
As GPMC pins are shared by multiple devices, so in addition to this patch
following board settings are required for NAND device detection [1]:
SW5.9 (GPMC_WPN) = OFF (logic-1)
SW5.1 (NAND_BOOTn) = ON (logic-0) /* Active-low */
SW5.2 (NOR_BOOTn) = OFF (logic-1)
SW5.3 (eMMC_BOOTn) = OFF (logic-1)
SW5.4 (QSPI_BOOTn) = OFF (logic-1)
And also set appropriate SYSBOOT configurations
SW2.1 (SYSBOOT[0]) = ON (logic-1) /* selects NAND Boot */
SW2.2 (SYSBOOT[1]) = OFF (logic-0) /* selects NAND Boot */
SW2.3 (SYSBOOT[2]) = OFF (logic-0) /* selects NAND Boot */
SW2.4 (SYSBOOT[3]) = OFF (logic-0) /* selects NAND Boot */
SW2.5 (SYSBOOT[4]) = ON (logic-1) /* selects NAND Boot */
SW2.6 (SYSBOOT[5]) = ON (logic-1) /* selects NAND Boot */
SW2.7 (SYSBOOT[6]) = OFF (logic-0) /* reserved */
SW2.8 (SYSBOOT[7]) = OFF (logic-0) /* reserved */
SW3.1 (SYSBOOT[ 8])= ON (logic-1) /* selects SYS_CLK1 speed */
SW3.2 (SYSBOOT[ 9])= OFF (logic-0) /* selects SYS_CLK1 speed */
SW3.3 (SYSBOOT[10])= ON (logic-1) /* wait-pin monitoring = enabled */
SW3.4 (SYSBOOT[11])= OFF (logic-0) /* device type: Addr/Data Muxed */
SW3.5 (SYSBOOT[12])= ON (logic-1) /* device type: Addr/Data Muxed */
SW3.6 (SYSBOOT[13])= ON (logic-1) /* device bus-width: 1(x16) */
SW3.7 (SYSBOOT[14])= OFF (logic-0) /* reserved */
SW3.8 (SYSBOOT[15])= ON (logic-1) /* reserved */
Following changes are required in board.cfg to enable NAND on J6-EVM:
This patch adds support for NAND device connected to GPMC chip-select on
following AM43xx EVM boards.
am437x-gp-evm: On this board, NAND Flash signals are muxed with eMMC, thus at a
time either eMMC or NAND can be enabled. Selection between eMMC and NAND is
controlled by:
(a) Statically using Jumper on connecter (J89) present on board.
(a) If Jumper on J89 is NOT used, then selection can be dynamically controlled
by driving SPI2_CS0[MUX_MODE=GPIO] pin via software:
SPI2_CS0 == 0: NAND (default)
SPI2_CS0 == 1: eMMC
am43x-epos-evm: On this board, NAND Flash control lines are muxed with QSPI,
Thus only one of the two can be used at a time. Selection is controlled by:
(a) Dynamically driving following GPIO pin from software
GPMC_A0(GPIO) == 0 NAND is selected (default)
NAND device (MT29F4G08AB) on these boards has:
- data-width=8bits
- blocksize=256KB
- pagesize=4KB
- oobsize=224 bytes
For above NAND device, ROM code expects the boot-loader to be flashed in BCH16
ECC scheme for NAND boot, So by default BCH16 ECC is enabled for AM43xx EVMs.
board/ti/am335x: add support for beaglebone NOR Cape
This patch adds support of NOR cape[1] for both Beaglebone (white) and
Beaglebone(Black) boards. NOR Flash on this cape is connected to GPMC
chip-select[0] and accesses as external memory-mapped device.
This cape has 128Mbits(16MBytes), x16, CFI compatible NOR Flash device.
As GPMC chip-select[0] can be shared by multiple capes so NOR profile is
not enabled by default in boards.cfg. Following changes are required to
enable NOR cape detection when building am335x_boneblack board profile.
board/ti/am335x: add support for beaglebone NAND cape
Beaglebone Board can be connected to expansion boards to add devices to them.
These expansion boards are called 'capes'. This patch adds support for
following versions of Beaglebone(AM335x) NAND capes
(a) NAND Device with bus-width=16, block-size=128k, page-size=2k, oob-size=64
(b) NAND Device with bus-width=16, block-size=256k, page-size=4k, oob-size=224
Further information and datasheets can be found at [1] and [2]
* How to boot from NAND using Memory Expander + NAND Cape ? *
- Important: As BOOTSEL values are sampled only at POR, so after changing any
setting on SW2 (DIP switch), disconnect and reconnect all board power supply
(including mini-USB console port) to POR the beaglebone.
- Selection of ECC scheme
for NAND cape(a), ROM code expects BCH8_HW ecc-scheme
for NAND cape(b), ROM code expects BCH16_HW ecc-scheme
- Selction of boot modes can be controlled via DIP switch(SW2) present on
Memory Expander cape.
SW2[SWITCH_BOOT] == OFF follow default boot order MMC-> SPI -> UART -> USB
SW2[SWITCH_BOOT] == ON boot mode selected via DIP switch(SW2)
So to flash NAND, first boot via MMC or other sources and then switch to
SW2[SWITCH_BOOT]=ON to boot from NAND Cape.
- For NAND boot following switch settings need to be followed
SW2[ 1] = OFF (SYSBOOT[ 0]==1: NAND boot mode selected )
SW2[ 2] = OFF (SYSBOOT[ 1]==1: -- do -- )
SW2[ 3] = ON (SYSBOOT[ 2]==0: -- do -- )
SW2[ 4] = ON (SYSBOOT[ 3]==0: -- do -- )
SW2[ 5] = OFF (SYSBOOT[ 4]==1: -- do -- )
SW2[ 6] = OFF (SYSBOOT[ 8]==1: 0:x8 device, 1:x16 device )
SW2[ 7] = ON (SYSBOOT[ 9]==0: ECC done by ROM )
SW2[ 8] = ON (SYSBOOT[10]==0: Non Muxed device )
SW2[ 9] = ON (SYSBOOT[11]==0: -- do -- )
*IMPORTANT NOTE*
As Beaglebone board shares the same config as AM335x EVM, so following
changes are required in addition to this patch for Beaglebone NAND cape.
(1) Enable NAND in am335x_beaglebone board profile
(2) Add CONFIG_SYS_NAND_BUSWIDTH_16BIT to board config because:
- AM335x EVM has NAND device with datawidth=8, whereas
- Beaglebone NAND cape has NAND device with data-width=16
This patch
- consolidate CONFIG_SYS_NAND_xx and CONFIG_SPL_NAND_xx from various
configuration files into single file.
- update MTD Partition table to match AM335x_EVM DT in linux-kernel
- segregate CONFIGs based on different boot modes (like SPL and U-Boot)
Tom Rini [Fri, 18 Jul 2014 15:51:33 +0000 (11:51 -0400)]
tseries: Set CONFIG_ENV_IS_NOWHERE for SPL+NAND
In the case of SPL on these boards we only need environment for
SPL_USBETH, so it's safe to normally use ENV_IS_NOWHERE and SPL+NAND
does not support environment today.
Cc: Hannes Petermaier <oe5hpm@oevsv.at> Signed-off-by: Tom Rini <trini@ti.com>
Tom Rini [Fri, 18 Jul 2014 15:51:32 +0000 (11:51 -0400)]
TI:armv7: Change CONFIG_SPL_STACK to not be CONFIG_SYS_INIT_SP_ADDR
There are times where we may need more than a few kilobytes of stack
space. We also will not be using CONFIG_SPL_STACK location prior to DDR
being initialized (CONFIG_SYS_INIT_SP_ADDR is still used there) so pick
a good location within DDR for this to be. Tested on
OMAP4/AM335x/OMAP5/DRA7xx.
Tom Rini [Fri, 18 Jul 2014 15:51:31 +0000 (11:51 -0400)]
am335x_evm: Move SPL network defines
On am335x_evm we only support USBETH for a networking SPL option so move
the rest of the defines under that area as that's the only time we need
(and want) environment support here.
Simon Glass [Mon, 7 Jul 2014 16:16:38 +0000 (10:16 -0600)]
exynos: spi: Fix calculation of SPI transaction start time
The SPI transaction delay is supposed to be measured from the end of one
transaction to the start of the next. The code does not work that way, so
fix it.
Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Ajay Kumar <ajaykumar.rs@samsung.com> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Simon Glass [Fri, 11 Jul 2014 04:23:26 +0000 (22:23 -0600)]
arm: Set up global data before board_init_f()
At present arm defines CONFIG_SYS_GENERIC_GLOBAL_DATA, meaning that
the global_data pointer is set up in board_init_f(). However it is
actually set up before this, it just isn't zeroed.
If we zero the global data before calling board_init_f() then we
don't need to define CONFIG_SYS_GENERIC_GLOBAL_DATA.
Make this change (on arm32 only) to simplify the init process. I
don't have the ability to test aarch64 yet.
Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Tom Rini <trini@ti.com>
When CONFIG_WATCHDOG is defined the board initialization just performs
a WATCHDOG_RESET, an initialization of the watchdog is not done.
This has been modified fot the MPC85xx, the board initialization calls
its watchdog initialitzation allowing for full watchdog configuration
very early in the boot phase.
Signed-off-by: Rainer Boschung <rainer.boschung@keymile.com> Reviewed-by: York Sun <yorksun@freescale.com>
For e500mc cores the watchdog timer period has to be set by means of a
6bit value, that defines the bit of the timebase counter used to signal
a watchdog timer exception on its 0 to 1 transition.
The macro used to set the watchdog period TCR_WP, was redefined for e500mc
to support 6 WP setting.
The parameter (x) given to the macro specifies the prescaling factor of
the time base clock (fTB):
watchdog_period = 1/fTB * 2^x
Signed-off-by: Rainer Boschung <rainer.boschung@keymile.com> Reviewed-by: York Sun <yorksun@freescale.com>
Chin Liang See [Tue, 10 Jun 2014 06:26:52 +0000 (01:26 -0500)]
mmc/dw_mmc: Fix clock divider calculation error for bypass mode
To fix the clock divider calculation error when the controller
clock same as the operating frequency. This is known as bypass
mode. In this mode, the divider should be 0.
Lubomir Rintel [Tue, 10 Jun 2014 18:46:43 +0000 (20:46 +0200)]
bcm2835_sdhci: Add SDHCI_QUIRK_NO_HISPD_BIT flag
Seems like the controller doesn't support the flag. None of the hi-speed cards
I've tried could be read, while they successfully worked with the quirk enabled.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Tested-by: Stephen Warren <swarren@wwwdotorg.org>
Hans de Goede [Tue, 29 Jul 2014 16:29:27 +0000 (18:29 +0200)]
sun7i: Add bananapi board
The Banana Pi is an A20 based development board using Raspberry Pi compatible
IO headers. It comes with 1 GB RAM, 1 Gb ethernet, 2x USB host, sata, hdmi
and stereo audio out + various expansion headers:
http://www.lemaker.org/
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Marc Zyngier [Fri, 18 Jul 2014 20:06:39 +0000 (21:06 +0100)]
sunxi: HYP/non-sec: configure CNTFRQ on all CPUs
CNTFRQ needs to be properly configured on all CPUs. Otherwise,
virtual machines hoping to find valuable information on secondary
CPUs will be disapointed...
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Hans de Goede [Sun, 27 Jul 2014 20:29:38 +0000 (22:29 +0200)]
sun7i: Add support for a number of new sun7i boards
Add support for boards which I own and which already have a dts file in the
upstream kernel.
Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net> Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Sun, 27 Jul 2014 15:55:43 +0000 (17:55 +0200)]
sun5i: Add support for a number of new sun5i boards
Add support for boards which I own and which already have a dts file in the
upstream kernel.
Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net> Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Sat, 26 Jul 2014 14:51:08 +0000 (16:51 +0200)]
sun4i: Add support for a number of new sun4i boards
Add support for boards which I own and which already have a dts file in the
upstream kernel.
Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net> Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Roman Byshko [Thu, 24 Jul 2014 20:54:24 +0000 (22:54 +0200)]
sun7i: cubietruck: enable USB EHCI
Cubietruck has two USB host controllers. This makes them
usable by enabling the EHCI driver for them.
Signed-off-by: Roman Byshko <rbyshko@gmail.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
[hdegoede@redhat.com: Also enable ehci for Cubietruck_FEL] Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Roman Byshko [Thu, 24 Jul 2014 20:54:23 +0000 (22:54 +0200)]
sun7i: add USB EHCI settings
Specific USB EHCI settings to be set for sun7i if
CONFIG_USB_EHCI is enabled.
Signed-off-by: Roman Byshko <rbyshko@gmail.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
[hdegoede@redhat.com: Use SUNXI_GPH macro for SUNXI_USB_VBUS#_GPIO]
[hdegoede@redhat.com: Add #ifndef SUNXI_USB_VBUS#_GPIO to allow override of
the default pins from boards.cfg] Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Roman Byshko [Thu, 24 Jul 2014 20:54:22 +0000 (22:54 +0200)]
sunxi: add general USB settings
General configuration settings to be set if CONFIG_USB_EHCI
is enabled for an Allwinner aka sunxi SoC.
Signed-off-by: Roman Byshko <rbyshko@gmail.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Roman Byshko [Thu, 24 Jul 2014 20:54:20 +0000 (22:54 +0200)]
sunxi: add defines to control USB Host clocks/resets
The commit adds three defines which will be used in
the EHCI driver to enable USB clock and assert
reset controllers of the corresponding PHYs.
Signed-off-by: Roman Byshko <rbyshko@gmail.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Ian Campbell [Fri, 18 Jul 2014 19:38:41 +0000 (20:38 +0100)]
ahci: provide sunxi SATA driver using AHCI platform framework
This enables the necessary clocks, in AHB0 and in PLL6_CFG. This is done
for sun7i only since I don't have access to any other sunxi platforms
with sata included.
The PHY setup is derived from the Alwinner releases and Linux, but is mostly
undocumented.
The Allwinner AHCI controller also requires some magic (and, again,
undocumented) DMA initialisation when starting a port. This is added under a
suitable ifdef.
This option is enabled for Cubieboard, Cubieboard2 and Cubietruck based on
contents of Linux DTS files, including SATA power pin config taken from the
DTS. All build tested, but runtime tested on Cubieboard2 and Cubietruck only.
Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
- Use "make <board>_defconfig" instead of "make <board>_config".
- Invoke tools/genboardscfg.py to generate boards.cfg when it is
missing.
- Show "Building ${BOARD_NAME} board..." message.
(Prior to Kconfig, instead, mkconfig script displayed
"Configuring for ${BOARD_NAME} board..." but it was removed.)
Without this message, we cannot know which board is currently
being built.
- Do not show "# configuration written to .config".
This message is useless and just annoying for MAKEALL.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
The old configuration script is no longer necessary.
Nor is boards.cfg a primary database.
We can generate it with the genboardscfg.py tool
based on the latest Kconfig, defconfig and MAINTAINERS.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
Now the primary data for each board is in Kconfig, defconfig and
MAINTAINERS.
It is true boards.cfg is needed for MAKEALL and buildman and might be
useful to brouse all the supported boards in a single database.
But it would be painful to maintain the boards.cfg in sync.
So, this is the solution.
Add a tool to generate the equivalent boards.cfg file based on
the latest Kconfig, defconfig and MAINTAINERS.
We can keep all the functions of MAKEALL and buildman with it.
The best thing would be to change MAKEALL and buildman for not
depending on boards.cfg in the future, but it would take some time.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
We have switched to Kconfig and the boards.cfg file is going to
be removed. We have to retrieve the board status and maintainers
information from it.
The MAINTAINERS format as in Linux Kernel would be nice
because we can crib the scripts/get_maintainer.pl script.
After some discussion, we chose to put a MAINTAINERS file under each
board directory, not the top-level one because we want to collect
relevant information for a board into a single place.
TODO:
Modify get_maintainer.pl to scan multiple MAINTAINERS files.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Suggested-by: Tom Rini <trini@ti.com> Acked-by: Simon Glass <sjg@chromium.org>
This commit enables Kconfig.
Going forward, we use Kconfig for the board configuration.
mkconfig will never be used. Nor will include/config.mk be generated.
Kconfig must be adjusted for U-Boot because our situation is
a little more complicated than Linux Kernel.
We have to generate multiple boot images (Normal, SPL, TPL)
from one source tree.
Each image needs its own configuration input.
Usage:
Run "make <board>_defconfig" to do the board configuration.
It will create the .config file and additionally spl/.config, tpl/.config
if SPL, TPL is enabled, respectively.
You can use "make config", "make menuconfig" etc. to create
a new .config or modify the existing one.
Use "make spl/config", "make spl/menuconfig" etc. for spl/.config
and do likewise for tpl/.config file.
The generic syntax of configuration targets for SPL, TPL is:
<target_image>/<config_command>
Here, <target_image> is either 'spl' or 'tpl'
<config_command> is 'config', 'menuconfig', 'xconfig', etc.
When the configuration is done, run "make".
(Or "make <board>_defconfig all" will do the configuration and build
in one time.)
For futher information of how Kconfig works in U-Boot,
please read the comment block of scripts/multiconfig.py.
By the way, there is another item worth remarking here:
coexistence of Kconfig and board herder files.
Prior to Kconfig, we used C headers to define a set of configs.
We expect a very long term to migrate from C headers to Kconfig.
Two different infractructure must coexist in the interim.
In our former configuration scheme, include/autoconf.mk was generated
for use in makefiles.
It is still generated under include/, spl/include/, tpl/include/ directory
for the Normal, SPL, TPL image, respectively.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
We are about to switch to Kconfig in the next commit.
But there are something to get done beforehand.
In Kconfig, include/generated/autoconf.h defines boolean
CONFIG macros as 1.
CONFIG_SPL and CONFIG_TPL, if defined, must be set to 1.
Otherwise, when switching to Kconfig, the build log
would be sprinkled with warning messages like this:
warning: "CONFIG_SPL" redefined [enabled by default]
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Reviewed-by: Simon Glass <sjg@chromium.org>
This commit adds:
- arch/${ARCH}/Kconfig
provide a menu to select target boards
- board/${VENDOR}/${BOARD}/Kconfig or board/${BOARD}/Kconfig
set CONFIG macros to the appropriate values for each board
- configs/${TARGET_BOARD}_defconfig
default setting of each board
(This commit was automatically generated by a conversion script
based on boards.cfg)
In Linux Kernel, defconfig files are located under
arch/${ARCH}/configs/ directory.
It works in Linux Kernel since ARCH is always given from the
command line for cross compile.
But in U-Boot, ARCH is not given from the command line.
Which means we cannot know ARCH until the board configuration is done.
That is why all the "*_defconfig" files should be gathered into a
single directory ./configs/.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
Since the command name 'make' may not be GNU Make on some platforms
such as FreeBSD, buildman should call scripts/show-gnu-make to get
the command name for GNU MAKE (and error out if it is not found).
Since the command name 'make' may not be GNU Make on some platforms
such as FreeBSD, MAKEALL should call scripts/show-gnu-make to get
the command name for GNU MAKE (and error out if it is not found).
The GNU Make should be searched after parsing options because we want
to allow "MAKEALL -h" even if GNU Make is missing on the system.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
Ma Haijun [Sat, 12 Jul 2014 13:24:06 +0000 (14:24 +0100)]
ARM: convert arch_fixup_memory_node to a generic FDT fixup function
Some architecture needs extra device tree setup. Instead of adding
yet another hook, convert arch_fixup_memory_node to be a generic
FDT fixup function.
[maz: collapsed 3 patches into one, rewrote commit message]
Signed-off-by: Ma Haijun <mahaijuns@gmail.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Marc Zyngier [Sat, 12 Jul 2014 13:24:04 +0000 (14:24 +0100)]
ARM: HYP/non-sec: add generic ARMv7 PSCI code
Implement core support for PSCI. As this is generic code, it doesn't
implement anything really useful (all the functions are returning
Not Implemented).
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Marc Zyngier [Sat, 12 Jul 2014 13:24:03 +0000 (14:24 +0100)]
ARM: HYP/non-sec: allow relocation to secure RAM
The current non-sec switching code suffers from one major issue:
it cannot run in secure RAM, as a large part of u-boot still needs
to be run while we're switched to non-secure.
This patch reworks the whole HYP/non-secure strategy by:
- making sure the secure code is the *last* thing u-boot executes
before entering the payload
- performing an exception return from secure mode directly into
the payload
- allowing the code to be dynamically relocated to secure RAM
before switching to non-secure.
This involves quite a bit of horrible code, specially as u-boot
relocation is quite primitive.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Marc Zyngier [Sat, 12 Jul 2014 13:24:00 +0000 (14:24 +0100)]
ARM: non-sec: reset CNTVOFF to zero
Before switching to non-secure, make sure that CNTVOFF is set
to zero on all CPUs. Otherwise, kernel running in non-secure
without HYP enabled (hence using virtual timers) may observe
timers that are not synchronized, effectively seeing time
going backward...
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
projects / karo-tx-uboot.git / log