Fancy Fang [Tue, 24 Dec 2013 02:36:17 +0000 (10:36 +0800)]
ENGR00293170 PXP: remove cpu_addr field from struct pxp_mem_desc
The cpu_addr field in struct pxp_mem_desc cannot be used
by user application, so it is not necessary to pass this
field data to user. Now the similar field 'virtual' in
struct pxp_buf_obj is used to store the kernel space
virtual addr for allocated dma buffer.
Liu Ying [Tue, 24 Dec 2013 08:26:35 +0000 (16:26 +0800)]
ENGR00293235 IPUv3: Refine register access
The original IPUv3 driver uses readl()/writel() to
access the IPUv3 registers in the following way where
ipu->reg_base is a pointer which points to a 32 bit
I/O memory cell of a certain IPUv3 deblock's base address:
writel(value, ipu->reg_base + offset);
readl(ipu->reg_base + offset);
This makes the register offset values shrink 4 times,
comparing to the offset values documented in the
reference manual. For example, we need to change the
offset value from 0x003C to 0x003C/4 so that we may
access the register IPU_INT_CTRL_1 correctly.
This patch redefines the type of ipu->reg_base to
'void __iomem *', then the offset values can be the
same to what they are documented.
Also, this patch corrects some register relevant
macros by wrapping their arguments with parentheses
to avoid any unsafe decipher.
Reviewed-by: Robby Cai <R63905@freescale.com> Cc: Oliver Brown <oliver.brown@freescale.com> Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
Liu Ying [Tue, 24 Dec 2013 08:18:56 +0000 (16:18 +0800)]
ENGR00293231 IPUv3 reg: Remove some unused macros
This patch removes two unused macros IPU_INT_CTRL_IRQ(irq)
and IPU_INT_STAT_IRQ(irq) to save two lines of code. The
existing another two macros IPUIRQ_2_STATREG(irq) and
IPUIRQ_2_CTRLREG(irq) are the surrogates for them.
Reviewed-by: Robby Cai <R63905@freescale.com> Cc: Oliver Brown <oliver.brown@freescale.com> Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
Fancy Fang [Fri, 20 Dec 2013 10:14:21 +0000 (18:14 +0800)]
ENGR00293119 PXP: change the dma buffer lists management for PXP device
Create pxp_info struct data for each opened device file descriptor.
And bind all the allocated dma buffers to this struct for each opened
file. This makes the dma buffer lists management safer, more effective
and more flexible.
Fancy Fang [Thu, 19 Dec 2013 10:32:42 +0000 (18:32 +0800)]
ENGR00292816 PXP: move two struct definitions to pxp_device.h
Move two struct definitions defined in pxp_device.c to pxp_device.h.
Now the pxp_device.h has been created for PXP device driver. So all
the type definition should stay in header file not c source file.
Luwei Zhou [Mon, 23 Dec 2013 06:09:25 +0000 (14:09 +0800)]
ENGR00293101 hwmon: mma8451: add sys interface to set sensor scale mode.
mma8451 sensor driver on i.MX6Q/DL SabreSD/AUTO doesn't provide the
interface to set sensor scale. The new sys interface name is "scalemode".
The mode is defined as:
MODE_2G : 0, MODE_4G : 1, MODE_8G : 2
Oliver Brown [Thu, 19 Dec 2013 18:59:05 +0000 (12:59 -0600)]
ENGR00292585 IPUv3: Fix a horizontal line at the middle playing 1080i
Added additional check to handle stripe limits differently for upscaling
and downscaling. Upscaling requires relaxed checking because input stripe
may fall slighty outside of the input window. Downscaling requires strict
limit checking.
Signed-off-by: Oliver Brown <oliver.brown@freescale.com>
Fancy Fang [Wed, 18 Dec 2013 05:38:23 +0000 (13:38 +0800)]
ENGR00292562 PXP: move the definitions used only by PXP device to a new header file
Some definitions used only by PXP device driver should not stay in
pxp_dma.h which is shared by PXP, EPDC and V4L2. So the patch creates
a new header file pxp_device.h to hold these definitions.
Fancy Fang [Tue, 17 Dec 2013 08:58:26 +0000 (16:58 +0800)]
ENGR00292398 PXP: refine two spin locks usage in PXP dma driver
This patch provides the following refinements:
1. For pxp channel lock, use spin_lock() instead of spin_lock_irqsave().
Since this lock is not used in any ISR. Moreover, this can increase the
driver's concurrency with no local irq disabled.
2. Narrow down the pxp lock's locking range in pxp_issue_pending().
Since this lock is also used in PXP ISR, so its hold time should be as
few as possible to reduce the time when local irq disabled.
Peter Chen [Thu, 12 Dec 2013 06:33:02 +0000 (14:33 +0800)]
ENGR00291876 usb: phy-mxs: add delay before set phyctrl.clkgate
There is a request from IC engineer that if we doesn't
set phypwd as 0xffffffff, we need to delay about five
32Khz cycles before set phypwd, otherwise, the wakeup
signal may can't wake up controller.
Liu Ying [Wed, 18 Dec 2013 02:03:22 +0000 (10:03 +0800)]
ENGR00291103 IPUv3 common:Don't initialize PRP_VF for MEM_VDI_MEM
Since the channel MEM_VDI_MEM doesn't use the PRP_VF task, this
patch removes the code to initialize the PRP_VF task for the
channel MEM_VDI_MEM. This change may fix the issue caused by
the unnesessary PRP_VF task output resolution limitation check.
The issue can be reproduced by the following unit test case:
mxc_vpu_test.out -D "-f 2 -y 2 -v m -i
1080i_shields1088i2997_shields_ter_4x300_15fps_track1.h264"
Fancy Fang [Tue, 17 Dec 2013 07:30:58 +0000 (15:30 +0800)]
ENGR00292369 PXP: remove unnecessary head list empty check
The head list empty check in function pxpdma_dostart_work()
is meaningless, since this function only can be called when
there is some pxp task in the head list, that is to say head
list is not empty.
Fancy Fang [Mon, 16 Dec 2013 02:55:04 +0000 (10:55 +0800)]
ENGR00292121 PXP: remove __u32 definition in pxp_dma.h
Remove the __u32 macro definition in pxp_dma.h. But include
<linux/types.h> in pxp_dma.h to make sure user application
which include pxp_dma.h to be compiled with no error.
Fancy Fang [Wed, 11 Dec 2013 10:48:44 +0000 (18:48 +0800)]
ENGR00291731 PXP: move pxp_irq_info definition from PXP dma to PXP device
struct pxp_irq_info is only used by PXP device driver, so it is unreasonable
to define it in pxp_dma.h which will be included by EPDC, V4L2 PXP and PXP
device driver.
Fancy Fang [Wed, 11 Dec 2013 10:21:10 +0000 (18:21 +0800)]
ENGR00291729 PXP: remove a mutex lock from pxp channel
This mutex lock is no longer necessary in PXP dma driver. After
the commit "ENGR00291400 PXP: Organize PXP task queue to be FIFO",
protection fields can be protected by the spin lock in PXP channel
now.
Fancy Fang [Wed, 11 Dec 2013 06:22:35 +0000 (14:22 +0800)]
ENGR00291658 PXP: allow PXP device users to submit multiple tasks before start PXP
After the commit "ffcad666548417ef21937e0a755d85ab922313a9" pushed,
adding this support in PXP device driver is also necessary. This
change allows users to submit more than one PXP tasks followd by
only one wait for finished ioctl. It means that users can wait for
more than one tasks done by calling one PXP_IOC_WAIT4CMPLT ioctl.
Fancy Fang [Mon, 9 Dec 2013 10:36:39 +0000 (18:36 +0800)]
ENGR00291400 PXP: Organize PXP task queue to be FIFO
The requested PXP tasks were handled based on channel unit. All the
tasks in one channel were handled one by one, and the tasks in another
channel only can get chance after all the tasks in previous channel
were finished. So this may allow some channel occupies PXP hardware
exclusively all the time, and other channels may never get PXP services.
So this change makes the PXP task queue to be a FIFO to avoid this kind
of unfair usage for PXP.
Liu Ying [Tue, 10 Dec 2013 09:28:09 +0000 (17:28 +0800)]
ENGR00291111 mxc vout:Restore when new config fails
Users may call VIDIOC_S_CTRL and VIDIOC_S_CROP ioctrls
to change rotation and cropping settings when streaming.
The driver should restore the original settings if new
configuration fails, otherwise, it might break the
present pipeline.
This patch fixes the issue which can be reproduced by
this test case with a 1080P HDMI primary display:
gplay Mpeg4_SP1_480x260_24_1200_aac_48_128_2_terminator3.mp4
Type 't' to set rotation to 90.
Fancy Fang [Wed, 4 Dec 2013 07:32:20 +0000 (15:32 +0800)]
ENGR00290664 PXP: allocate DMA TX descriptors on demand instead of in PXP initialization
In previous PXP driver, the number of tx descriptors allocated
for each channel is a constant 16 and they can only be allocated
during PXP initialization. But since the driver allows users to
queue more than one PXP tasks for each channel before issuing
pending tasks, so in this case the descriptors may be not enough
for some cases.
Fancy Fang [Wed, 4 Dec 2013 02:13:26 +0000 (10:13 +0800)]
ENGR00290613 PXP: add asynchronous multi instances support for PXP
Move PXP registers setting from pxp_issue_pending() to a seperate
kernel thread. This change will avoid the multi instances hang issues
solved in previous commits. And also the pxp users won't be blocked
when it call dma_async_issue_pending() function.
The downsizing ratio overflow check should cover every stripe
in the split mode. We need to do the overflow check correctly
by taking the width/height 8-pixel alignment requirement into
consideration since the alignment would be done when every
stripe is checked in it's own ipu task.
This patch takes a workaround for the issue which can be
reproduced by this unit test case:
Liu Ying [Wed, 4 Dec 2013 03:48:27 +0000 (11:48 +0800)]
ENGR00290635-2 IPUv3 stripe:Fix a build warning
This patch fixes the following build warning by
initializing some local variables:
drivers/mxc/ipu3/ipu_calc_stripes_sizes.c: In function ‘ipu_calc_stripes_sizes’:
drivers/mxc/ipu3/ipu_calc_stripes_sizes.c:393:3: warning: ‘difwr’ may be used uninitialized in this function [-Wuninitialized]
drivers/mxc/ipu3/ipu_calc_stripes_sizes.c:393:3: warning: ‘onw’ may be used uninitialized in this function [-Wuninitialized]
drivers/mxc/ipu3/ipu_calc_stripes_sizes.c:393:3: warning: ‘inw’ may be used uninitialized in this function [-Wuninitialized]
Liu Ying [Wed, 4 Dec 2013 03:26:12 +0000 (11:26 +0800)]
ENGR00290635-1 mxc vout:Fix a build warning
This patch fixes the following build warning by allocating
a block of virtual memory to cache an instance of the structure
mxc_vout_output instead of using the stack frame.
drivers/media/platform/mxc/output/mxc_vout.c: In function ‘mxc_vidioc_s_crop’:
drivers/media/platform/mxc/output/mxc_vout.c:1529:1: warning: the frame size of 1040 bytes is larger than 1024 bytes [-Wframe-larger-than=]
Liu Ying [Thu, 21 Nov 2013 08:39:08 +0000 (16:39 +0800)]
ENGR00290361-1 IPUv3 IC:Add check for a IDMAC errata
The IPUv3 IDMAC has a bug to read 32bpp pixels from a
graphics plane whose alpha component is at the most
significant 8 bits. The bug only impacts on cases in which
the relevant separate alpha channel is enabled.
This patch adds check for the errata so that the bad
cases won't be triggered.
Sandor Yu [Mon, 2 Dec 2013 07:40:46 +0000 (15:40 +0800)]
ENGR00290337 ipuv3: Setup pixel clock tree after ipu reset
When the ipu pixel clocks are initialized, the default pixel clock rate
will be calucated according to the present ipu register setting which
is likely set by a bootloader.
But these registers will be reset by the ipu reset function.
If the default pixel clock rate is the same to what is requested later,
the clk_set_rate function will treat this case as pixel clock unchanged.
Move the pixel clock setup function after the ipu reset function to
resolve this issue
Peter Chen [Tue, 26 Nov 2013 05:33:21 +0000 (13:33 +0800)]
ENGR00289645 usb: chipidea: udc: don't do hardware access if gadget has stopped
After _gadget_stop_activity is executed, we can consider the hardware
operation for gadget has finished, and the udc can be stopped and enter
low power mode. So, any later hardware operations (from usb_ep_ops APIs
or usb_gadget_ops APIs) should be considered invalid, any deinitializatons
has been covered at _gadget_stop_activity.
I meet this problem when I plug out usb cable from PC (using g_mass_storage),
my callstack like: vbus interrupt->.vbus_session->composite_disconnect
->pm_runtime_put_sync(&_gadget->dev), the composite_disconnect will
call fsg_disable, but fsg_disable calls usb_ep_disable using async way,
there are register accesses for usb_ep_disable. So sometimes, I get system
hang due to visit register without clock, sometimes not.
The Linux Kernel USB maintainer Alan Stern suggests this kinds of solution.
See: http://marc.info/?l=linux-usb&m=138541769810983&w=2.
Fancy Fang [Wed, 27 Nov 2013 08:41:38 +0000 (16:41 +0800)]
ENGR00289859 PXP: fix that multi users may access PXP hardware simultaneously
After the patch 6320ada11093ef0a4ded9065d6ae284a9129f7d6, there still exists
some cases that more than one user would set PXP hardware registers before the
previous task done. Now use another mutex lock to make sure that registers
settings can only happen when PXP hardware is idle.
Robby Cai [Tue, 26 Nov 2013 07:20:28 +0000 (15:20 +0800)]
ENGR00289648 mx6sl: v4l2 output: Add UYVY format as input format for v4l2
This feature is easy for gstreamer to pipeline v4lsrc and v4lsink, since
camera output format can be set as UYVY in v4l2 capture driver, and PxP
will do the CSC from UYVY to RGB565 in v4l2 output driver for LCD display.
Liu Ying [Mon, 25 Nov 2013 10:34:40 +0000 (18:34 +0800)]
ENGR00289553 IPU dev:correct downsize overflow check in rot case
In rotation cases, the width and height of IPUv3 IC scaling block's
output should align with the width and height of IPUv3 IC rotation
block. And, users only tell the IPUv3 device driver about the parameters
of scaling block's input and rotation block's output. So, we need to
swap the width and height of rotation block in cache before we do
downsize(a functionality of the scaling block) overflow check.
This patch fixes the issue which can be reproduced by this unit test case:
/unit_tests/mxc_v4l2_output.out -iw 128 -ih 128 -ow 176 -oh 10 -r 90
Oliver Brown [Fri, 22 Nov 2013 16:30:15 +0000 (10:30 -0600)]
ENGR00289436 - [V4L2 Capture] Build warning on mxc_v4l2_capture.c
Need to remove the following warning:
warning: array subscript is above array bounds
Summary of changes:
Moved MXC_SENSOR_NUM definition to mxc_v4l2_capture.h.
all_sensors[] now uses MXC_SENSOR_NUM in definition.
MXC_SENSOR_NUM is now used for bounds checking the array.
Signed-off-by: Oliver Brown <oliver.brown@freescale.com>
Oliver Brown [Mon, 18 Nov 2013 20:52:27 +0000 (14:52 -0600)]
ENGR00274166 - Split mode has artifacts
- Need to use different multiple and index parameters for vertical
and horizontal stripes
- Use correct multiple and index based upon pixel format
- Allow input crop and size to be larger than width by upto 16 pixels
Signed-off-by: Oliver Brown <oliver.brown@freescale.com>
Oliver Brown [Tue, 19 Nov 2013 15:49:53 +0000 (09:49 -0600)]
ENGR00272541 IPUv3 IC: Split Downsizing overflow for size greater than 1024
For downscaling, it is possible that downscaler output is greater
than 1024. Added a function, calc_split_resize_coeffs, based upon
_calc_resize_coeffs to calculate resizing and downscaling coefficients.
In ipu_ic.c, checks for the range of *_resize_ratio are no longer needed.
Non split cases will always have *_resize_ratio of zero.
In ipu_device, additional checks are needed to check for an error from
ipu_calc_stripes_sizes if calc_split_resize_coeffs fails.
Signed-off-by: Oliver Brown <oliver.brown@freescale.com>
The max timeout counter for uSDHC is SDCLK x (1 << 28), not as standard
controller defined as TMCLK x (1 <<27).
Add SDHCI_QUIRK2_NOSTD_TIMEOUT_COUNTER quirk to handle it.
ENGR00258885 flexcan: fix errata ERR005829 that MB may fail to be sent
This is an issue from IC errata ERR005829 which is described as follows:
----------------------------------------------------------
FlexCAN does not transmit a message that is enabled to be transmitted
in a specific moment during the arbitration process. The following
conditions are necessary to have the issue.
- Only one MB is configured to be transmitted
- The write which enables the MB to be transmitted (write on Control status
word) happens during a specific clock during the arbitration process.
After this arbitration process occurs, the bus goes to Idle state and no
new message is received on bus.
For example:
1) MB13 is deactivated on RxIntermission (write 0x0 on CODE field from Control
Status word) - First write on CODE
2) Reconfigure the ID and data fields
3) Enable the MB13 to be transmitted on BusIdle (write 0xC on Code
field) - Second write on code
4) CAN bus keeps in Idle state
5) No write on Control status from any MB happens.
During the second write on code (step 3), the write must happen one clock
before the current MB13 is to be scanned by arbitration process.
In this case, it does not detect the new code (0xC) and no new arbitration is
scheduled.
The suggested workaround which is implemented in this patch is:
The workaround consists of executing two extra steps:
6. Reserve the first valid mailbox as an inactive mailbox (CODE=0b1000).
If RX FIFO is disabled, this mailbox must be MB0. Otherwise, the first
valid mailbox can be found by using table "RX FIFO filters" on FlexCAN3 chapter.
7. Write twice INACTIVE code (0b1000) into the first valid mailbox.
Note: The first mailbox cannot be used for reception or transmission process.
-------------------------------------------------------------
Note: Although the currently flexcan driver does not have the step 1 to run,
it's also possible to meet this issue in theory because we can not predict
when the arbitration is scheduled.
With a modified can-utils/canfdttest tool simulating Pingpong test, we were
able to reproduce this issue after running a about one day.
After applying this patch, we ran six days and did not see the issue happen
again on two mx6q sabrelite boards.
Note: with a few minors change for new kernel and change errata id from
ERR005641 to ERR005829 which is the open one in freescale website.
Fancy Fang [Thu, 21 Nov 2013 11:44:45 +0000 (19:44 +0800)]
ENGR00289237 PXP: fix a multiple instances hang issue
In pxp_issue_pending(), the wait for pxp done processes will be woken up
together in PXP ISR. So there will be some situations that one process will
set PXP hardware registers after another process's setting but before the
first PXP task done. So the PXP hardware may be corrupted and hang maybe
happen.
Peter Chen [Thu, 21 Nov 2013 08:45:18 +0000 (16:45 +0800)]
ENGR00288578-8 usb: phy-mxs: do not set PWD.RXPWD1PT1 for low speed connection
At very rare cases, the SoF will not send out after resume with
low speed connection. The workaround is do not power down
PWD.RXPWD1PT1 bit during the suspend.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Peter Chen [Tue, 19 Nov 2013 02:38:55 +0000 (10:38 +0800)]
ENGR00288522 power: imx6-usb-charger: fix build error when build as module
It is a library, so it can't be built as a module, besides,
it uses anatop register, it should depends on imx6 soc series.
Below is the build error message it fixes:
CC [M] drivers/power/imx6_usb_charger.o
/home/b29397/work/projects/linux-2.6-imx/drivers/power/imx6_usb_charger.c:173:5: error: redefinition of 'imx6_usb_vbus_connect'
/home/b29397/work/projects/linux-2.6-imx/include/linux/power/imx6_usb_charger.h:70:5: note: previous definition of 'imx6_usb_vbus_connect' was here
/home/b29397/work/projects/linux-2.6-imx/drivers/power/imx6_usb_charger.c:200:5: error: redefinition of 'imx6_usb_charger_detect_post'
/home/b29397/work/projects/linux-2.6-imx/include/linux/power/imx6_usb_charger.h:74:5: note: previous definition of 'imx6_usb_charger_detect_post' was here
/home/b29397/work/projects/linux-2.6-imx/drivers/power/imx6_usb_charger.c:235:5: error: redefinition of 'imx6_usb_vbus_disconnect'
/home/b29397/work/projects/linux-2.6-imx/include/linux/power/imx6_usb_charger.h:65:5: note: previous definition of 'imx6_usb_vbus_disconnect' was here
/home/b29397/work/projects/linux-2.6-imx/drivers/power/imx6_usb_charger.c:256:5: error: redefinition of 'imx6_usb_create_charger'
/home/b29397/work/projects/linux-2.6-imx/include/linux/power/imx6_usb_charger.h:59:5: note: previous definition of 'imx6_usb_create_charger' was here
/home/b29397/work/projects/linux-2.6-imx/drivers/power/imx6_usb_charger.c:290:6: error: redefinition of 'imx6_usb_remove_charger'
/home/b29397/work/projects/linux-2.6-imx/include/linux/power/imx6_usb_charger.h:54:6: note: previous definition of 'imx6_usb_remove_charger' was here
make[3]: *** [drivers/power/imx6_usb_charger.o] Error 1
make[2]: *** [drivers/power] Error 2
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Fugang Duan [Thu, 21 Nov 2013 04:58:01 +0000 (12:58 +0800)]
ENGR00277698 net:fec: avoid kernel dump for skb page allocation fail
Fast reproduce steps:
1. set kernel parameter mem=500M, after kernel up, run below steps.
1. mount 10.192.225.224:/nfsroot /media/Videos/224nfsroot -t nfs
-o rw,nolock,addr=10.192.225.224
2. cd /media/Videos/224nfsroot/gst-sanity-test
3. ./linux_recording_sanity_test.sh recording_playback_cmd.txt
kernel dump:
--------------------------------------------------------------
Swap cache stats: add 0, delete 0, find 0/0
Free swap = 0kB
Total swap = 0kB
kswapd0: page allocation failure: order:0, mode:0x20
CPU: 0 PID: 54 Comm: kswapd0 Tainted: G W 3.10.17-16884-gc530ac0 #239
[<80013c4c>] (unwind_backtrace+0x0/0xf8) from [<80011704>] (show_stack+0x10/0x14)
[<80011704>] (show_stack+0x10/0x14) from [<8008bb7c>] (warn_alloc_failed+0xd0/0x114)
[<8008bb7c>] (warn_alloc_failed+0xd0/0x114) from [<8008e860>] (__alloc_pages_nodemask+0x5e0/0x8b8)
[<8008e860>] (__alloc_pages_nodemask+0x5e0/0x8b8) from [<804cceb8>] (__netdev_alloc_frag+0x9c/0x138)
[<804cceb8>] (__netdev_alloc_frag+0x9c/0x138) from [<804cddc4>] (__netdev_alloc_skb+0x40/0xe0)
[<804cddc4>] (__netdev_alloc_skb+0x40/0xe0) from [<8037dc8c>] (fec_enet_rx_napi+0x268/0x7e0)
[<8037dc8c>] (fec_enet_rx_napi+0x268/0x7e0) from [<804d7cf8>] (net_rx_action+0x94/0x160)
[<804d7cf8>] (net_rx_action+0x94/0x160) from [<8002c8fc>] (__do_softirq+0xe8/0x1d0)
[<8002c8fc>] (__do_softirq+0xe8/0x1d0) from [<8002ca8c>] (do_softirq+0x4c/0x58)
[<8002ca8c>] (do_softirq+0x4c/0x58) from [<8002ccf4>] (irq_exit+0x90/0xc8)
[<8002ccf4>] (irq_exit+0x90/0xc8) from [<8000ea88>] (handle_IRQ+0x3c/0x94)
[<8000ea88>] (handle_IRQ+0x3c/0x94) from [<8000855c>] (gic_handle_irq+0x28/0x5c)
[<8000855c>] (gic_handle_irq+0x28/0x5c) from [<8000de00>] (__irq_svc+0x40/0x50)
Exception stack(0xac21be08 to 0xac21be50)
be00: 80ca16f0000000000000bf280000bf2880ca16c8ac449c00
be20: 000006a4000000000000000000000000000003a40000000000000000ac21be50
be40: 800bf9e4805fc0d4600f0013ffffffff
[<8000de00>] (__irq_svc+0x40/0x50) from [<805fc0d4>] (_raw_spin_lock+0x38/0x3c)
[<805fc0d4>] (_raw_spin_lock+0x38/0x3c) from [<800bf9e4>] (put_super+0x18/0x3c)
[<800bf9e4>] (put_super+0x18/0x3c) from [<800c0968>] (prune_super+0x13c/0x17c)
[<800c0968>] (prune_super+0x13c/0x17c) from [<80093ff8>] (shrink_slab+0x88/0x218)
[<80093ff8>] (shrink_slab+0x88/0x218) from [<8009637c>] (kswapd+0x510/0x80c)
[<8009637c>] (kswapd+0x510/0x80c) from [<80042d64>] (kthread+0xa4/0xb0)
[<80042d64>] (kthread+0xa4/0xb0) from [<8000e258>] (ret_from_fork+0x14/0x3c)
--------------------------------------------------------------
Firstly, alloc_page() try to allocate page from pcp high speed cached page or
free_list by calling get_page_from_freelist(). If failed, and then use low
speed allocation mechanism by calling __alloc_pages_slowpath(), which may
allocate from reclaimed pages and kernel dump the memory allocate info.
Still don't find the root cause, this patch avoid the kernel dump
in temporarily.
Fancy Fang [Wed, 20 Nov 2013 02:25:45 +0000 (10:25 +0800)]
ENGR00285283 PXP: make pxp driver compatible for G2D
Use stride to set AS and PS pitch by default, if stride is 0, then use
width to set AS and PS pitch instead. This will make PXP driver both
work for PXP kernel users and G2D applications.
Fancy Fang [Mon, 21 Oct 2013 05:51:21 +0000 (13:51 +0800)]
ENGR00284411-1 PXP: Enhance YUV, alpha blend and rotation
Support YUV formats like: I420, NV12, NV21, UYVY,
YUYV, VYUY, YVYU, NV16, NV61 and YV12.
Support rotation in both stages before and after alpha blending.
The uSDHC has an ADMA Length Mismatch errata ERR004536 which may cause ADMA
work abnormally. The errata has already been fixed for i.MX6Q TO1.2
and i.MX6DL TO1.1 by enable the bit 7 in 0x6c register.
Unfortunately this fix is not included in i.MX6SL.
So we disable ADMA for i.MX6SL and use SDMA instead.
This commit adds a very basic registry of msi_chip structures, so that
an IRQ controller driver can register an msi_chip, and a PCIe host
controller can find it, based on a 'struct device_node'.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Thierry Reding [Fri, 9 Aug 2013 20:27:08 +0000 (22:27 +0200)]
PCI: Introduce new MSI chip infrastructure
The new struct msi_chip is used to associated an MSI controller with a
PCI bus. It is automatically handed down from the root to its children
during bus enumeration.
This patch provides default (weak) implementations for the architecture-
specific MSI functions (arch_setup_msi_irq(), arch_teardown_msi_irq()
and arch_msi_check_device()) which check if a PCI device's bus has an
attached MSI chip and forward the call appropriately.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Tested-by: Daniel Price <daniel.price@gmail.com> Tested-by: Thierry Reding <thierry.reding@gmail.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Jingoo Han [Fri, 6 Sep 2013 08:21:45 +0000 (17:21 +0900)]
PCI: exynos: Turn off power of phy block when link failed
When link failed, there is no need to turn on phy block. Also,
turning on phy block is added, in order to turn on phy block
regardless of the default value of phy registers.
Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
We are using DEV_TO_MEM for dma_map but MEM_TO_DEV for dma_unmap, thus fix it.
It also adds missing device pointer since assigning it to dma_free_coherent().
Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <b42378@freescale.com>
Peter Chen [Thu, 21 Mar 2013 06:56:17 +0000 (14:56 +0800)]
ENGR00255359 usb: core: notify disconnection when core detects disconnect
It is safe to call notify disconnect when the usb core
thinks the device is disconnected.
This commit also fixes one bug found at below situation:
we have not enabled usb wakeup, we do suspend when there
is an usb device at the port, after suspend, we plug out
the usb device, then plug in device again. At that time,
the nofity disconnect was not called at former code, as
the controller doesn't know the usb device was disconnected
during the suspend, but USB core knows, so to fix this problem,
let the usb core call notify disconnect.
Peter Chen [Thu, 14 Nov 2013 05:52:14 +0000 (13:52 +0800)]
ENGR00287992-1 power: imx6: add imx6 USB charger detection
Add imx6 USB charger detection, the vbus supplier will create and
remove struct usb_charger, and notify vbus connect and disconnect
event. The detail USB charger detection flow is at: "i.MX6 RM,
Chapter Universal Serial Bus 2.0 Integrated PHY (USB-PHY),
Charger detection, Charger detection software flow".
Since imx6 only has charger detection function, and no charging
current function is existed. It the user wants the detection abilities
from SoC, it can use this detection method
(add imx6-usb-charger-detection at dts). If the charger IC
already has USB charger detection function, and the user wants
to use the detection method from charger IC, please do not add
imx6-usb-charger-detection property at dts.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Robin Gong [Fri, 15 Nov 2013 10:29:03 +0000 (18:29 +0800)]
ENGR00288351 sabresd_battery: fix usb charger detect when resume back on mx6sl
Fix below redundant log after first resume back on mx6slevk:
max8903-charger max8903.12: USB Charger Connected
It's caused by not add enough prepare for uok&dok which are connected, such as
i.MX6SL-EVK. In this case the board only support DC charger detect, so we
didn't need judge the uok pin for USB charger detect, although uok share with
dok pin.
ENGR00279980 ubi: attach: do not return -EINVAL if the mtd->numeraseregions is 1
If the master mtd does not have any slave mtd partitions,
and its numeraseregions is one(only has one erease block), and
we attach the master mtd with : ubiattach -m 0 -d 0
We will meet the error:
-------------------------------------------------------
root@freescale ~$ ubiattach /dev/ubi_ctrl -m 0 -d 0
UBI: attaching mtd0 to ubi0
UBI error: io_init: multiple regions, not implemented
ubiattach: error!: cannot attach mtd0
error 22 (Invalid argument)
-------------------------------------------------------
In fact, if there is only one "erase block", we should not
prevent the attach.
Sandor Yu [Thu, 14 Nov 2013 08:48:42 +0000 (16:48 +0800)]
ENGR00288021 IPUv3 disp:get the integer part of div correctly
TV will show 639x480p60 when HDMI output 640x480p60.
The same issue can be found when pixel clock sources from ipu internally.
All video modes whose pixel clocks derive from DI clock work OK.
It is caused by the wrong parent clock rate the driver gets.
Fix the issue by getting the right parent clock(ipu->pixel_clk_sel).
Robin Gong [Thu, 14 Nov 2013 05:58:21 +0000 (13:58 +0800)]
ENGR00287983-2 imx restart: add another WDOG2 reset support for ldo-bypass
For ldo-bypass mode on i.MX6Q/DL sabresd board, we will use another WDOG2 to
reset external pmic to trigger POR event, rather than WDOG1 to trigger WDOG
event in ldo-enable mode. We need to consider it in common mxc_restart().
On i.MX6SL sabresd board we use WDOG1 to trigger WDOG event both ldo-bypass and
ldo-enable mode.
Nicolin Chen [Mon, 11 Nov 2013 08:31:22 +0000 (16:31 +0800)]
ENGR00286961-5 ASoC: fsl: set tdm slot number for imx-si476x
When using SSI I2S master mode, we need to decide the time slot number.
Because we use SSI normal mode to trick I2S signal, we here need to set
time slot number to two (left/right).
Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <b42378@freescale.com>
Nicolin Chen [Fri, 8 Nov 2013 08:26:25 +0000 (16:26 +0800)]
ENGR00286961-3 ARM: dtsi: imx6qdl: Use non-default value for audmux pinctrl
It's better to specify pinctrl value so that we can clearly know what the
exact configuration they are. Also, when we need to set pinctrl state from
another state to default one, it must be given the exact values of pinctrl.
And this patch also sets TXD iomux to PUE keep. This would force TXD pin not
to pull down its signal during an unused state so that it won't distort its
output signal during that state.
Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <b42378@freescale.com>
- EPDC firmware build was breaking due to binary build pre-empting
the conversion from .fw.ihex->.fw. Resolve this by forcing
firmware objects to be built in order.
The kernel panic is caused by the sg_buf is not set correctly with the
following code when compiled with Yocto GCC 4.8.1:
drivers/net/wireless/ath/ath6kl/hif.h:
struct hif_scatter_req {
struct list_head list;
/* address for the read/write operation */
u32 addr;
...
/* bounce buffer for upper layers to copy to/from */
u8 *virt_dma_buf;
struct hif_scatter_item scat_list[1];
u32 scat_q_depth;
};
(Note: the scat_req.scat_list[] will dynamiclly grow with run-time)
drivers/net/wireless/ath/ath6kl/sdio.c: ath6kl_sdio_setup_scat_data(...)
/* assemble SG list */
for (i = 0; i < scat_req->scat_entries; i++, sg++) {
ath6kl_dbg(ATH6KL_DBG_SCATTER, "%d: addr:0x%p, len:%d\n",
i, scat_req->scat_list[i].buf,
scat_req->scat_list[i].len);
The GCC 4.8.1 compiler will not do the for-loop till scat_entries, instead,
it only run one round loop. This may be caused by that the GCC 4.8.1 thought
that the scat_list only have one item and then no need to do full iteration,
but this is simply wrong by looking at the assebly code. This will cause the
sg buffer not get set when scat_entries > 1 and thus lead to kernel panic.
This patch is a workaround to the GCC 4.8.1 complier issue by passing the
entry address of the scat_req->scat_list to the for-loop and interate it,
then, GCC 4.8.1 will do the full for-loop correctly.
(Note: This issue not observed with GCC 4.7.2, only found on the GCC 4.8.1)
This patch does not change any function logic and no any performance downgrade.
Anson Huang [Fri, 8 Nov 2013 19:59:05 +0000 (14:59 -0500)]
ENGR00286960-2 arm: imx: improve status check of clock gate
For ccm clock gate, both 2b'11 and 2b'01 should be treated
as clock enabled, see below description in CCM:
2b'00: clock is off during all modes;
2b'01: clock is on in run mode, but off in wait and stop mode;
2b'10: Not applicable;
2b'11: clock is on during all modes, except stop mode.
Peter Chen [Sun, 29 Sep 2013 03:07:23 +0000 (11:07 +0800)]
ENGR00286426-20 usb: chipidea: host: add quirk for ehci operation
For chipidea controller, it does not follow ehci spec strictly.
Taking resume signal as an example, it will stop resume signal about
20-21ms later automatically, but standard ehci spec says, the resume
signal is controlled by software (clear portsc.PORT_RESUME).
This operation causes some remote wakeup problems for high speed
devices due to host controller does not send SOF in time since
software can't guarantee set run/stop bit in time (run/stop bit
was cleared at the ehci suspend routine).
When software sets run/stop bit, it needs 1 SoF time to make it effect.
If we close the PHY clock just after setting run/stop bit, it does
not be set in practice, so a software delay is needed.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Peter Chen [Tue, 22 Oct 2013 06:17:10 +0000 (14:17 +0800)]
ENGR00286426-16 usb: chipidea: usbmisc_imx: remove the controller's clock info
Currently, the usbmisc is just an API supplier for controller
driver, the controller calls related APIs to handle different
things among the SoCs, before calling it, the clock must
be on. So the clock operation is useless for usbmisc, it also
increases the difficulties to manage the clock, especially at
runtime power management situation.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
/drivers/usb/chipidea/host.c: In function 'host_start':
/drivers/usb/chipidea/host.c:67:6: error: 'struct ehci_hcd'
has no member named 'has_tdi_phy_lpm'
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Peter Chen [Tue, 17 Sep 2013 04:37:23 +0000 (12:37 +0800)]
usb: chipidea: imx: Add usb_phy_shutdown at probe's error path
If not, the PHY will be active even the controller is not in use.
We find this issue due to the PHY's clock refcount is not correct
due to -EPROBE_DEFER return after phy's init.
Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Peter Chen [Tue, 17 Sep 2013 04:37:20 +0000 (12:37 +0800)]
usb: chipidea: udc: fix the oops after rmmod gadget
When we rmmod gadget, the ci->driver needs to be cleared.
Otherwise, when we plug in usb cable again, the driver will
consider gadget is there, and go to enumeration procedure,
but in fact, it was removed.
Peter Chen [Tue, 17 Sep 2013 04:37:19 +0000 (12:37 +0800)]
usb: chipidea: udc: Consolidate the call of disconnect
The udc-core will call gadget's driver->disconnect, so we should avoid
calling gadget's disconnect again at ci_udc_stop in case the gadget's
unbind free some structs which is still used at gadget's disconnect.
Tested-by: Marek Vasut <marex@denx.de> Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
- Configure boot partition
Expose the interfaces that used to enable the configurations
of the boot mode of the eMMC cards.
usage how-to and examples:
Enable the boot partition 1 boot enabled.
"echo 8 > /sys/devices/soc0/soc.1/2100000.aips-bus/ 219c000.usdhc/mmc_host/mmc2/mmc2\:0001/boot_config"
In order to make sure that the re-read the ext-csd of card
can be completed successfully, add the method to wait for
the finish of the busy state.
- setup boot_info message output
Output bit means of important esd_csd register
Read esd_csd info each time when cat boot_info
becasue user may change config affect esd_csd
value.
- Boot partition access howto:
About the details, please refer to the guidance of
Documentation/mmc/mmc-dev-parts.txt
To enable write access to /dev/mmcblkXbootY, disable the forced
read-only access with:
echo 0 > /sys/block/mmcblkXbootY/force_ro
To re-enable read-only access:
echo 1 > /sys/block/mmcblkXbootY/force_ro
NOTE:
- The definitions of the EXT_CSD_PART_CONFIG and EXT_CSD_BOOT_BUS_WIDTH
+------------------------------------------------------------+
| Bit7 | Bit6 | Bit5 Bit4 Bit3 | Bit2 Bit1 Bit0 |
|------|----------|-----------------------|------------------|
| X | BOOT_ACK | BOOT_PARTITION_ENABLE | PARTITION_ACCESS |
+------------------------------------------------------------+
Bit7: Reserved
Bit6: always set to vaule '1' when boot_part is enabled
Bit[5:3]:
0x0 : Device not boot enabled (default)
0x1 : Boot partition 1 enabled for boot
0x2 : Boot partition 2 enabled for boot
0x7 : User area enabled for boot
Bit[2:0]:
0x0 : No access to boot partition (default)
0x1 : R/W boot partition 1
0x2 : R/W boot partition 2
+--------------------------------------------------------------------+
| Bit7 Bit6 Bit5 | Bit4 Bit3 | Bit2 | Bit1 Bit0 |
|----------------|----------------------------------|----------------|
| X | BOOT_MODE | RESET_BOOT_BUS_WIDTH | BOOT_BUS_WIDTH |
+--------------------------------------------------------------------+
Bit [4:3] : BOOT_MODE (non-volatile)
0x0 : Use single data rate + backward compatible timings in boot
operation (default)
0x1 : Use single data rate + high speed timings in boot operation mode
0x2 : Use dual data rate in boot operation
0x3 : Reserved
Bit [2]: RESET_BOOT_BUS_WIDTH (non-volatile)
0x0 : Reset bus width to x1, single data rate and backward compatible
timings after boot operation (default)
0x1 : Retain boot bus width and boot mode after boot operation
Bit[1:0] : BOOT_BUS_WIDTH (non-volatile)
0x0 : x1 (sdr) or x4 (ddr) bus width in boot operation mode (default)
0x1 : x4 (sdr/ddr) bus width in boot operation mode
0x2 : x8 (sdr/ddr) bus width in boot operation mode
0x3 : Reserved
- example of the boot_info:
boot_info:0x07;
ALT_BOOT_MODE:1 - Supports alternate boot method
DDR_BOOT_MODE:1 - Supports alternate dual data rate during boot
HS_BOOTMODE:1 - Supports high speed timing during boot
boot_size:2048KB
boot_partition:0x48;
BOOT_ACK:1 - Boot acknowledge sent during boot operation
BOOT_PARTITION-ENABLE: 1 - Boot partition 1 enabled
PARTITION_ACCESS:0 - No access to boot partition
boot_bus:0x00
BOOT_MODE:0 - Use single data rate + backward compatible timings
in boot operation
RESET_BOOT_BUS_WIDTH:0 - Reset bus width to x1, single data rate
and backwardcompatible timings after boot operation
BOOT_BUS_WIDTH:0 - x1 (sdr) or x4 (ddr) bus width in boot
operation mode
Xianzhong [Tue, 13 Aug 2013 15:16:24 +0000 (23:16 +0800)]
ENGR00274782 fixed gpu crash when baseAddress is not 0 or 2G
The baseAddress of contiguousVidMem is the actual physical address
which is not subtracted by gpu baseAddress, but the allocated physical address
has been subtracted by gpu baseAddress in gckVIDMEM_Lock,
so the invalid offset is produced and used to calculate the logical address.
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