Antoine Tenart [Sun, 18 May 2014 18:15:57 +0000 (20:15 +0200)]
ARM: dts: berlin: add the pinctrl node and muxing setup for uarts
Add pinctrl bindings and system control nodes to what we currently know
about Berlin SoCs. Where available, also set default pinctrl property
for uarts, when there is only one pinmux option for it.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Antoine Tenart [Mon, 5 May 2014 05:27:28 +0000 (07:27 +0200)]
dt-binding: ARM: add pinctrl binding docs for Marvell Berlin2 SoCs
Add pin control binding documentation to the SoC binding documentaion
as pinctrl is part of chip/system control registers. The documentation
also explains how to configure this group based controller.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
This converts Berlin BG2 SoC dtsi to make use of the new DT clock
nodes for Berlin SoCs. While at it, also fix up twdclk which is
running at cpuclk/3 instead of sysclk.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
dt-binding: ARM: add clock binding docs for Marvell Berlin2 SoCs
This adds mandatory device tree binding documentation for the clock related
IP found on Marvell Berlin2 (BG2, BG2CD, and BG2Q) SoCs to the Berlin SoC
binding documentation.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
ARM: dts: berlin: add scu and chipctrl device nodes for BG2/BG2Q
This adds scu and general purpose registers device nodes required for
SMP on Berlin BG2 and BG2Q SoCs. The secondary CPUs will pick their jump
address from general purpose (SW generic) register 1.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Antoine Tenart <antoine.tenart@free-electrons.com> Acked-by: Jisheng Zhang <jszhang@marvell.com> Tested-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Antoine Tenart [Tue, 18 Mar 2014 14:32:47 +0000 (15:32 +0100)]
ARM: dts: berlin: add the Marvell BG2-Q DMP device tree
Adds initial support for the Marvell BG2-Q DMP. The board has 2GB of
memory, an uart activated and what's initially supported by the Marvell
Armada 1500 pro dtsi.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Antoine Tenart [Tue, 18 Mar 2014 14:32:45 +0000 (15:32 +0100)]
ARM: dts: berlin: add the Marvell Armada 1500 pro
Adds initial support for the Marvell Armada 1500 pro (BG2Q) SoC (Berlin family).
The SoC has nodes for cpu, l2 cache controller, interrupt controllers, local
timer, apb timers and uarts for now. Also add corresponding binding documentation.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Reviewed-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Gavin Shan [Mon, 19 May 2014 03:06:46 +0000 (13:06 +1000)]
PCI: Wrong register used to check pending traffic
The incorrect register offset is passed to pci_wait_for_pending(), which is
caused by commit 157e876ffe ("PCI: Add pci_wait_for_pending() (refactor
pci_wait_for_pending_transaction())").
Beomho Seo [Mon, 19 May 2014 16:12:50 +0000 (01:12 +0900)]
ARM: dts: fix incorrect ak8975 compatible for exynos4412-trats2 board
This patch fixed incorrect compatible for ak8975 magnetic sensor.
ak8975 magnetic sensor use compatible "ak8975" or "asahi-kasei,ak8975"
In this patch, use "asahi-kasei,ak8975" according to dt bindings document.
Signed-off-by: Beomho Seo <beomho.seo@samsung.com> Signed-off-by: MyungJoo Ham <myungjoo.ham@samsung.com> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Vivek Gautam [Thu, 15 May 2014 21:38:15 +0000 (06:38 +0900)]
ARM: dts: Update DWC3 usb controller to use new phy driver for exynos5250
Removing the dt node for older usb3 phy driver from Exynos5250
device tree and updating the dt node for DWC3 controller to
use new phy driver based on generic phy framework.
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Rahul Sharma [Thu, 15 May 2014 20:23:16 +0000 (05:23 +0900)]
ARM: dts: change to correct compatible string for exynos5420 hdmi
Replace compatible string for HDMI node in Exynos5420. Since
latest restructring in Drm hdmi driver, it is agreed to use
a seperate compatible string for Exynos5420 HDMI IP siince it
uses APB mapped Phy.
Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com> Acked-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Alim Akhtar [Mon, 19 May 2014 13:15:08 +0000 (22:15 +0900)]
clk: exynos5420: Add 5800 specific clocks
Exynos5800 clock structure is mostly similar to 5420 with only
a small delta changes. So the 5420 clock file is re-used for
5800 also. The common clocks for both are seggreagated and few
clocks which are different for both are separately initialized.
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Arun Kumar K <arun.kk@samsung.com> Acked-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Tushar Behera [Mon, 19 May 2014 09:23:53 +0000 (14:53 +0530)]
ALSA: pcm_dmaengine: Add check during device suspend
Currently snd_dmaengine_pcm_trigger() calls dmaengine_pause()
unconditinally during device suspend. In case where DMA controller
doesn't support PAUSE/RESUME functionality, this call is not able
to stop the DMA controller. In this scenario, audio playback doesn't
resume after device resume.
Calling dmaengine_pause/dmaengine_terminate_all conditionally fixes
the issue.
It has been tested with audio playback on Samsung platform having
PL330 DMA controller which doesn't support PAUSE/RESUME.
David S. Miller [Mon, 19 May 2014 02:03:07 +0000 (19:03 -0700)]
Merge branch 'sparc_sparse_fixes'
Sam Ravnborg says:
====================
sparc sparse fixes + diverse cleanup
v1 => v2
- audit of all patches. I deliberately waited a while
before doing so - in order to look at them with fresh eyes.
- Fix bogus sbus() use found by davem in iommu.c
- Split patch touching iommu.c and io-unit.c in two
- Fix bogus sbus use in time_32 (sbus_readw => sbus_readl)
- Dropped patch that touches signal_64.c
__put_user() does many magic things and I could not convince
myself that dropping a cast of a pointer to (u64) was correct.
- Updated a few changelogs to be more precise/descriptive
- In systbls.h rearrange include and move include to the common part
- Updated cover letter (this mail)
Fix build breakage of sparc32 in certain configurations
Fix sparse warnings in sparc32.
What is remaining:
- "shift too big" warnings in the soft floating point code.
This is too complex - so I dropped trying to fix these
Fix sparse warnings in sparc64.
What is remaining:
- "shift too big" warnings in the soft floating point code (like sparc32)
- pcr.c defines arch_irq_work_raise() which is also defined as __weak in common code.
As I recall there are some issues with weak functions with prototypes
so it is left as-is
- signal32.c issue a lot of "cast removes address space of expression"
This actually deserve an extra look - as I think this may be
some code that mixes two sizes to __put_user()
- viohs.c uses a variable length array
- init_64.c reference vmemmap_free which is properly declared in common code
but seems to be guarded by wrong ifdefs
- signal_64.c mix with __user pointers and wrong casts
None of the remaining sparse warnings looks simple to fix - and any
hints how to proceed are appreciated.
A lot of the sparse warnings are fixed by addding or moving function
prototypes to common files. Many prototypes are for functions
solely called from assembler so they are added only to shut up sparse.
But there is also a lot of prototypes that had local declarations
which are now visible both in the file where the function
is defined and in the file where the function is used.
Change all prototypes in sparc .h files so they do not use extern.
This change touches a lot of files.
Fix so we no longer assumes _NIG_WORDS can have more than one value,
and add a build time check to catch if the value changes anyway.
**The following patches require extra careful review:**
[PATCH 07/34] sparc32: fix sparse warnings in sys_sparc_32.c
The return type of a few syscalls has been changed for sparc32,
to align with sparc64.
I assume this is safe to do.
[PATCH 08/34] sparc32: remove cast from output constraints in math asm statements
[PATCH 09/34] sparc64: remove cast from output constraints in math asm statements
I have not much experience with gcc inline
assembler - so please check that this looks OK.
A cast in the output section of the inline
assembler is dropped - which should be OK.
[PATCH 23/34] sparc64: clean up compat_sigset_t.seta handling
This drops code that assumed _NSIG_WORDS could change.
But as _NIG_WORDS are always constant drop this code.
[PATCH 34/34] sparc64: fix sparse warnings in int_64.c
Introduces some ugly ifdef in the code.
Was not sure if there was a smarter way to do this.
It looked like some code was executed in the
!CONFIG_NEED_MULTIPLE_NODES case which is not required.
For now the simple solution with ifdef was used.
**The following patches touches files outside arch/sparc:**
[PATCH 24/34] sparc64: fix sparse warning in tsb.c
Touches kernel/sysctl.c - removes a few sparc64 specific lines
[PATCH 27/34] sparc: fix sparse warnings in smp_32.c + smp_64.c
Adds prototype for setup_profiling_timer to include/linux/profile.h.
I could not find any obvious candidates to cc: on this patch
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
projects / karo-tx-linux.git / log