Lothar Waßmann [Thu, 14 Aug 2014 08:11:50 +0000 (10:11 +0200)]
karo: tx53: fix DDR_SEL value
The current value is inappropriate for DDR3.
When adding support for the HW rev. 3 of the TX53 module that has DDR3
instead of DDR2 memory, the values for both memory type were
erroneously swapped, so that after removing DDR2 support lateron, the
wrong value was kept.
Lothar Waßmann [Thu, 14 Aug 2014 12:17:09 +0000 (14:17 +0200)]
karo: tx53: clear persistent bits in lpgr upon boot
Print the contents of the SRTC_LPGR and clear it upon boot.
Also print a warning, if PERSIST_SECONDARY_BOOT is set, meaning that
the processor was booted using the secondary boot image.
Lothar Waßmann [Thu, 14 Aug 2014 11:33:41 +0000 (13:33 +0200)]
karo: tx53: add 'romupdate' command to update the U-Boot image in flash
Implement the romupdate command, that is already in use on TX28 and
TX6.
The command searches for a sufficiently large area without bad blocks
inside the u-boot (or any given other) partition and dynmaically
creates the FCB that is required to boot from flash.
It is also possible to write a redundant image, that will be used if
the first block of the normal image cannot be read due to ECC errors.
Lothar Waßmann [Thu, 14 Aug 2014 12:21:48 +0000 (14:21 +0200)]
karo: tx53: prevent boot failure do to bad blocks inside the U-Boot partition
Currently booting from NAND will fail, if the u-boot partition
contains any bad block, since the image_len in the IVT is set to the
u-boot partition size. Apparently the ROM code has a bug and does not
load the last block of a flash image when the block does not end on a
4KiB boundary. This leads to boot failures or random U-Boot crashes,
because the relocation table is most affected by this bug.
Workaround this by padding the image_len stored in the IVT to the next
4KiB boundary.
Lothar Waßmann [Fri, 8 Aug 2014 08:59:21 +0000 (10:59 +0200)]
karo: tx51: init pad settings for SDRAM and NAND
Make sure the padctrl settings for SDRAM and NAND are explicitly
configured from the DCD after soft reset.
Also reduce the DSE values for NAND and SDRAM control lines to
improve error margins in NAND detection and SDRAM stress test.
Lothar Waßmann [Thu, 26 Jun 2014 10:13:20 +0000 (12:13 +0200)]
board: tx48: add MMC init code
Up to now we relied on cpu_mmc_init() to initialize the MMC unit for
us. This had some major drawbacks:
- the default implementation doesn't use CD gpios, so that the driver
always assumes a card is present.
- the default implementation always initializes two MMC interfaces,
though the TX48 supports only one.
Properly initialize the CD GPIO and implement our own version of
cpu_mmc_init().
Lothar Waßmann [Thu, 26 Jun 2014 10:01:00 +0000 (12:01 +0200)]
mmc: omap_hsmmc: improve timeout checks in wait loops
restructure the timeout loops, so that after timing out the loop
condition is checked again. U-Boot is not a multitasking OS where this
would be essential, but this is a good habit anyway.
Lothar Waßmann [Thu, 26 Jun 2014 09:02:58 +0000 (11:02 +0200)]
mmc: omap_hsmmc: cleanup code
- remove useless return value from mmc_board_init()
- make mmc_board_init() static
- check dev_index in omap_mmc_init() before using it as array index
- don't setup NAND related pads when CONFIG_NAND_MXS is not defined
- initialize USDHC4 interface (internal eMMC) as mmc0
- enable all LDOs
- calculate DTB partition size and number of blocks in config.mk
- enable 'fat write' command
- disable GPT and EFI partitions
- setup 'fdtsave' command to write the dtb inside the boot partition
- interpret 'splashimage' env variable as DOS filename rather than
partition name
karo: tx6: lowlevel_init: various fixes for DDR calibration
- remove useless comments
- issue manual refresh cycle after disabling automatic refresh
- don't enable periodic ZQ calibration until after calibration is done
- remove redundant writes to MDMISC
- issue MRS commands to select MPR for both banks in case of multiple
SDRAM banks used
- combine check commands for completion and error bits
write calibration is not necessary due to the PCB layout and doesn't
work with the NT5CB128M16FP-DII chips that only use primary DQ lines
for signalling
karo: tx28: romupdate: rework, so u-boot can be stored in any partition - find contiguous space to fit the U-Boot image, so BB detection is not necessary for ROM code. - arbitrary partition names can be given for primary and secondary partition - remove optional number of FCB block copies, since FCB is stored in first block, that is alway good