Olof Johansson [Fri, 28 Jun 2013 00:04:57 +0000 (17:04 -0700)]
Merge branch 'next/late' into for-next
* next/late:
ARM: msm: Migrate to common clock framework
ARM: msm: Make proc_comm clock control into a platform driver
ARM: msm: Prepare clk_get() users in mach-msm for clock-pcom driver
ARM: msm: Remove clock-7x30.h include file
ARM: msm: Remove custom clk_set_{max,min}_rate() API
ARM: msm: Remove custom clk_set_flags() API
msm: iommu: Use clk_set_rate() instead of clk_set_min_rate()
msm: iommu: Convert to clk_prepare/unprepare
msm_sdcc: Convert to clk_prepare/unprepare
usb: otg: msm: Convert to clk_prepare/unprepare
msm_serial: Use devm_clk_get() and properly return errors
msm_serial: Convert to clk_prepare/unprepare
Olof Johansson [Fri, 28 Jun 2013 00:04:27 +0000 (17:04 -0700)]
Merge tag 'msm-clock-for-3.11b' of git://git.kernel.org/pub/scm/linux/kernel/git/davidb/linux-msm into next/late
From David Brown:
MSM clock updates for 3.11.
Per Stephen Boyd's coverletter:
Resending to collect higher level maintainer acks per Olof's request.
The plan is to push this patchset through MSM to the arm-soc tree.
This patchset moves the existing MSM clock code and affected drivers
to the common clock framework. A prerequisite of moving to the common
clock framework is to use clk_prepare() and clk_enable() so the first
few patches migrate drivers to that call (clk_prepare() is a no-op on
MSM right now). It also removes some custom clock APIs that MSM
provides and finally moves the proc_comm clock code to the common
struct clk.
This patch series will be used as the foundation of the MSM 8660/8960
clock code that I plan to send out after this series.
* tag 'msm-clock-for-3.11b' of git://git.kernel.org/pub/scm/linux/kernel/git/davidb/linux-msm:
ARM: msm: Migrate to common clock framework
ARM: msm: Make proc_comm clock control into a platform driver
ARM: msm: Prepare clk_get() users in mach-msm for clock-pcom driver
ARM: msm: Remove clock-7x30.h include file
ARM: msm: Remove custom clk_set_{max,min}_rate() API
ARM: msm: Remove custom clk_set_flags() API
msm: iommu: Use clk_set_rate() instead of clk_set_min_rate()
msm: iommu: Convert to clk_prepare/unprepare
msm_sdcc: Convert to clk_prepare/unprepare
usb: otg: msm: Convert to clk_prepare/unprepare
msm_serial: Use devm_clk_get() and properly return errors
msm_serial: Convert to clk_prepare/unprepare
Acked-by: Chris Ball <cjb@laptop.org> # for msm_sdcc.c Signed-off-by: Olof Johansson <olof@lixom.net>
Arnd Bergmann [Thu, 27 Jun 2013 13:09:52 +0000 (15:09 +0200)]
Merge tag 'davinci-for-v3.11/dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/late
From Sekhar Nori:
Device Tree updates for DaVinci
This patch set updates da850 DTS files to enable use of
C pre-processor. Also updates pinctrl-single DT data
to go with changes done in that module to enable a
single register to service configuration of multiple
pins.
* tag 'davinci-for-v3.11/dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: davinci: da850: adopt to pinctrl-single change for configuring multiple pins
ARM: davinci: da850: Use #include for all device trees
Arnd Bergmann [Thu, 27 Jun 2013 13:03:13 +0000 (15:03 +0200)]
Merge tag 'at91-fixes' of git://github.com/at91linux/linux-at91 into next/fixes-non-critical
From Nicolas Ferre:
Several fixes for:
- external irq on non-DT boards
- cpuidle code in some circumstances
- PMC code in relation with PLLB/PLL_UTMI/USB:
mainly for SAMA5D3 and AT91SAM9N12
* tag 'at91-fixes' of git://github.com/at91linux/linux-at91:
ARM: at91/PMC: use at91_usb_rate() for UTMI PLL
ARM: at91/PMC: fix at91sam9n12 USB FS init
ARM: at91/PMC: at91sam9n12 family has a PLLB
ARM: at91/PMC: sama5d3 family doesn't have a PLLB
ARM: at91: cpuidle: Fix target_residency
ARM: at91: fix at91_extern_irq usage for non-dt boards
Arnd Bergmann [Thu, 27 Jun 2013 12:26:33 +0000 (14:26 +0200)]
Merge tag 'renesas-sh-sci-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/late
Renesas sh-sci updates for v3.11
HSCIF support by Ulrich Hecht.
* tag 'renesas-sh-sci-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
serial: sh-sci: Initialise variables before access in sci_set_termios()
ARM: shmobile: r8a7790: don't use external clock for SCIFs
ARM: shmobile: r8a7790: HSCIF support
serial: sh-sci: HSCIF support
Linus Walleij [Tue, 25 Jun 2013 23:05:51 +0000 (01:05 +0200)]
ARM: integrator: let pciv3 use mem/premem from device tree
Instead of relying on the hard-coded mem/premem bases for
the PCI side, read in these from the device tree in the
DT probe path. Hard-code the old values on the non-DT probe
path. Introduce some static locals to hold these addresses
instead of the earlier static #defines.
Linus Walleij [Tue, 25 Jun 2013 23:05:38 +0000 (01:05 +0200)]
ARM: integrator: set local side PCI addresses right
This alters the local side address of the iospace to zero,
non prefetchable memory local side address to 0x00000000 and
prefetchable memory local side address to 0x10000000,
so as to match the values actually poked in by the driver.
Olof Johansson [Wed, 26 Jun 2013 01:36:05 +0000 (18:36 -0700)]
ARM: Make multi_v7_defconfig usable on hardware
This updates multi_v7_defconfig to boot on at least Tegra2 Seaboard and
Panda ES. I lack working hardware for most of the platforms that were
enabled to compare with, so I could only verify those two for now. Still,
I enabled all of the available ones for build coverage purposes.
Beyond base platforms, things like PRINTK_TIME, filesystems, MMC, USB,
INET and UNIX networking was enabled. I'm sure we'll keep adding more
over time, but this gets us off the ground for semi-regular boot testing.
Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
Arnd Bergmann [Wed, 26 Jun 2013 14:52:01 +0000 (16:52 +0200)]
Merge tag 'omap-pm-v3.11/fixes/omap5-voltdm' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm into next/soc
From Kevin Hilman:
OMAP5: PM: fix boot by removing unneeded dummy voltage domain data
* tag 'omap-pm-v3.11/fixes/omap5-voltdm' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm:
ARM: OMAP5: voltagedomain data: remove temporary OMAP4 voltage data
Nicolas Ferre [Mon, 24 Jun 2013 16:07:34 +0000 (18:07 +0200)]
ARM: at91/PMC: fix at91sam9n12 USB FS init
at91sam9n12 has Full-speed only USB. So we should add
it to the list in at91_pllb_usbfs_clock_init() function.
Moreover, at91sam9n12 has an unusual PMC in the sense that it
has a PLLB but also has a USB clock register.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Tested-by: Bo Shen <voice.shen@atmel.com>
Nicolas Ferre [Mon, 24 Jun 2013 10:04:55 +0000 (12:04 +0200)]
ARM: at91/DT: fix SPI compatibility string
In previous version of SPI driver we where using different compatibility stings
for finding SPI features. We are now using the IP revision information.
So we stay with the unique compatibility string for this driver:
"atmel,at91rm9200-spi".
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Tested-by: Wenyou Yang <wenyou.yang@atmel.com>
We are no longer restricted in that respect. Further, OPP voltage
information is supposed to be provided by dts information. This needs
to be added in future patches as various voltage modules are converted
to dts.
This also fixes the build breakage for voltagedomains54xx_data.c when just
OMAP5 SoC is enabled: https://patchwork.kernel.org/patch/2764191/
Reported-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Nishanth Menon <nm@ti.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Tony Lindgren <tony@atomide.com> Cc: linux-omap@vger.kernel.org Signed-off-by: Kevin Hilman <khilman@linaro.org>
Olof Johansson [Tue, 25 Jun 2013 20:43:28 +0000 (13:43 -0700)]
Merge branch 'sti/soc' into next/late
From Srinivas Kandagatla <srinivas.kandagatla@st.com>:
This patch-set adds basic support for STMicroelectronics STi series SOCs
which includes STiH415 and STiH416 with B2000 and B2020 board support.
STiH415 and STiH416 are dual-core ARM Cortex-A9 CPU, designed for
use in Set-top-boxes. The SOC support is available in mach-sti which
contains support code for STiH415, STiH416 SOCs including the generic
board support.
The reason for adding two SOCs at this patch set is to show that no new
C code is required for second SOC(STiH416) support.
* sti/soc:
ARM: stih41x: Add B2020 board support
ARM: stih41x: Add B2000 board support
ARM: sti: Add DEBUG_LL console support
ARM: sti: Add STiH416 SOC support
ARM: sti: Add STiH415 SOC support
Olof Johansson [Tue, 25 Jun 2013 20:36:09 +0000 (13:36 -0700)]
Merge branch 'nspire/soc' into next/late
From Daniel Tang <dt.tangr@gmail.com>
This is the initial platform code for the TI-Nspire graphing
calculators. The platform support is rather unspectacular, but still
contains platform data for the LCD panel, which will get removed once
there is a DT binding for the AMBA CLCD driver.
* nspire/soc:
arm: Add Initial TI-Nspire support
arm: Add device trees for TI-Nspire hardware
B2020 ADI board is reference board for STIH415/416 SOCs, it has 2 x
UART, 4x USB, 1 x Ethernet, 1 x SATA, 1 x PCIe, and 2GB RAM with
standard set-top box IPs.
This patch adds initial support to B2020 with STiH415/416 with SBC_UART1
as console and a heard beat LED.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> CC: Stephen Gallimore <stephen.gallimore@st.com> CC: Stuart Menefy <stuart.menefy@st.com> CC: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> Signed-off-by: Olof Johansson <olof@lixom.net>
The STiH415 is the next generation of HD, AVC set-top box processors for
satellite, cable, terrestrial and IP-STB markets. It is an ARM Cortex-A9
1.0 GHz, dual-core CPU.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> CC: Stephen Gallimore <stephen.gallimore@st.com> CC: Stuart Menefy <stuart.menefy@st.com> CC: Arnd Bergmann <arnd@arndb.de> CC: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Tue, 25 Jun 2013 18:20:15 +0000 (11:20 -0700)]
Merge tag 'ux500-dma40-for-arm-soc-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/drivers
From Linus Walleij:
DMA40 fixes for earlier submitted driver patches:
- Fix various error path and sparse bugs in the DMA40 driver
- Fix various compile errors in the ux500 crypto driver
(dependent on the DMA40 changes).
* tag 'ux500-dma40-for-arm-soc-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
crypto: ux500: use dmaengine_submit API
crypto: ux500: use dmaengine_prep_slave_sg API
crypto: ux500: use dmaengine_device_control API
crypto: ux500/crypt: add missing __iomem qualifiers
crypto: ux500/hash: add missing static qualifiers
crypto: ux500/hash: use readl on iomem addresses
dmaengine: ste_dma40: Declare memcpy config as static
dmaengine: ste_dma40: fix error return code in d40_probe()
Stephen Warren [Fri, 21 Jun 2013 22:39:07 +0000 (16:39 -0600)]
ARM: tegra: fix section mismatch in tegra_pmc_parse_dt
tegra_pmc_parse_dt() references __initconst data. Fix it to be __init.
This matches its only usage; a call from tegra_pmc_init() which is
already __init. This fixes:
WARNING: vmlinux.o(.text.unlikely+0x580): Section mismatch in reference
from the function tegra_pmc_parse_dt() to the (unknown reference)
.init.rodata:(unknown)
Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Tue, 25 Jun 2013 15:50:18 +0000 (08:50 -0700)]
Merge tag 'soc-exynos5420-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/late
From Kukjin Kim, this adds pinctrl support for Exynos 5420.
* tag 'soc-exynos5420-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
pinctrl: exynos: add exynos5420 SoC specific data
ARM: dts: add pinctrl support to EXYNOS5420
Stephen Boyd [Mon, 17 Jun 2013 17:43:19 +0000 (10:43 -0700)]
ARM: msm: Migrate to common clock framework
Move the existing clock code in mach-msm to the common clock
framework. We lose our capability to set the rate of and enable a
clock through debugfs. This is ok though because the debugfs
features are mainly used for testing and development of new clock
code.
To maintain compatibility with the original MSM clock code we
make a wrapper for clk_reset() that calls the struct msm_clk
specific reset function. This is necessary for the usb and sdcc
devices on MSM until a better suited API is made available.
Cc: Saravana Kannan <skannan@codeaurora.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
Stephen Boyd [Mon, 17 Jun 2013 17:43:18 +0000 (10:43 -0700)]
ARM: msm: Make proc_comm clock control into a platform driver
To move closer to the generic struct clock framework move the
proc_comm based clock code to a platform driver. The data
describing the struct clks still live in the devices-$ARCH file,
but the clock initialization is done at driver binding time.
Cc: Saravana Kannan <skannan@codeaurora.org> Reviewed-by: Pankaj Jangra <jangra.pankaj9@gmail.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
Stephen Boyd [Mon, 17 Jun 2013 17:43:17 +0000 (10:43 -0700)]
ARM: msm: Prepare clk_get() users in mach-msm for clock-pcom driver
In the near future we'll be moving clock-pcom to a platform
driver, in which case these two users of clk_get() in mach-msm
need to be updated. Have board-trout-panel.c make the proc_comm
call directly so that we don't have to port this board specific
code to the driver right now and reorder the initcall order of
dma.c so that it initializes after the clock driver probes but
before any drivers use dma APIs.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
Stephen Boyd [Mon, 17 Jun 2013 17:43:16 +0000 (10:43 -0700)]
ARM: msm: Remove clock-7x30.h include file
This file is not used outside of the two users in the clock-7x30
array. Those two clocks are virtual "source" clocks that don't
really need to exist outside of the clock driver. Let's remove
them from the array, since they're not doing anything anyway, and
then remove the clock-7x30.h include file along with it.
Cc: Saravana Kannan <skannan@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
Stephen Boyd [Mon, 17 Jun 2013 17:43:15 +0000 (10:43 -0700)]
ARM: msm: Remove custom clk_set_{max,min}_rate() API
There are no users of this API anymore so let's just remove it.
If a need arises in the future we can extend the common clock API
to handle it.
Acked-by: Saravana Kannan <skannan@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
Stephen Boyd [Mon, 17 Jun 2013 17:43:14 +0000 (10:43 -0700)]
ARM: msm: Remove custom clk_set_flags() API
Nobody is using this API upstream and it's just contributing
cruft. Remove it so the MSM clock API is closer to the generic
struct clock API.
Acked-by: Saravana Kannan <skannan@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
Stephen Boyd [Mon, 17 Jun 2013 17:43:13 +0000 (10:43 -0700)]
msm: iommu: Use clk_set_rate() instead of clk_set_min_rate()
Calling clk_set_min_rate() is no better than just calling
clk_set_rate() because MSM clock code already takes care of
calling the min_rate ops if the clock really needs
clk_set_min_rate() called on it.
Cc: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Joerg Roedel <joro@8bytes.org> Signed-off-by: David Brown <davidb@codeaurora.org>
Stephen Boyd [Mon, 17 Jun 2013 17:43:12 +0000 (10:43 -0700)]
msm: iommu: Convert to clk_prepare/unprepare
Add calls to clk_prepare and unprepare so that MSM can migrate to
the common clock framework. We never unprepare the clocks until
driver remove because the clocks are enabled and disabled in irq
context. Finer grained power management is possible in the future
via runtime power management techniques.
Cc: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Joerg Roedel <joro@8bytes.org> Signed-off-by: David Brown <davidb@codeaurora.org>
Stephen Boyd [Mon, 17 Jun 2013 17:43:09 +0000 (10:43 -0700)]
msm_serial: Use devm_clk_get() and properly return errors
Clocks are not clk_put() in this driver's error paths during
probe. The code that checks for clock errors also fails to
properly return the error code from the pclk member if it turns
out to be the failing clock, leading to potentially confusing
error values if the clk member is not an error pointer. Fix these
problems with devm_clk_get() and proper error checking.
Removing the clk_put() in msm_serial_remove() also points out
that msm_port is unused. Furthermore, msm_port is the wrong type
and so the clk_put() would be using the wrong pointer. Replace it
with the proper type and call uart_remove_one_port() to do the
proper cleanup.
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: David Brown <davidb@codeaurora.org>
Arnd Bergmann [Mon, 24 Jun 2013 14:46:23 +0000 (16:46 +0200)]
Merge tag 'davinci-for-v3.11/soc-2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/soc
From Sekhar Nori:
DaVinci SoC updates for v3.11 - part 2
This pull request adds DT and runtime PM to
EDMA ARM private API so it can be used on
DT enabled DaVinci and OMAP platforms.
Also adds DMA channel crossbar mapping
support to be used by DT-enabled platforms
which use it.
* tag 'davinci-for-v3.11/soc-2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
dmaengine: edma: enable build for AM33XX
ARM: edma: Add EDMA crossbar event mux support
ARM: edma: Add DT and runtime PM support to the private EDMA API
dmaengine: edma: Add TI EDMA device tree binding
ARM: edma: Convert to devm_* api
ARM: keystone: Move CPU bringup code to dedicated asm file
Because of inline asm usage in platsmp.c, smc instruction
creates build failure for ARM V6+V7 build where as using instruction
encoding for smc breaks the thumb2 build.
So move the code snippet to separate asm file and mark
it with 'armv7-a$(plus_sec)' to avoid any build issues.
Arnd Bergmann [Mon, 3 Jun 2013 13:38:58 +0000 (15:38 +0200)]
ARM: multiplatform: always pick one CPU type
With the new default platform code, we can always boot using DT
without requiring a board file, but we cannot build a kernel
unless we select at least one CPU core, which breaks some
"randconfig" builds.
This adapts the ARCH_MULTI_V4T and ARCH_MULTI_V5 options so we
always default to a common CPU core if no platform was enabled
that picks something else. The default we pick for ARMv4T is
ARM920T, while for ARMv5 we pick ARM926T.
Mohammed, Afzal [Mon, 24 Jun 2013 08:13:45 +0000 (08:13 +0000)]
ARM: OMAP2+: AM43x: resolve SMP related build error
If AM43x and SMP is selected, OMAP4 & OMAP5 deselected, build error as
follows,
arch/arm/mach-omap2/built-in.o: In function `scu_gp_set':
arch/arm/mach-omap2/sleep44xx.S:131: undefined reference to `omap4_get_scu_base'
arch/arm/mach-omap2/sleep44xx.S:132: undefined reference to `scu_power_mode'
arch/arm/mach-omap2/built-in.o: In function `scu_gp_clear':
arch/arm/mach-omap2/sleep44xx.S:227: undefined reference to `omap4_get_scu_base'
arch/arm/mach-omap2/sleep44xx.S:229: undefined reference to `scu_power_mode'
Resolve it by building sleep44xx.S only for OMAP4 & OMAP5.
Signed-off-by: Afzal Mohammed <afzal@ti.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 3 Jun 2013 13:57:31 +0000 (15:57 +0200)]
ARM: mxs: don't select HAVE_PWM
The HAVE_PWM symbol is only for legacy platforms that provide
the PWM API without using the generic framework. MXS actually
uses that framework, and selecting the symbol anyway might
cause build errors like
drivers/built-in.o: In function `pwm_beeper_resume':
:(.text+0x1f4fc0): undefined reference to `pwm_config'
:(.text+0x1f4fc8): undefined reference to `pwm_enable'
drivers/built-in.o: In function `pwm_beeper_suspend':
:(.text+0x1f4ffc): undefined reference to `pwm_disable'
Arnd Bergmann [Mon, 3 Jun 2013 14:00:22 +0000 (16:00 +0200)]
ARM: mxs: stub out mxs_pm_init for !CONFIG_PM
When building a kernel without CONFIG_PM, we get a link
error from referencing mxs_pm_init in the machine
descriptor. This defines a macro to NULL for that case.
Like other ARM specific drivers, this one requires ARM_CPU_SUSPEND,
as shown by this linker error:
drivers/built-in.o: In function `calxeda_pwrdown_idle':
drivers/cpuidle/cpuidle-calxeda.c:84: undefined reference to `cpu_suspend'
drivers/cpuidle/cpuidle-calxeda.c:86: undefined reference to `cpu_resume'
Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Rafael J. Wysocki <rjw@sisk.pl> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: linux-pm@vger.kernel.org
Fabio Baltieri [Thu, 20 Jun 2013 09:17:39 +0000 (11:17 +0200)]
dmaengine: ste_dma40: Declare memcpy config as static
Fix sparse warnings:
drivers/dma/ste_dma40.c:81:26: warning: symbol 'dma40_memcpy_conf_phy' was not declared. Should it be static?
drivers/dma/ste_dma40.c:95:26: warning: symbol 'dma40_memcpy_conf_log' was not declared. Should it be static?
Matt Porter [Thu, 20 Jun 2013 21:06:40 +0000 (16:06 -0500)]
dmaengine: edma: enable build for AM33XX
Enable TI EDMA option on OMAP and TI_PRIV_EDMA
Signed-off-by: Matt Porter <mporter@ti.com> Signed-off-by: Joel A Fernandes <joelagnel@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Matt Porter [Thu, 20 Jun 2013 21:06:39 +0000 (16:06 -0500)]
ARM: edma: Add EDMA crossbar event mux support
EDMA supports a cross bar which provides ability
to mux additional events into physical channels
present in the channel controller.
This is required when the number of events present
in the system are more than number of available
physical channels.
Changes by Joel:
* Split EDMA xbar support out of original EDMA DT parsing patch
to keep it easier for review.
* Rewrite shift and offset calculation.
Suggested-by: Sekhar Nori <nsekhar@ti.com>
Suggested by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Joel A Fernandes <joelagnel@ti.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
[nsekhar@ti.com: fix checkpatch errors and a minor coding improvement] Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Matt Porter [Thu, 20 Jun 2013 21:06:38 +0000 (16:06 -0500)]
ARM: edma: Add DT and runtime PM support to the private EDMA API
Adds support for parsing the TI EDMA DT data into the required EDMA
private API platform data. Enables runtime PM support to initialize
the EDMA hwmod. Enables build on OMAP.
Changes by Joel:
* Setup default one-to-one mapping for queue_priority and queue_tc
mapping as discussed in [1].
* Split out xbar stuff to separate patch. [1]
* Dropped unused DT helper to convert to array
* Fixed dangling pointer issue with Sekhar's changes
Signed-off-by: Matt Porter <mporter@ti.com>
[nsekhar@ti.com: fix checkpatch errors, build breakages. Introduce
edma_setup_info_from_dt() as part of that effort] Signed-off-by: Joel A Fernandes <joelagnel@ti.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Matt Porter [Thu, 20 Jun 2013 21:06:37 +0000 (16:06 -0500)]
dmaengine: edma: Add TI EDMA device tree binding
The binding definition is based on the generic DMA controller
binding.
Joel:
* Droped reserved and queue DT entries from Documentation
for now from the original patch series (v10)
* Included properties in Documentation and clarified DMA properties (V11)
* Made ti,hwmod option
* Clarified DMA entries
Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Matt Porter <mporter@ti.com> Signed-off-by: Joel A Fernandes <joelagnel@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Ezequiel Garcia [Sat, 22 Jun 2013 16:52:27 +0000 (13:52 -0300)]
ARM: mvebu: fix length of ethernet registers in mv78260 dtsi
The length of the registers area for the Marvell 370/XP Ethernet controller
was incorrect in the .dtsi: 0x2500, while it should have been 0x4000.
This problem wasn't noticed because there used to be a static mapping for
all the MMIO register region set up by ->map_io().
The register length was fixed in all the other device tree files,
except from the armada-xp-mv78260.dtsi, in the following commit:
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* tag 'dt-3.11-6' of git://git.infradead.org/users/jcooper/linux:
ARM: Kirkwood: Fix the internal register ranges translation
arm: mvebu: enable mini-PCIe connectors on Armada 370 RD
Ezequiel Garcia [Tue, 18 Jun 2013 15:31:19 +0000 (12:31 -0300)]
ARM: Kirkwood: Fix the internal register ranges translation
Although the internal register window size is 1 MiB, the previous
ranges translation for the internal register space had a size of
0x4000000. This was done to allow the crypto and nand node to access
the corresponding 'sram' and 'nand' decoding windows.
In order to describe the hardware more accurately, we declare the
real 1 MiB internal register space in the ranges, and add a translation
entry for the nand node to access the 'nand' window.
This commit will make future improvements on the MBus DT binding easier.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
ARM: at91: Consolidate time keeping and irq enable
Enable core cpuidle timekeeping and irq enabling and remove that
handling from this code.
introduced an additional zero to the state1 (suspend) target residency.
With a periodic tick, the cpu never enters the state1 with both 10000 and
100000.
With a tickless system, it enters to state1 much more often with the
initial value, roughly x7 more.
Fix it by setting the value to 10ms again.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
[nicola.ferre@atmel.com: add precisions given by Daniel to commit message] Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>