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11 years agoRevert "ENGR00139261 [MX6Q]support 8 bit MMC and eMMC DDR mode"
Jason Liu [Wed, 14 Dec 2011 11:40:23 +0000 (19:40 +0800)]
Revert "ENGR00139261 [MX6Q]support 8 bit MMC and eMMC DDR mode"

This reverts commit bcc0edfb10bfd8ab2974b0cf108490be72281146.

Conflicts:

drivers/mmc/host/sdhci-esdhc-imx.c
drivers/mmc/host/sdhci.h

Signed-off-by: Jason Liu <jason.hui@linaro.org>
11 years agoRevert "ENGR00155612-3 [mx6q]add delay after cmd6 for eMMC compatibility"
Jason Liu [Wed, 14 Dec 2011 11:36:46 +0000 (19:36 +0800)]
Revert "ENGR00155612-3 [mx6q]add delay after cmd6 for eMMC compatibility"

This reverts commit dee9bc3d9c98bc45ad42960a6650dffc66140d19.

11 years agofix build error
Jason Liu [Wed, 14 Dec 2011 10:49:30 +0000 (18:49 +0800)]
fix build error

Signed-off-by: Jason Liu <jason.hui@linaro.org>
11 years agoENGR00170005: Enable DVFS-CORE at boot
Ranjani Vaidyanathan [Sun, 11 Dec 2011 06:12:37 +0000 (00:12 -0600)]
ENGR00170005: Enable DVFS-CORE at boot

DVFS-CORE should be enabled at boot by default.

Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
11 years agoENGR00169891 v4l2 capture: avoid streamon with only one buffer queued
Xinyu Chen [Fri, 9 Dec 2011 06:47:57 +0000 (14:47 +0800)]
ENGR00169891 v4l2 capture: avoid streamon with only one buffer queued

If user space only queue one buffer into ready list, and
call streamon, camera csi enc ISR will crash.
Since for CSI ENC, the ping pong buffer is initilized without
checking ready buffer on streamon.
The second buffer will be wrongly in cam_data struct, and causes
DMA fill buffers into cam_data global variable.
Here just add one sanity check for ready buffer.

Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
11 years agoENGR00162729 MX6 ESAI: To reset the codec before initing a stream playbacking
Lionel Xu [Fri, 9 Dec 2011 06:25:53 +0000 (14:25 +0800)]
ENGR00162729 MX6 ESAI: To reset the codec before initing a stream playbacking

Sometimes there is no sound after starting a stream playbacking, this problem
can be resolved by resetting external codec at the beginning of startup.

Signed-off-by: Lionel Xu <R63889@freescale.com>
11 years agoENGR00162181-4 MX6Q/GPMI : only decrease the DMA clock when GPMI is enabled.
Huang Shijie [Fri, 9 Dec 2011 07:13:56 +0000 (15:13 +0800)]
ENGR00162181-4 MX6Q/GPMI : only decrease the DMA clock when GPMI is enabled.

Do not decrease the DMA clock if GPMI is not enabled.
just for workaround.

Signed-off-by: Huang Shijie <b32955@freescale.com>
11 years agoENGR00162181-3 MX6Q/GPMI : decrease the DMA clock from 200M to 11M
Huang Shijie [Wed, 7 Dec 2011 07:18:25 +0000 (15:18 +0800)]
ENGR00162181-3 MX6Q/GPMI : decrease the DMA clock from 200M to 11M

This is just a workaroud for the DMA timeout.

Signed-off-by: Huang Shijie <b32955@freescale.com>
11 years agoENGR00162181-2 GPMI : select the MXS-DMA and MTD_CHAR
Huang Shijie [Tue, 6 Dec 2011 09:24:29 +0000 (17:24 +0800)]
ENGR00162181-2 GPMI : select the MXS-DMA and MTD_CHAR

select the MXS-DMA and MTD_CHAR macros.
The gpmi driver needs them to be enabled.

Signed-off-by: Huang Shijie <b32955@freescale.com>
11 years agoENGR00162181-1 MX6Q/GPMI : init the GPMI block
Huang Shijie [Tue, 6 Dec 2011 06:56:00 +0000 (14:56 +0800)]
ENGR00162181-1 MX6Q/GPMI : init the GPMI block

The GPMI block SHOULD be initialized when the system starts.

Signed-off-by: Huang Shijie <b32955@freescale.com>
11 years agoENGR00156855 [mx6q arm2] HDMI EDID read failed
Sandor Yu [Thu, 8 Dec 2011 06:35:13 +0000 (14:35 +0800)]
ENGR00156855 [mx6q arm2] HDMI EDID read failed

It cause by some HDMI sink device not support I2C 400kbps access.
Change EDID I2C speed from 400kbps to 100bps.

Signed-off-by: Sandor Yu <R01008@freescale.com>
11 years agoENGR00163052: CPUFREQ does not report correct frequency
Ranjani Vaidyanathan [Tue, 6 Dec 2011 18:27:18 +0000 (12:27 -0600)]
ENGR00163052: CPUFREQ does not report correct frequency

When DVFS_CORE is enabled, the following command reports incorrect frequency:
cat /sys/devices/system/cpu/cpu0/cpufreq/scaling_cur_freq

Fix this by ensuring the CPUFREQ does not change the frequency
when DVFS_CORE is active. And DVFS-CORE informs CPUFREQ of the
change done to CPU frequency.

Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
11 years agoENGR00169782 [MX6Q]: Add new AR6003 driver to 2.6.38, replacing staging one
Ryan QIAN [Thu, 8 Dec 2011 05:38:33 +0000 (13:38 +0800)]
ENGR00169782 [MX6Q]: Add new AR6003 driver to 2.6.38, replacing staging one

- remove the staging driver from default config of MX6

Signed-off-by: Ryan QIAN <b32804@freescale.com>
11 years agoENGR00169764 fix linux-2.6.38 kernel build error.
Liu Xiaowen [Thu, 8 Dec 2011 03:05:38 +0000 (11:05 +0800)]
ENGR00169764 fix linux-2.6.38 kernel build error.

fix linux-2.6.38 kernel build error.

Signed-off-by: Liu Xiaowen <b37945@freescale.com>
11 years agoENGR00162655 MX6 Sabre-lite SATA support
Mahesh Mahadevan [Tue, 6 Dec 2011 16:40:41 +0000 (10:40 -0600)]
ENGR00162655 MX6 Sabre-lite SATA support

Add support for MX6 Sabre-lite board

Signed-off-by: Mahesh Mahadevan <r9aadq@freescale.com>
11 years agoENGR00162797 SSI: add I2S mode for stereo playback
Gary Zhang [Wed, 7 Dec 2011 06:46:54 +0000 (14:46 +0800)]
ENGR00162797 SSI: add I2S mode for stereo playback

Former stereo playback uses network mode which does not
suppot 24bit format well.
Add I2S mode to do the same manner with codec.

Signed-off-by: Gary Zhang <b13634@freescale.com>
11 years agoENGR00169661:Remove the discharge for VBUS and DP
Tony LIU [Wed, 7 Dec 2011 09:06:22 +0000 (17:06 +0800)]
ENGR00169661:Remove the discharge for VBUS and DP

header file

- remove the definition of discharge dp
Signed-off-by: Tony LIU <junjie.liu@freescale.com>
11 years agoENGR00169661:Remove the discharge for VBUS and DP
Tony LIU [Wed, 7 Dec 2011 09:04:16 +0000 (17:04 +0800)]
ENGR00169661:Remove the discharge for VBUS and DP

MSL part

-remove the implementation of discharge DP

Signed-off-by: Tony LIU <junjie.liu@freescale.com>
11 years agoENGR00169661:Remove the discharge for VBUS and DP
Tony LIU [Wed, 7 Dec 2011 05:31:35 +0000 (13:31 +0800)]
ENGR00169661:Remove the discharge for VBUS and DP

- VBUS discharge code should be removed from suspend_irq function
- On Arik, there is a huge capacitance(C86), even discharge VBUS,
  the Drop of VBUS is still very slow
- On Arik, the B session valid threshold is not 0.8V or 1.4V, it is
  about 2V~3V, so we can receive B session valid interrupt very soon
- No DP discharge needed, but wait for SE0 is needed
Signed-off-by: Tony LIU <junjie.liu@freescale.com>
11 years agoENGR00169657 mxc_edid: no aspect vmode setting for detailed timing block
Jason Chen [Wed, 7 Dec 2011 02:22:57 +0000 (10:22 +0800)]
ENGR00169657 mxc_edid: no aspect vmode setting for detailed timing block

Add aspect ratio setting into vmode for detailed timing block.

Signed-off-by: Jason Chen <b02280@freescale.com>
11 years agoENGR00161867 MX6Q: change CONFIG_FORCE_MAX_ZONEORDER from 13 to 14
Wayne Zou [Wed, 7 Dec 2011 05:40:55 +0000 (13:40 +0800)]
ENGR00161867 MX6Q: change CONFIG_FORCE_MAX_ZONEORDER from 13 to 14

Fix the bug: can't allocate buffer if setting resolution to 1920*1080p

Bug detailed description:
use 1920,1080 output resolution
mxc_sdc_fb mxc_sdc_fb.0: Unable to allocate framebuffer memory

Signed-off-by: Wayne Zou <b36644@freescale.com>
11 years agoENGR00163669-3 mipi_dsi: Add blank/unblank support for mipi dsi display
Wayne Zou [Thu, 1 Dec 2011 11:56:27 +0000 (19:56 +0800)]
ENGR00163669-3 mipi_dsi: Add blank/unblank support for mipi dsi display

mipi_dsi: Add blank/unblank support for mipi dsi display

Signed-off-by: Wayne Zou <b36644@freescale.com>
11 years agoENGR00163669-2 mx6q mipi_dsi: Add support for mipi dsi display
Wayne Zou [Thu, 1 Dec 2011 11:54:06 +0000 (19:54 +0800)]
ENGR00163669-2 mx6q mipi_dsi: Add support for mipi dsi display

mx6q mipi_dsi: support for mipi dsi display

Signed-off-by: Wayne Zou <b36644@freescale.com>
11 years agoENGR00163669-1 mxc fb: remove FB_EVENT_PREMODE_CHANGE for mxc fb drivers
Wayne Zou [Thu, 1 Dec 2011 11:52:39 +0000 (19:52 +0800)]
ENGR00163669-1 mxc fb: remove FB_EVENT_PREMODE_CHANGE for mxc fb drivers

remove FB_EVENT_PREMODE_CHANGE for mxc ldb/tve drivers
add dispdrv setup interface for ldb/tve drivers
re-structure the dispdrv framework for display devices

Signed-off-by: Wayne Zou <b36644@freescale.com>
11 years agoENGR00169509-2 ipuv3 fb: change wait for vsync ioctl irq from eof to nfack
Jason Chen [Tue, 6 Dec 2011 06:01:34 +0000 (14:01 +0800)]
ENGR00169509-2 ipuv3 fb: change wait for vsync ioctl irq from eof to nfack

change wait for vsync ioctl irq from eof to nfack

Signed-off-by: Jason Chen <b02280@freescale.com>
11 years agoENGR00169509-1 ipuv3 fb: change wait for vsync ioctl irq from eof to nfack
Jason Chen [Tue, 6 Dec 2011 06:01:16 +0000 (14:01 +0800)]
ENGR00169509-1 ipuv3 fb: change wait for vsync ioctl irq from eof to nfack

change wait for vsync ioctl irq from eof to nfack

Signed-off-by: Jason Chen <b02280@freescale.com>
11 years agoENGR00169433 IMX/UART : fix a bug in UART RX
Huang Shijie [Mon, 5 Dec 2011 10:53:47 +0000 (18:53 +0800)]
ENGR00169433 IMX/UART : fix a bug in UART RX

The origin code did not check the running situation.
It will cause a NULL pointer issue.

This patch fixes it.

Signed-off-by: Huang Shijie <b32955@freescale.com>
11 years agoENGR00169402 IMX/UART : do optimization for UART TX
Huang Shijie [Mon, 5 Dec 2011 07:18:11 +0000 (15:18 +0800)]
ENGR00169402 IMX/UART : do optimization for UART TX

The original code will copy the upper layer's data to its
own buffer. But this is not necessary.

Map the upper layer's buffer directly to DMA's scatterlist.
This will enhance the performance of UART TX.

Signed-off-by: Huang Shijie <b32955@freescale.com>
11 years agoENGR00169390 merge ov5642 performance optimization into ics kernel.
Liu Xiaowen [Mon, 5 Dec 2011 05:48:35 +0000 (13:48 +0800)]
ENGR00169390 merge ov5642 performance optimization into ics kernel.

merge ov5642 performance optimization into ics kernel.

Signed-off-by: Liu Xiaowen <b37945@freescale.com>
11 years agoENGR00169387 add user space memory allocation for v4l2.
Liu Xiaowen [Mon, 5 Dec 2011 05:45:25 +0000 (13:45 +0800)]
ENGR00169387 add user space memory allocation for v4l2.

add user space memory allocation for kernel v4l2 interface in ics.

Signed-off-by: Liu Xiaowen <b37945@freescale.com>
11 years agoENGR00163699-2 MX6Q: Add OV8820 mipi camera driver
Even Xu [Fri, 2 Dec 2011 03:32:42 +0000 (11:32 +0800)]
ENGR00163699-2 MX6Q: Add OV8820 mipi camera driver

This sensor just for MIPI CSI2 4 lanes validation
1. Support 4 lanes
2. Only support 480X480 Resolution
3. Only support RAW output format

Signed-off-by: Even Xu <b21019@freescale.com>
11 years agoENGR00163699-1 MX6Q: Add more mipi csi2 supported datatype
Even Xu [Fri, 2 Dec 2011 03:31:04 +0000 (11:31 +0800)]
ENGR00163699-1 MX6Q: Add more mipi csi2 supported datatype

Add more mipi csi2 supported datatype.

Signed-off-by: Even Xu <b21019@freescale.com>
11 years agoENGR00169388-3 IMX/UART : fix the compiling error
Huang Shijie [Mon, 5 Dec 2011 05:54:37 +0000 (13:54 +0800)]
ENGR00169388-3 IMX/UART : fix the compiling error

use the platformdata to fix the compiling error.

We save the DMA RX/TX request numbers in the platformdata.

Signed-off-by: Huang Shijie <b32955@freescale.com>
11 years agoENGR00169388-2 MX6Q/UART : fill DMA fields for the platformdata of mx6q
Huang Shijie [Mon, 5 Dec 2011 05:54:19 +0000 (13:54 +0800)]
ENGR00169388-2 MX6Q/UART : fill DMA fields for the platformdata of mx6q

fill the DMA RX/TX fields for mx6q board.

Signed-off-by: Huang Shijie <b32955@freescale.com>
11 years agoENGR00169388-1 IMX/UART : add DMA fields for platform data
Huang Shijie [Mon, 5 Dec 2011 05:53:55 +0000 (13:53 +0800)]
ENGR00169388-1 IMX/UART : add DMA fields for platform data

add two fields for DMA RX and DMA TX.

Signed-off-by: Huang Shijie <b32955@freescale.com>
11 years agoENGR00163719 Upgrade to 4.6.3
Loren Huang [Fri, 2 Dec 2011 09:06:39 +0000 (17:06 +0800)]
ENGR00163719 Upgrade to 4.6.3

Signed-off-by: Loren Huang <b02279@freescale.com>
Acked-by: Lily Zhang
11 years agoENGR00163703 uart: console write routing is unsafe on SMP
Xinyu Chen [Fri, 2 Dec 2011 06:38:21 +0000 (14:38 +0800)]
ENGR00163703 uart: console write routing is unsafe on SMP

The console feature's write routing is unsafe on SMP with
the startup/shutdown call. It happend to cause Android bootup
without shell runnable.

Actually on Android boot, there's 3 consumers of the console
* the kernel printk
* the init process using /dev/kmsg to call printk to show log
* shell, which open /dev/console and write with sys_write()

The shell goes into the normal uart open/write routing,
but the other two go into the console operations.
The open routing calls imx serial startup, which will write USR1/2
register without any lock and critical with imx_console_write call.

Here add spin_lock for startup/shutdown/console_write routing.
Remove the imx_setup_ufcr() call on startup when CONSOLE enabled,
as this will cause clock reinit, and output garbage.

Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
11 years agoENGR00163603-4 MX6Q SDMA firmware : fix a bug in the UART receiving.
Huang Shijie [Mon, 28 Nov 2011 09:50:11 +0000 (17:50 +0800)]
ENGR00163603-4 MX6Q SDMA firmware : fix a bug in the UART receiving.

The uart_to_mcu code in the ROM has bug.
The new fireware fixes it.

Signed-off-by: Huang Shijie <b32955@freescale.com>
11 years agoENGR00163603-3 MX6Q/UART : add DMA support to uart driver
Huang Shijie [Fri, 4 Nov 2011 09:15:20 +0000 (17:15 +0800)]
ENGR00163603-3 MX6Q/UART : add DMA support to uart driver

add the DMA support for the uart driver.

Signed-off-by: Huang Shijie <b32955@freescale.com>
11 years agoENGR00163603-2 IMX/SDMA : save the real count for one DMA transaction.
Huang Shijie [Wed, 23 Nov 2011 08:45:17 +0000 (16:45 +0800)]
ENGR00163603-2 IMX/SDMA : save the real count for one DMA transaction.

When we use the SDMA in the UART driver(such as imx6q), we will
meet one situation:
  Assume we set 64 bytes for the RX DMA buffer.
  The receiving DMA buffer has received some data, but not full.
  An Aging DMA request will be received by the SDMA controller if we enable the
  IDDMAEN(UCR4[6]) in this case.

So the UART driver needs to know the count of the real received bytes,
and push them to upper layer.

Add two new fields to sdmac, and update the `residue` in sdma_tx_status().

Signed-off-by: Huang Shijie <b32955@freescale.com>
11 years agoENGR00163603-1 MX6Q/UART : enable DMA support in the MX6Q-ARM2 board
Huang Shijie [Fri, 18 Nov 2011 06:05:50 +0000 (14:05 +0800)]
ENGR00163603-1 MX6Q/UART : enable DMA support in the MX6Q-ARM2 board

add the DMA feature to the MX6Q-ARM2 board.

Signed-off-by: Huang Shijie <b32955@freescale.com>
11 years agoENGR00163275 [MX6]Fix PLL enable fail panic
Anson Huang [Thu, 1 Dec 2011 07:51:27 +0000 (15:51 +0800)]
ENGR00163275 [MX6]Fix PLL enable fail panic

The root cause is irqs come between PLL register reading
and getting system time, an interrupt handle could take
more than 2ms, which will make the time reading and register
reading unalignment, see below:

1. pll reg read, it is still not locked;
2. here comes an interrupt, and its handler could spent > 2ms;
3. time reading, found current time already > expiration time(1.2ms),
   and we treated the pll lock fail;

There are two method could fix it, one is disable interrupt
during pll lock bit and time expiration check, the other is
to add a second time read after time expiration to make sure
the pll didn't lock during the time we set. I choose the seconde
choise, since it impacts kernel less than disable interrupt;

Signed-off-by: Anson Huang <b20788@freescale.com>
11 years agoENGR00163616 [mx6q]hdmi will hang in daily build image
Tony Lin [Wed, 30 Nov 2011 08:17:15 +0000 (16:17 +0800)]
ENGR00163616 [mx6q]hdmi will hang in daily build image

make sure the pointer is valid before accessing

Signed-off-by: Tony Lin <tony.lin@freescale.com>
11 years agoENGR00163615 mx6q: sabrelite RevC: change GPIO for flexcan
Dong Aisheng [Wed, 30 Nov 2011 08:23:19 +0000 (16:23 +0800)]
ENGR00163615 mx6q: sabrelite RevC: change GPIO for flexcan

GPIOs used by flexcan are changed on RevC board.
Updating the code for RevC board.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
11 years agoENGR00163510 MX6Q: AHCI: One brand 1T HDD can't pwr up properly
Richard Zhu [Wed, 30 Nov 2011 07:28:52 +0000 (15:28 +0800)]
ENGR00163510 MX6Q: AHCI: One brand 1T HDD can't pwr up properly

More time is required by one brand 1T HDD,
change the delay mechanism to fix it.

Signed-off-by: Richard Zhu <r65037@freescale.com>
11 years agoENGR00163497-3 MX6Q: Enable io_init function for camera drivers
Even Xu [Wed, 30 Nov 2011 01:36:18 +0000 (09:36 +0800)]
ENGR00163497-3 MX6Q: Enable io_init function for camera drivers

1. Enable io_init function for camera drivers.
2. Add ov5640_mipi camera driver supported resolutions
3. Fine-turn ov5640_mipi camera driver output image quality

Signed-off-by: Even Xu <b21019@freescale.com>
11 years agoENGR00163497-2 MX6Q: Add io_init for mipi sensor and camera sensor
Even Xu [Wed, 30 Nov 2011 01:33:09 +0000 (09:33 +0800)]
ENGR00163497-2 MX6Q: Add io_init for mipi sensor and camera sensor

1. Add io_init function for mipi sensor and camera sensor.
2. Remove "mipi_sensor" cmd line

Signed-off-by: Even Xu <b21019@freescale.com>
11 years agoENGR00163497-1 Add a "io_init" function to fsl camera platform data
Even Xu [Wed, 30 Nov 2011 01:28:33 +0000 (09:28 +0800)]
ENGR00163497-1 Add a "io_init" function to fsl camera platform data

Add a new member named "io_init" to fsl camera platform data, this
Function can initialize IO of camera sensor before it works.

Signed-off-by: Even Xu <b21019@freescale.com>
11 years agoENGR00162676 Fix for DVFS on MX6 Sabre-lite
Mahesh Mahadevan [Tue, 29 Nov 2011 10:27:32 +0000 (04:27 -0600)]
ENGR00162676 Fix for DVFS on MX6 Sabre-lite

Fix ensures the regulator API works correctly when adjusting
core voltages during DVFS on MX6 Sabre-lite

Signed-off-by: Mahesh Mahadevan <r9aadq@freescale.com>
11 years agoENGR00163247-3 MX6Q: MIPI sensor add prp viewfinder and prp enc support
Even Xu [Mon, 28 Nov 2011 06:28:44 +0000 (14:28 +0800)]
ENGR00163247-3 MX6Q: MIPI sensor add prp viewfinder and prp enc support

1. Enable prp viewfinder setting for DPFG
2. Enable prp viewfinder setting for DFBG
3. Enable prp enc setting
4. Add some error massage for calling mipi csi2 driver fail

Signed-off-by: Even Xu <b21019@freescale.com>
11 years agoENGR00163247-2 MX6Q: MIPI sensor add prp viewfinder and prp enc support
Even Xu [Mon, 28 Nov 2011 06:29:32 +0000 (14:29 +0800)]
ENGR00163247-2 MX6Q: MIPI sensor add prp viewfinder and prp enc support

1. Enable ipu channel mipi setting
2. Change mipi csi2 driver common API to use lock

Signed-off-by: Even Xu <b21019@freescale.com>
11 years agoENGR00163247-1 MX6Q: MIPI sensor add prp viewfinder and prp enc support
Even Xu [Mon, 28 Nov 2011 06:29:16 +0000 (14:29 +0800)]
ENGR00163247-1 MX6Q: MIPI sensor add prp viewfinder and prp enc support

1. Add mipi_en information to mipi csi2 driver info
2. Add mipi related value to ipu channel parameter

Signed-off-by: Even Xu <b21019@freescale.com>
11 years agoENGR00163128 [MX6q_ARM2]SATA Boot: reboot failed if boot from SATA
Richard Zhu [Mon, 28 Nov 2011 05:02:51 +0000 (13:02 +0800)]
ENGR00163128 [MX6q_ARM2]SATA Boot: reboot failed if boot from SATA

The root cause is that the sata power is not enabled after reboot
the system when boot from sata.
Built in the sata driver would fix this issue.
In this way, the sata power would be enabled defautly
when there is a sata device is plugged into the slot, otherwise,
the power would be disabled.
NOTE:
Pls don't plug the sata disk after the system is booted up.
System wouldn't recognized it, since there are no any power and
clocks on the sata slot.

Signed-off-by: Richard Zhu <r65037@freescale.com>
11 years agoENGR00163040 - FEC : Fix ethernet cannot work after system sleep.
Fugang Duan [Fri, 25 Nov 2011 10:27:29 +0000 (18:27 +0800)]
ENGR00163040 - FEC : Fix ethernet cannot work after system sleep.

- Descript:
  Ethernet can't work in uboot and kernel DHCP throught press
 'reset' key when send sleep command 'echo mem > /sys/power/state'
- Cause:
  FEC driver will power down phy when system sleep. If just reset the
  board, FEC driver cannot run resume function. So, need power on phy
  in uboot and linux driver.

Signed-off-by: Fugang Duan <B38611@freescale.com>
11 years agoENGR00163120 pwm backlight: work-around for lvds panel blank issue on mx6q
Jason Chen [Fri, 25 Nov 2011 05:40:42 +0000 (13:40 +0800)]
ENGR00163120 pwm backlight: work-around for lvds panel blank issue on mx6q

make all display can control pwm backlight.

NOTE!!!:

it's not a good solution, will bring side-affect of no backlight display
device can disable pwm backlight of other display device.

Signed-off-by: Jason Chen <b02280@freescale.com>
11 years agoENGR00163057 ARM: imx6q: add gpu suspend/resume support
Richard Zhao [Thu, 24 Nov 2011 03:34:28 +0000 (11:34 +0800)]
ENGR00163057 ARM: imx6q: add gpu suspend/resume support

GPU power down/up follow a restrict process.

Signed-off-by: Richard Zhao <richard.zhao@freescale.com>
11 years agousb: gadget: file_storage: fix race on unloading
Yauheni Kaliuta [Thu, 13 Oct 2011 11:19:05 +0000 (14:19 +0300)]
usb: gadget: file_storage: fix race on unloading

There is a race, reproduced rarely if you unload the module
when host finishes mass storage device initialization (reading
partition table and so on): fsg_unbind() code first closes
lun files then waits for worker thread to finish its work, as
the result the thread may operate on already closed device
with an oops and backtrace:

[  484.937225] [<b00e403c>] (touch_atime+0x4/0x140) from [<b00a1498>] (generic_file_aio_read+0x678/0x6f0)
[  484.946563] [<b00a1498>] (generic_file_aio_read+0x678/0x6f0) from [<b00d08c4>] (do_sync_read+0xb0/0xf4)
[  484.955963] [<b00d08c4>] (do_sync_read+0xb0/0xf4) from [<b00d1478>] (vfs_read+0xac/0x144)
[  484.964172] [<b00d1478>] (vfs_read+0xac/0x144) from [<af24c6a8>] (fsg_setup+0x7f4/0x900 [g_file_storage])
[  484.973785] [<af24c6a8>] (fsg_setup+0x7f4/0x900 [g_file_storage]) from [<af24da14>] (fsg_main_thread+0x85c/0x175c [g_file_storage])
[  484.985626] [<af24da14>] (fsg_main_thread+0x85c/0x175c [g_file_storage]) from [<b0077c48>] (kthread+0x7c/0x84)
[  484.995666] [<b0077c48>] (kthread+0x7c/0x84) from [<b002f950>] (kernel_thread_exit+0x0/0x8)
[  485.004028] Code: eaffffd0 e28dd008 e8bd8df0 e92d40f7 (e591400c)

Change the order in unbind: wait for the thread first, then close
the files.

Signed-off-by: Yauheni Kaliuta <yauheni.kaliuta@nokia.com>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
11 years agoENGR00161617_1 [MX6] : Get FEC MAC addr from the shadow reg.
Fugang Duan [Wed, 23 Nov 2011 06:21:48 +0000 (14:21 +0800)]
ENGR00161617_1 [MX6] : Get FEC MAC addr from the shadow reg.

- Correct FEC to get the default MAC address from OCOTP
  shadow reg.

Signed-off-by: Fugang Duan <B38611@freescale.com>
11 years agoENGR00162919 mxc_vout: there is one column garbage line at right for split mode
Jason Chen [Wed, 23 Nov 2011 02:46:01 +0000 (10:46 +0800)]
ENGR00162919 mxc_vout: there is one column garbage line at right for split mode

as ipu processing device driver has protect check, the CR ENGR00155141 can be
reverted, this CR is the cause of garbage line.
this patch also change v4l2 output try_task function to make sure there is no
cropping for output when display support window.

Signed-off-by: Jason Chen <b02280@freescale.com>
11 years agoENGR00162881 Workaround for some MX6x boards failed read EDID data
Sandor Yu [Tue, 22 Nov 2011 12:25:32 +0000 (20:25 +0800)]
ENGR00162881 Workaround for some MX6x boards failed read EDID data

HDMI video mode setting in command line will not work if no EDID data
reading from HDMI sink.
Creat a default modelist for HDMI video mode when no EDID data.
Then default video mode can work even if no EDID data.

Signed-off-by: Sandor Yu <R01008@freescale.com>
11 years agoENGR00162885 mx6q: sabrelite: add flexcan support
Dong Aisheng [Tue, 22 Nov 2011 07:59:51 +0000 (15:59 +0800)]
ENGR00162885 mx6q: sabrelite: add flexcan support

Add flexcan support.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
11 years agoENGR00162867 [MX6]Fix pm bug of error coding
Anson Huang [Tue, 22 Nov 2011 10:26:57 +0000 (18:26 +0800)]
ENGR00162867 [MX6]Fix pm bug of error coding

Before suspend, we need to check whether there
is wakeup source's irq pending via GPC_ISR1~4,
previous coding checked for set of irq status
of GPC_ISR1, should be GPC_ISR1~4.

Signed-off-by: Anson Huang <b20788@freescale.com>
11 years agoENGR00162709 Add Support for MX6Q Sabre Auto
Eric Sun [Mon, 21 Nov 2011 11:09:33 +0000 (19:09 +0800)]
ENGR00162709 Add Support for MX6Q Sabre Auto

Code change in none-mach code for support MX6Q Sabre Auto.

Signed-off-by: Eric Sun <jian.sun@freescale.com>
11 years agoENGR00162709 Add Support for MX6Q Sabre Auto
Eric Sun [Mon, 21 Nov 2011 11:08:59 +0000 (19:08 +0800)]
ENGR00162709 Add Support for MX6Q Sabre Auto

Add file board-mx6q_sabreauto.c. The only real difference from
board-mx6q_arm2.c is SD pin configuration is changed.

Signed-off-by: Eric Sun <jian.sun@freescale.com>
11 years agoENGR00162792-2 [IMX6Q] mmc host pm caps should be board related
Ryan QIAN [Tue, 22 Nov 2011 02:40:25 +0000 (10:40 +0800)]
ENGR00162792-2 [IMX6Q] mmc host pm caps should be board related

- add board data for mmc host keep power at suspend

Signed-off-by: Ryan QIAN <b32804@freescale.com>
11 years agoENGR00162792-1 [IMX6Q] mmc host pm caps should be board specific
Ryan QIAN [Tue, 22 Nov 2011 02:38:32 +0000 (10:38 +0800)]
ENGR00162792-1 [IMX6Q] mmc host pm caps should be board specific

- move mmc host pm caps into board specific section

Signed-off-by: Ryan QIAN <b32804@freescale.com>
11 years agoENGR00162478 MX6 Sabre-lite, add ASRC support
Mahesh Mahadevan [Mon, 21 Nov 2011 19:13:16 +0000 (13:13 -0600)]
ENGR00162478 MX6 Sabre-lite, add ASRC support

Add support for ASRC driver in MX6 sabre-lite

Signed-off-by: Mahesh Mahadevan <r9aadq@freescale.com>
11 years agoENGR00162732 [MX6q] Correct gpu2d clock setting
Larry Li [Mon, 21 Nov 2011 09:43:45 +0000 (17:43 +0800)]
ENGR00162732 [MX6q] Correct gpu2d clock setting

In MX6 gpu2d core clock setting, gpu3d core clock field is misued
to set 2d core clock rate. Correct it to use the right clock field

Signed-off-by: Larry Li <b20787@freescale.com>
11 years agoENGR00162681 iMX6 SDIO WIFI AR6003 failed to work on resuming
Ryan QIAN [Mon, 21 Nov 2011 06:43:20 +0000 (14:43 +0800)]
ENGR00162681 iMX6 SDIO WIFI AR6003 failed to work on resuming

- Add keep power option to mmc pm_caps, since
power of SD can not be cut on mx6, which should
be indicated in host pm cap.

Signed-off-by: Ryan QIAN <b32804@freescale.com>
11 years agousb: gadget: file_storage: fix race on unloading
Yauheni Kaliuta [Thu, 13 Oct 2011 11:19:05 +0000 (14:19 +0300)]
usb: gadget: file_storage: fix race on unloading

There is a race, reproduced rarely if you unload the module
when host finishes mass storage device initialization (reading
partition table and so on): fsg_unbind() code first closes
lun files then waits for worker thread to finish its work, as
the result the thread may operate on already closed device
with an oops and backtrace:

[  484.937225] [<b00e403c>] (touch_atime+0x4/0x140) from [<b00a1498>] (generic_file_aio_read+0x678/0x6f0)
[  484.946563] [<b00a1498>] (generic_file_aio_read+0x678/0x6f0) from [<b00d08c4>] (do_sync_read+0xb0/0xf4)
[  484.955963] [<b00d08c4>] (do_sync_read+0xb0/0xf4) from [<b00d1478>] (vfs_read+0xac/0x144)
[  484.964172] [<b00d1478>] (vfs_read+0xac/0x144) from [<af24c6a8>] (fsg_setup+0x7f4/0x900 [g_file_storage])
[  484.973785] [<af24c6a8>] (fsg_setup+0x7f4/0x900 [g_file_storage]) from [<af24da14>] (fsg_main_thread+0x85c/0x175c [g_file_storage])
[  484.985626] [<af24da14>] (fsg_main_thread+0x85c/0x175c [g_file_storage]) from [<b0077c48>] (kthread+0x7c/0x84)
[  484.995666] [<b0077c48>] (kthread+0x7c/0x84) from [<b002f950>] (kernel_thread_exit+0x0/0x8)
[  485.004028] Code: eaffffd0 e28dd008 e8bd8df0 e92d40f7 (e591400c)

Change the order in unbind: wait for the thread first, then close
the files.

Signed-off-by: Yauheni Kaliuta <yauheni.kaliuta@nokia.com>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
11 years agoENGR00162701 mxc_vout: fix potential deadlock of fb_blank
Jason Chen [Mon, 21 Nov 2011 07:42:17 +0000 (15:42 +0800)]
ENGR00162701 mxc_vout: fix potential deadlock of fb_blank

add FBINFO_MISC_USEREVENT flag before calling fb_blank

Signed-off-by: Jason Chen <b02280@freescale.com>
11 years agoENGR00162176 ipu: fix v4l2 capture issues when display blank
Yuxi Sun [Mon, 21 Nov 2011 06:31:56 +0000 (14:31 +0800)]
ENGR00162176 ipu: fix v4l2 capture issues when display blank

Add get and put ipu when enable and disable csi

Signed-off-by: Yuxi Sun <b36102@freescale.com>
11 years agoENGR00161644 usb-gadget: prime directly for status dTD of ep0
Peter Chen [Mon, 21 Nov 2011 06:10:49 +0000 (14:10 +0800)]
ENGR00161644 usb-gadget: prime directly for status dTD of ep0

During the setup transfer, if prime status just after prime the data,
but before the data completes, there is a potential problem:
The device's qTD has NO direction bit, If the IN request(Status Stage)
is added to qTD list while the OUT (Data Stage) is priming,
then the IN will not prime by software, it will prime automatically
by controller as OUT.

We met one usb hang issue during repeat plug in/out test at i.mx6q
that the data status has finished but status has never finished,
it is most likely above issue.

After this fix, the repeat plug in/out test passes successfully.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
11 years agoENGR00161951-2 [mx6q]performance monitor device
Tony Lin [Fri, 11 Nov 2011 03:00:39 +0000 (11:00 +0800)]
ENGR00161951-2 [mx6q]performance monitor device

add performance monitor device to mx6q arm2 board.
add perfmon clocks to clock tree.
add perfmon to default config as a module

Signed-off-by: Tony Lin <tony.lin@freescale.com>
11 years agoENGR00161951-1 [mx6q]performance monitor driver
Tony Lin [Fri, 11 Nov 2011 03:00:39 +0000 (11:00 +0800)]
ENGR00161951-1 [mx6q]performance monitor driver

add plt_init & plt_exit functions to structure, so that
the driver would have chance to do platform specific init and exit

Signed-off-by: Tony Lin <tony.lin@freescale.com>
11 years agoENGR00162666 mxc_vout: v4l2 playback blocking issue
Jason Chen [Mon, 21 Nov 2011 02:18:33 +0000 (10:18 +0800)]
ENGR00162666 mxc_vout: v4l2 playback blocking issue

1. add pos restore to 0,0
2. adjust code sequnce to avoid lock issue.
3. add on-the-fly S_CTRL support

Signed-off-by: Jason Chen <b02280@freescale.com>
11 years agoENGR00162665 ipuv3 fb: fix non-interleave format wrong color issue
Jason Chen [Mon, 21 Nov 2011 02:16:07 +0000 (10:16 +0800)]
ENGR00162665 ipuv3 fb: fix non-interleave format wrong color issue

fix fb offset base address under non-interleave format.

Signed-off-by: Jason Chen <b02280@freescale.com>
11 years agoENGR00162664 mxc_vout: modify pp bypass condition
Jason Chen [Mon, 21 Nov 2011 02:14:01 +0000 (10:14 +0800)]
ENGR00162664 mxc_vout: modify pp bypass condition

1. pp bypass's rotate value should be smaller than IPU_ROTATE_HORIZ_FLIP.
2. use del_timer_sync instead of del_timer for SMP.

Signed-off-by: Jason Chen <b02280@freescale.com>
11 years agoENGR00162663 ipuv3 fb: add vertical flip support
Jason Chen [Mon, 21 Nov 2011 02:11:42 +0000 (10:11 +0800)]
ENGR00162663 ipuv3 fb: add vertical flip support

support vertical flip for fb.
just set it by:
echo 1 > /sys/class/graphics/fb0/rotate

Signed-off-by: Jason Chen <b02280@freescale.com>
11 years agoENGR00162646 [DVFS]Fix build warning
Anson Huang [Sat, 19 Nov 2011 02:43:14 +0000 (10:43 +0800)]
ENGR00162646 [DVFS]Fix build warning

Fix dvfs_core build warning:

  arch/arm/plat-mxc/dvfs_core.c:824: warning: 'downthreshold_show'
  defined but not used

  arch/arm/plat-mxc/dvfs_core.c:830: warning: 'downthreshold_store'
  defined but not used

  arch/arm/plat-mxc/dvfs_core.c:842: warning: 'downcount_show' defined
  but not used

  arch/arm/plat-mxc/dvfs_core.c:848: warning: 'downcount_store' defined
  but not used

Signed-off-by: Anson Huang <b20788@freescale.com>
11 years agoENGR00162643 [MX6]Decline SOC LDO voltage to make suspend/resume work
Anson Huang [Sat, 19 Nov 2011 02:24:21 +0000 (10:24 +0800)]
ENGR00162643 [MX6]Decline SOC LDO voltage to make suspend/resume work

Need to decline SOC LDO domain voltage to make 800M ARM2 board work,
we can set the SOC power domain to be same as ARM core power domain.
Tested on both 1G rework board and 800M origin board.

Signed-off-by: Anson Huang <b20788@freescale.com>
11 years agoENGR00162612 [Mx6]Change arm core voltage of suspend for 1G cpufreq
Anson Huang [Fri, 18 Nov 2011 13:11:04 +0000 (21:11 +0800)]
ENGR00162612 [Mx6]Change arm core voltage of suspend for 1G cpufreq

Previous setting for ARM core is 1V during suspend, it
is working for 800MHz cpu freq, but not enough for
1G cpu freq, actually, we didn't need to change ARM core
LDO's setting during suspend, hardware will auto change it.

Signed-off-by: Anson Huang <b20788@freescale.com>
11 years agoENGR00162583-3 usb header: avoid class driver access register after usb is off
Peter Chen [Fri, 18 Nov 2011 06:02:45 +0000 (14:02 +0800)]
ENGR00162583-3 usb header: avoid class driver access register after usb is off

- An well-behavior class driver should disable their endpoints
after being notified disconnect with host, we use all endpoints
are stopped (ep->stopped)  to indicates the class
driver will not visit device driver any more.
the ep-stopped will be initialized as 1 for non-control endpoint
it will be 0 after fsl_ep_enable, and be 1 after fsl_ep_disable.
Where is a non-sleep wait routine at disconnect event for waiting all
endpoints are stopped
- Some controller's (like i.mx6q) DP will change from J
to SE0 slowly after the cable disconnects with host, in that case there
will be a wakeup interrupt after driver enables the wakeup interrupt.
For i.mx6q, there is a discharge routine for DP after the disconnection.
- Should not wait vbus to low during first otg switch, as the wait will
be timeout when the usb cable is connecting to host.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
11 years agoENGR00162583-2 usb driver: avoid class driver access register after usb is off
Peter Chen [Fri, 18 Nov 2011 06:01:06 +0000 (14:01 +0800)]
ENGR00162583-2 usb driver: avoid class driver access register after usb is off

- An well-behavior class driver should disable their endpoints
after being notified disconnect with host, we use all endpoints
are stopped (ep->stopped)  to indicates the class
driver will not visit device driver any more.
the ep-stopped will be initialized as 1 for non-control endpoint
it will be 0 after fsl_ep_enable, and be 1 after fsl_ep_disable.
Where is a non-sleep wait routine at disconnect event for waiting all
endpoints are stopped
- Some controller's (like i.mx6q) DP will change from J
to SE0 slowly after the cable disconnects with host, in that case there
will be a wakeup interrupt after driver enables the wakeup interrupt.
For i.mx6q, there is a discharge routine for DP after the disconnection.
- Should not wait vbus to low during first otg switch, as the wait will
be timeout when the usb cable is connecting to host.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
11 years agoENGR00162583-1 usb msl: avoid class driver access register after usb is off
Peter Chen [Fri, 18 Nov 2011 05:57:47 +0000 (13:57 +0800)]
ENGR00162583-1 usb msl: avoid class driver access register after usb is off

- An well-behavior class driver should disable their endpoints
after being notified disconnect with host, we use all endpoints
are stopped (ep->stopped)  to indicates the class
driver will not visit device driver any more.
the ep-stopped will be initialized as 1 for non-control endpoint
it will be 0 after fsl_ep_enable, and be 1 after fsl_ep_disable.
Where is a non-sleep wait routine at disconnect event for waiting all
endpoints are stopped
- Some controller's (like i.mx6q) DP will change from J
to SE0 slowly after the cable disconnects with host, in that case there
will be a wakeup interrupt after driver enables the wakeup interrupt.
For i.mx6q, there is a discharge routine for DP after the disconnection.
- Should not wait vbus to low during first otg switch, as the wait will
be timeout when the usb cable is connecting to host.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
11 years agoENGR00162319: MX6 - Add support for updated VDDARM voltages
Ranjani Vaidyanathan [Wed, 16 Nov 2011 00:28:30 +0000 (18:28 -0600)]
ENGR00162319: MX6 - Add support for updated VDDARM voltages

Set the ARM LDO voltage to 1.225V to run the part at 1GHz.
Also updated the rest of the voltages based on the latest
available working points.
The boards will need to be modified for this change to work
correctly. Please ensure that the VDDARM_IN is set to 1.38V
(using the potentiometer on the ARM2 board or choosing the correct
resistors on the sabrelite boards).
Also added command line option (arm_freq=800) to set the max ARM freq.
Add:
arm_freq=1000 -> to set the max ARM freq to 1GHz
arm_freq=800 -> to set the max ARM freq to 800MHz.

Default max ARM freq is 1GHz. No other values are currently
supported. If your board is not modified, please add the command
line "arm_freq=800' to avoid failures.

Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
11 years agoENGR00162475 ipuv3 fb: fix camera preview failure
Yuxi Sun [Thu, 17 Nov 2011 09:39:14 +0000 (17:39 +0800)]
ENGR00162475 ipuv3 fb: fix camera preview failure

fix camera preview failure when using double buffer mode for frame
buffer

Signed-off-by: Yuxi Sun <b36102@freescale.com>
11 years agoENGR00162506 mx6q: set a correct clock for asrc
Dong Aisheng [Thu, 17 Nov 2011 11:24:54 +0000 (19:24 +0800)]
ENGR00162506 mx6q: set a correct clock for asrc

The ASRC mem to mem mode does not work without this patch.
Bacause 1.5Mhz clock rate is not available which will cause
clock setting fail, change to 7.5Mhz (the mininum one) to make
ASRC work properly.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
11 years agoENGR00162013 - FEC : Fix loss interrupt when add "rootwait"
Fugang Duan [Fri, 11 Nov 2011 06:25:11 +0000 (14:25 +0800)]
ENGR00162013 - FEC : Fix loss interrupt when add "rootwait"

- MII timeout when config ipg 40MHz mode and add "rootwait"
  para in uboot. Kernel will delay before peripheral equipment
  are ready, which lead to CPU loss interrupt.
- So, prolong the timeout time, and increase the MII clock.

Signed-off-by: Fugang Duan <B38611@freescale.com>
11 years agoENGR00162198 [MX6q_ARM2]filesystem: Kernel dump if unplug SD card during bonnie
Tony Lin [Thu, 17 Nov 2011 09:49:15 +0000 (17:49 +0800)]
ENGR00162198 [MX6q_ARM2]filesystem: Kernel dump if unplug SD card during bonnie

add pointer check before accesssing to fix following problem

staErXtT 3'-efms. .(.mmcblk1p2): error: remounting filesystem read-only
Unable to handle kernel NULL pointer dereference at virtual address 00000010
pgd = df334000
[00000010] *pgd=71e85831, *pte=00000000, *ppte=00000000
Internal error: Oops: 17 [#1] PREEMPT SMP
last sysfs file: /sys/devices/platform/sdhci-esdhc-imx.2/mmc_host/mmc1/
mmc1:b368/serial
Modules linked in: ahci_platform ov3640_camera libahci libata
CPU: 1 Not tainted (2.6.38-daily-00808-g43b3e87 #1)
PC is at __mark_inode_dirty+0xc8/0x1b4
LR is at __mark_inode_dirty+0xb8/0x1b4
pc : [<800f7418>] lr : [<800f7408>] psr: 20000013
sp : df14dde0 ip : 00000062 fp : 00000000
r10: 003d2000 r9 : df14df38 r8 : 00000000
r7 : 4ec22acb r6 : 00000003 r5 : 00000000 r4 : e028c720
r3 : 00000001 r2 : 00000065 r1 : 804fe50c r0 : 00000001

Signed-off-by Tony Lin <tony.lin@freescale.com>

11 years agoENGR00162335-2 [mx6q_arm2]SD card 3.0 can't be recognized
Tony Lin [Thu, 17 Nov 2011 04:51:27 +0000 (12:51 +0800)]
ENGR00162335-2 [mx6q_arm2]SD card 3.0 can't be recognized

change mmc rescan delay to 500ms from 200ms.
this will make insert and removal reflection more stable.

Signed-off-by: Tony Lin <tony.lin@freescale.com>
11 years agoENGR00162335-1 [mx6q_arm2]SD card 3.0 can't be recognized
Tony Lin [Thu, 17 Nov 2011 04:51:27 +0000 (12:51 +0800)]
ENGR00162335-1 [mx6q_arm2]SD card 3.0 can't be recognized

fix pin conflict between sd vselect and canbus enable pin.
add 'canbus' to the cmdline will enable canbus driver.
if canbus driver is enabled, sd 3.0 card will not work

Signed-off-by: Tony Lin <tony.lin@freescale.com>
11 years agoENGR00162460:MX6-Revert "MX6-Disable PLL1 when CPU clk is below 400MHz."
Ranjani Vaidyanathan [Thu, 17 Nov 2011 05:16:28 +0000 (23:16 -0600)]
ENGR00162460:MX6-Revert "MX6-Disable PLL1 when CPU clk is below 400MHz."

This reverts commit 564e25cb10cd827ea3fa5cda2487fd978f08bbd7.
Sourcing ARM_CLK from PLL2_PFD_400M is causing issues when setting
the ARM_PODF. So for now source arm_clk from PLL1_SYS_MAIN only.

Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
11 years agoENGR00139276-2 MX6 BT: Enable basic bluetooth support to mx6q platform
Lionel Xu [Wed, 16 Nov 2011 09:03:36 +0000 (17:03 +0800)]
ENGR00139276-2 MX6 BT: Enable basic bluetooth support to mx6q platform

Modify uart driver to support DCE/DTE mode

Signed-off-by: Lionel Xu <Lionel.Xu@freescale.com>
11 years agoENGR00139276-1 MX6 BT: Add basic bluetooth support to mx6 platform
Lionel Xu [Wed, 16 Nov 2011 08:57:27 +0000 (16:57 +0800)]
ENGR00139276-1 MX6 BT: Add basic bluetooth support to mx6 platform

Add basic bluetooth support to mx6q platform:
1) Enable bluetooth driver by default
2) Configure uart2 which is used by bluetooth

Signed-off-by: Lionel Xu <Lionel.Xu@freescale.com>
11 years agoENGR00162364 flexcan: fix endless errors causing system hang
Dong Aisheng [Wed, 16 Nov 2011 09:46:59 +0000 (17:46 +0800)]
ENGR00162364 flexcan: fix endless errors causing system hang

Clear state error to avoid ednless state error if error happens
which will call napi_schedule() each time, seems a little high load,
to cause system hang.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
11 years agoENGR00162360 mxc_vout: fix STREAMOFF and G_CROP issues
Jason Chen [Wed, 16 Nov 2011 09:33:15 +0000 (17:33 +0800)]
ENGR00162360 mxc_vout: fix STREAMOFF and G_CROP issues

1. move videobuf_mmap_free to mxc_vout_release.
2. call videobuf_queue_cancel in mxc_vout_release if no streamon called.
3. correct return value of G_CROP for support_window case.

Signed-off-by: Jason Chen <b02280@freescale.com>
11 years agoENGR00162358 ipuv3 fb: only check pos when fb is unblank
Jason Chen [Wed, 16 Nov 2011 09:29:19 +0000 (17:29 +0800)]
ENGR00162358 ipuv3 fb: only check pos when fb is unblank

only check pos when fb is unblank

Signed-off-by: Jason Chen <b02280@freescale.com>
11 years agoENGR00162354 ipuv3 device: correct kthread operation for split task
Jason Chen [Wed, 16 Nov 2011 09:23:07 +0000 (17:23 +0800)]
ENGR00162354 ipuv3 device: correct kthread operation for split task

make could_finish to volatile.
do_exit in split_task_thread instead of kthread_stop.

Signed-off-by: Jason Chen <b02280@freescale.com>
11 years agoENGR00162334 Revert "ENGR00161764 mx6q: disable gc355 temporally"
wu guoxing [Tue, 15 Nov 2011 05:38:15 +0000 (13:38 +0800)]
ENGR00162334 Revert "ENGR00161764 mx6q: disable gc355 temporally"

This reverts commit 307e94178adc55b6f6230c83ad0dd4d25b18003e.

Signed-off-by: Wu Guoxing <b39297@freescale.com>