Greg Ungerer [Sun, 19 Feb 2012 06:47:24 +0000 (16:47 +1000)]
m68knommu: factor more common ColdFire cpu reset code
Most of the more modern ColdFire cores use the same code to reset the CPU
(but it is different to most of the earlier cores). Currently that is
duplicated in each of the sub-arch files. Pull out this common code and
out a single copy of it with the other common reset code.
Greg Ungerer [Sun, 19 Feb 2012 06:34:58 +0000 (16:34 +1000)]
m68knommu: make 528x CPU reset register addressing consistent
If we make all MCF_RCR (CPU reset register) addressing consistent across all
ColdFire CPU family members that use it then we will be able to remove the
duplicated copies of the code that use it.
Greg Ungerer [Sun, 19 Feb 2012 06:33:11 +0000 (16:33 +1000)]
m68knommu: make 527x CPU reset register addressing consistent
If we make all MCF_RCR (CPU reset register) addressing consistent across all
ColdFire CPU family members that use it then we will be able to remove the
duplicated copies of the code that use it.
Greg Ungerer [Sun, 19 Feb 2012 06:27:23 +0000 (16:27 +1000)]
m68knommu: make 523x CPU reset register addressing consistent
If we make all MCF_RCR (CPU reset register) addressing consistent across all
ColdFire CPU family members that use it then we will be able to remove the
duplicated copies of the code that use it.
Greg Ungerer [Sun, 19 Feb 2012 06:16:58 +0000 (16:16 +1000)]
m68knommu: factor some common ColdFire cpu reset code
A number of the early ColdFire cores use the same code to reset the CPU.
Currently that is duplicated in each of the sub-arch files. Pull out this
common code and use a single copy of it for all CPU types that use it.
Greg Ungerer [Sat, 24 Dec 2011 04:36:27 +0000 (14:36 +1000)]
m68knommu: move old ColdFire timers init from CPU init to timers code
The original ColdFire timer interrupt setup is used by most of the users
of the original ColdFire timer code. But the code is currently duplicated
in each of the ColdFire CPU specific init files. Move it to the timers
code that it is really part of. It is strait forward to make it conditional
on also having the original interrupt engine that it needs.
Greg Ungerer [Sat, 24 Dec 2011 03:06:33 +0000 (13:06 +1000)]
m68knommu: clean up init code in ColdFire 532x startup
We can move all the init calls in the initcall code into the more general
arch setup code (which is config_BSP() here). That makes the 532x consistent
with other ColdFire CPUs setup code. It means we can get rid of the initcall
setup here all together. Also make sure we set the arch mach_reset function
pointer to get the local arch reset code called on reset.
Greg Ungerer [Sat, 24 Dec 2011 03:04:05 +0000 (13:04 +1000)]
m68knommu: clean up init code in ColdFire 528x startup
We can move all the init calls in the initcall code into the more general
arch setup code (which is config_BSP() here). That makes the 528x consistent
with other ColdFire CPUs setup cod. It means we can get rif of the initcall
setup here all together.
Greg Ungerer [Sat, 24 Dec 2011 03:00:02 +0000 (13:00 +1000)]
m68knommu: clean up init code in ColdFire 523x startup
We can move the QSPI init call to the more general config_BSP() code on
the 523x platorm setup code. Then we can remove the initcall code all
together.
We can also remove the un-needed include of mcfuart.h while we are
cleaning up here too.
Also I noticed that we are not calling the fec_init() code here, and we
should be doing that. Put that back in too.
Greg Ungerer [Sat, 24 Dec 2011 02:56:10 +0000 (12:56 +1000)]
m68knommu: merge common ColdFire QSPI platform setup code
The ColdFire QSPI is common to quite a few ColdFire CPUs. No need to duplicate
its platform setup code for every CPU family member that has it. Merge all the
setup code into a single shared file.
This also results in few platforms no longer needing any local platform
setup code. In those cases remove the empty devices array and initcall
code as well.
Greg Ungerer [Sat, 24 Dec 2011 02:44:45 +0000 (12:44 +1000)]
m68knommu: make 532x QSPI platform addressing consistent
If we make all QSPI (SPI protocol) addressing consistent across all ColdFire
family members then we will be able to remove the duplicated plaform data
and code and use a single setup for all.
So modify the ColdFire 532x QSPI addressing so that:
. base addresses are absolute (not relative to MBAR peripheral register)
. use a common name for IRQs used
. move chip select definitions (CS) to appropriate header
Greg Ungerer [Sat, 24 Dec 2011 02:42:30 +0000 (12:42 +1000)]
m68knommu: make 528x QSPI platform addressing consistent
If we make all QSPI (SPI protocol) addressing consistent across all ColdFire
family members then we will be able to remove the duplicated plaform data
and code and use a single setup for all.
So modify the ColdFire 528x QSPI addressing so that:
. base addresses are absolute (not relative to MBAR peripheral register)
. use a common name for IRQs used
. move chip select definitions (CS) to appropriate header
Greg Ungerer [Sat, 24 Dec 2011 02:40:37 +0000 (12:40 +1000)]
m68knommu: make 527x QSPI platform addressing consistent
If we make all QSPI (SPI protocol) addressing consistent across all ColdFire
family members then we will be able to remove the duplicated plaform data
and code and use a single setup for all.
So modify the ColdFire 527x QSPI addressing so that:
. base addresses are absolute (not relative to MBAR peripheral register)
. use a common name for IRQs used
. move chip select definitions (CS) to appropriate header
Greg Ungerer [Sat, 24 Dec 2011 02:38:40 +0000 (12:38 +1000)]
m68knommu: make 5249 QSPI platform addressing consistent
If we make all QSPI (SPI protocol) addressing consistent across all ColdFire
family members then we will be able to remove the duplicated plaform data
and code and use a single setup for all.
So modify the ColdFire 5249 QSPI addressing so that:
. base addresses are absolute (not relative to MBAR peripheral register)
. use a common name for IRQs used
. move chip select definitions (CS) to appropriate header
Greg Ungerer [Sat, 24 Dec 2011 02:36:38 +0000 (12:36 +1000)]
m68knommu: make 523x QSPI platform addressing consistent
If we make all QSPI (SPI protocol) addressing consistent across all ColdFire
family members then we will be able to remove the duplicated plaform data
and code and use a single setup for all.
So modify the ColdFire 523x QSPI addressing so that:
. base addresses are absolute (not relative to MBAR peripheral register)
. use a common name for IRQs used
. move chip select definitions (CS) to appropriate header
Greg Ungerer [Sat, 24 Dec 2011 02:32:52 +0000 (12:32 +1000)]
m68knommu: make 520x QSPI platform addressing consistent
If we make all QSPI (SPI protocol) addressing consistent across all ColdFire
family members then we will be able to remove the duplicated plaform data
and code and use a single setup for all.
So modify the ColdFire 520x QSPI addressing so that:
. base addresses are absolute (not relative to MBAR peripheral register)
. use a common name for IRQs used
. move chip select definitions (CS) to appropriate header
Greg Ungerer [Sat, 24 Dec 2011 00:30:36 +0000 (10:30 +1000)]
m68knommu: merge common ColdFire FEC platform setup code
The ColdFire FEC is common to quite a few ColdFire CPUs. No need to duplicate
its platform setup code for every CPU family member that has it. Merge all the
setup code into a single shared file.
Greg Ungerer [Sat, 24 Dec 2011 00:23:01 +0000 (10:23 +1000)]
m68knommu: make 532x FEC platform addressing consistent
If we make all FEC (ethernet) addressing consistent across all ColdFire
family members then we will be able to remove the duplicated plaform data
and use a single setup for all.
So modify the ColdFire 532x FEC addressing so that:
. FECs are numbered from 0 up
. base addresses are absolute (not relative to MBAR peripheral register)
. use a common name for IRQs used
Greg Ungerer [Sat, 24 Dec 2011 00:20:02 +0000 (10:20 +1000)]
m68knommu: make 528x FEC platform addressing consistent
If we make all FEC (ethernet) addressing consistent across all ColdFire
family members then we will be able to remove the duplicated plaform data
and use a single setup for all.
So modify the ColdFire 528x FEC addressing so that:
. FECs are numbered from 0 up
. base addresses are absolute (not relative to MBAR peripheral register)
. use a common name for IRQs used
Greg Ungerer [Sat, 24 Dec 2011 00:17:42 +0000 (10:17 +1000)]
m68knommu: make 527x FEC platform addressing consistent
If we make all FEC (ethernet) addressing consistent across all ColdFire
family members then we will be able to remove the duplicated plaform data
and use a single setup for all.
So modify the ColdFire 527x FEC addressing so that:
. FECs are numbered from 0 up
. base addresses are absolute (not relative to MBAR peripheral register)
. use a common name for IRQs used
Greg Ungerer [Sat, 24 Dec 2011 00:13:36 +0000 (10:13 +1000)]
m68knommu: make 5272 FEC platform addressing consistent
If we make all FEC (ethernet) addressing consistent across all ColdFire
family members then we will be able to remove the duplicated plaform data
and use a single setup for all.
So modify the ColdFire 5272 FEC addressing so that:
. FECs are numbered from 0 up
. base addresses are absolute (not relative to MBAR peripheral register)
. use a common name for IRQs used
Greg Ungerer [Sat, 24 Dec 2011 00:10:13 +0000 (10:10 +1000)]
m68knommu: make 523x FEC platform addressing consistent
If we make all FEC (ethernet) addressing consistent across all ColdFire
family members then we will be able to remove the duplicated plaform data
and use a single setup for all.
So modify the ColdFire 523x FEC addressing so that:
. FECs are numbered from 0 up
. base addresses are absolute (not relative to MBAR peripheral register)
. use a common name for IRQs used
Greg Ungerer [Sat, 24 Dec 2011 00:05:34 +0000 (10:05 +1000)]
m68knommu: make 520x FEC platform addressing consistent
If we make all FEC (ethernet) addressing consistent across all ColdFire
family members then we will be able to remove the duplicated plaform data
and use a single setup for all.
So modify the ColdFire 520x FEC addressing so that:
. FECs are numbered from 0 up
. base addresses are absolute (not relative to MBAR peripheral register)
. use a common name for IRQs used
Greg Ungerer [Fri, 23 Dec 2011 15:23:35 +0000 (01:23 +1000)]
m68knommu: merge common ColdFire UART IRQ setup
Some ColdFire CPU UART hardware modules can configure the IRQ they use.
Currently the same setup code is duplicated in the init code for each of
these ColdFire CPUs. Merge all this code to a single instance.
Greg Ungerer [Fri, 23 Dec 2011 15:17:10 +0000 (01:17 +1000)]
m68knommu: merge common ColdFire UART platform setup code
The ColdFire UART is common to all ColdFire CPU's. No need to duplicate
its platform setup code for every CPU family member. Merge all the setup
code into a single shared file.
Greg Ungerer [Fri, 23 Dec 2011 15:08:47 +0000 (01:08 +1000)]
m68knommu: simplify the 54xx UART setup code
Simplify the UART setup code so that it no longer loops for each UART
present. Just make it do all the work it needs in a single function.
This will make the code easier to share when we move to a single set
of platform data for ColdFire UARTs.
Greg Ungerer [Fri, 23 Dec 2011 15:06:06 +0000 (01:06 +1000)]
m68knommu: simplify the 5407 UART setup code
Simplify the UART setup code so that it no longer loops for each UART
present. Just make it do all the work it needs in a single function.
This will make the code easier to share when we move to a single set
of platform data for ColdFire UARTs.
Greg Ungerer [Fri, 23 Dec 2011 15:04:22 +0000 (01:04 +1000)]
m68knommu: simplify the 532x UART setup code
Simplify the UART setup code so that it no longer loops for each UART
present. Just make it do all the work it needs in a single function.
This will make the code easier to share when we move to a single set
of platform data for ColdFire UARTs.
Greg Ungerer [Fri, 23 Dec 2011 15:02:43 +0000 (01:02 +1000)]
m68knommu: simplify the 5307 UART setup code
Simplify the UART setup code so that it no longer loops for each UART
present. Just make it do all the work it needs in a single function.
This will make the code easier to share when we move to a single set
of platform data for ColdFire UARTs.
Greg Ungerer [Fri, 23 Dec 2011 15:00:48 +0000 (01:00 +1000)]
m68knommu: simplify the 528x UART setup code
Simplify the UART setup code so that it no longer loops for each UART
present. Just make it do all the work it needs in a single function.
This will make the code easier to share when we move to a single set
of platform data for ColdFire UARTs.
Greg Ungerer [Fri, 23 Dec 2011 14:59:03 +0000 (00:59 +1000)]
m68knommu: simplify the 527x UART setup code
Simplify the UART setup code so that it no longer loops for each UART
present. Just make it do all the work it needs in a single function.
This will make the code easier to share when we move to a single set
of platform data for ColdFire UARTs.
Greg Ungerer [Fri, 23 Dec 2011 14:56:52 +0000 (00:56 +1000)]
m68knommu: simplify the 5272 UART setup code
Simplify the UART setup code so that it no longer loops for each UART
present. Just make it do all the work it needs in a single function.
This will make the code easier to share when we move to a single set
of platform data for ColdFire UARTs.
Greg Ungerer [Fri, 23 Dec 2011 14:55:49 +0000 (00:55 +1000)]
m68knommu: simplify the 5249 UART setup code
Simplify the UART setup code so that it no longer loops for each UART
present. Just make it do all the work it needs in a single function.
This will make the code easier to share when we move to a single set
of platform data for ColdFire UARTs.
Greg Ungerer [Fri, 23 Dec 2011 14:53:54 +0000 (00:53 +1000)]
m68knommu: simplify the 520x UART setup code
Simplify the UART setup code so that it no longer loops for each UART
present. Just make it do all the work it needs in a single function.
This will make the code easier to share when we move to a single set
of platform data for ColdFire UARTs.
Greg Ungerer [Fri, 23 Dec 2011 14:49:12 +0000 (00:49 +1000)]
m68knommu: simplify the 5206 UART setup code
Simplify the UART setup code so that it no longer loops for each UART
present. Just make it do all the work it needs in a single function.
This will make the code easier to share when we move to a single set
of platform data for ColdFire UARTs.
Greg Ungerer [Fri, 23 Dec 2011 14:46:37 +0000 (00:46 +1000)]
m68knommu: make 54xx UART platform addressing consistent
If we make all UART addressing consistent across all ColdFire family members
then we will be able to remove the duplicated plaform data and use a single
setup for all.
So modify the ColdFire 54xx UART addressing so that:
. UARTs are numbered from 0 up
. base addresses are absolute (not relative to MBAR peripheral register)
. use a common name for IRQs used
Greg Ungerer [Fri, 23 Dec 2011 14:43:13 +0000 (00:43 +1000)]
m68knommu: make 5407 UART platform addressing consistent
If we make all UART addressing consistent across all ColdFire family members
then we will be able to remove the duplicated plaform data and use a single
setup for all.
So modify the ColdFire 5407 UART addressing so that:
. UARTs are numbered from 0 up
. base addresses are absolute (not relative to MBAR peripheral register)
. use a common name for IRQs used
Greg Ungerer [Fri, 23 Dec 2011 14:41:07 +0000 (00:41 +1000)]
m68knommu: make 532x UART platform addressing consistent
If we make all UART addressing consistent across all ColdFire family members
then we will be able to remove the duplicated plaform data and use a single
setup for all.
So modify the ColdFire 532x UART addressing so that:
. UARTs are numbered from 0 up
. use a common name for IRQs used
Greg Ungerer [Fri, 23 Dec 2011 14:39:04 +0000 (00:39 +1000)]
m68knommu: make 528x UART platform addressing consistent
If we make all UART addressing consistent across all ColdFire family members
then we will be able to remove the duplicated plaform data and use a single
setup for all.
So modify the ColdFire 528x UART addressing so that:
. UARTs are numbered from 0 up
. use a common name for IRQs used
Greg Ungerer [Fri, 23 Dec 2011 14:36:03 +0000 (00:36 +1000)]
m68knommu: make 5307 UART platform addressing consistent
If we make all UART addressing consistent across all ColdFire family members
then we will be able to remove the duplicated plaform data and use a single
setup for all.
So modify the ColdFire 5307 UART addressing so that:
. UARTs are numbered from 0 up
. base addresses are absolute (not relative to MBAR peripheral register)
. use a common name for IRQs used
Greg Ungerer [Fri, 23 Dec 2011 14:33:31 +0000 (00:33 +1000)]
m68knommu: make 527x UART platform addressing consistent
If we make all UART addressing consistent across all ColdFire family members
then we will be able to remove the duplicated plaform data and use a single
setup for all.
So modify the ColdFire 527x UART addressing so that:
. UARTs are numbered from 0 up
. use a common name for IRQs used
Greg Ungerer [Fri, 23 Dec 2011 14:30:37 +0000 (00:30 +1000)]
m68knommu: make 5272 UART platform addressing consistent
If we make all UART addressing consistent across all ColdFire family members
then we will be able to remove the duplicated plaform data and use a single
setup for all.
So modify the ColdFire 5272 UART addressing so that:
. UARTs are numbered from 0 up
. base addresses are absolute (not relative to MBAR peripheral register)
Greg Ungerer [Fri, 23 Dec 2011 14:28:18 +0000 (00:28 +1000)]
m68knommu: make 5249 UART platform addressing consistent
If we make all UART addressing consistent across all ColdFire family members
then we will be able to remove the duplicated plaform data and use a single
setup for all.
So modify the ColdFire 5249 UART addressing so that:
. UARTs are numbered from 0 up
. base addresses are absolute (not relative to MBAR peripheral register)
. use a common name for IRQs used
Greg Ungerer [Fri, 23 Dec 2011 14:25:28 +0000 (00:25 +1000)]
m68knommu: make 523x UART platform addressing consistent
If we make all UART addressing consistent across all ColdFire family members
then we will be able to remove the duplicated plaform data and use a single
setup for all.
So modify the ColdFire 523x UART addressing so that:
. UARTs are numbered from 0 up
. use a common name for IRQs used
Greg Ungerer [Fri, 23 Dec 2011 14:21:18 +0000 (00:21 +1000)]
m68knommu: make 520x UART platform addressing consistent
If we make all UART addressing consistent across all ColdFire family members
then we will be able to remove the duplicated plaform data and use a single
setup for all.
So modify the ColdFire 520x UART addressing so that:
. UARTs are numbered from 0 up
. use a common name for IRQs used
Greg Ungerer [Fri, 23 Dec 2011 14:10:48 +0000 (00:10 +1000)]
m68knommu: make 5206 UART platform addressing consistent
If we make all UART addressing consistent across all ColdFire family members
then we will be able to remove the duplicated plaform data and use a single
setup for all.
So modify the ColdFire 5206 UART addressing so that:
. UARTs are numbered from 0 up
. base addresses are absolute (not relative to MBAR peripheral register)
. use a common name for IRQs used
Greg Ungerer [Thu, 9 Feb 2012 04:18:46 +0000 (14:18 +1000)]
m68k: merge the MMU and non-MMU versions of process.c
The MMU and non-MMU varients of the m68k arch process.c code are pretty
much the same. Only a few minor details differ between the two. The
majority of the difference is to deal with having or wanting hardware FPU
support. So merge them back into a single process.c file.
Greg Ungerer [Mon, 30 Jan 2012 01:58:21 +0000 (11:58 +1000)]
m68k: make support for FPU hardware configurable
The classic m68k code has always supported an FPU (although it may have
been a software emulated one). The non-MMU m68k code has never supported FPU
hardware. To help in merging common code create a configation setting that
signifies if we are builing in FPU support or not.
This switch, CONFIG_FPU, is set as per the current use cases. So it is
always enabled if CONFIG_MMU is set, and disabled otherwise. With a little
extra code it will be possible to disable it on the classic m68k platforms
as well, and to enable it on non-MMU platforms that do have hardware FPU.
The CONFIG_GENERIC_CMOS_UPDATE switch is always enabled for the non-MMU
m68k case. But the underlying code to support it, update_persistent_clock(),
doesn't end up doing anything on the currently supported non-MMU platforms.
No platforms supply the necessary function support for writing back the RTC.
So lets remove this option and support code. This also brings m68knommu
in line with the m68k, which doesn't enabled this switch either.
Greg Ungerer [Mon, 23 Jan 2012 05:34:58 +0000 (15:34 +1000)]
m68knommu: modify timer init code to make it consistent with m68k code
With a few small changes we can make the m68knommu timer init code the
same as the m68k code. By using the mach_sched_init function pointer
and reworking the current timer initializers to keep track of the common
m68k timer_interrupt() handler we end up with almost identical code for
m68knommu.
This will allow us to more easily merge the mmu and non-mmu m68k time.c
in future patches.
Greg Ungerer [Mon, 23 Jan 2012 03:25:56 +0000 (13:25 +1000)]
m68knommu: make persistent clock code consistent with m68k
The read_persistent_clock() code is different on m68knommu, for really no
reason. With a few changes to support function names and some code
re-organization the code can be made the same.
This will make it easier to merge the arch/m68k/kernel/time.c for m68k and
m68knommu in a future patch.
Greg Ungerer [Mon, 23 Jan 2012 03:12:41 +0000 (13:12 +1000)]
m68knommu: remove reduntant definitions of _ramvec
The base of the real RAM resident hardware vectors, _ramvec, is declared in
our asm/traps.h. No need to have local declarations spread around in other
files that use this. So remove them.
Greg Ungerer [Thu, 5 Jan 2012 05:51:13 +0000 (15:51 +1000)]
m68knommu: clean up linker script
There is a lot of years of collected cruft in the m68knommu linker script.
Clean it all up and use the well defined linker script support macros.
Support is maintained for building both ROM/FLASH based and RAM based setups.
No major changes to section layouts, though the rodata section is now lumped
in with the read/write data section.
Greg Ungerer [Wed, 23 Nov 2011 04:46:36 +0000 (14:46 +1000)]
m68knommu: hard set the ColdFire MBAR register on startup
The ColdFire MBAR register that holds the mapping of the peripheral region
on some ColdFire CPUs is configurable. It can be configured at some address
different to that of the bootloader that loaded the kernel. So hard set
the MBAR register mapping at kernel startup time.
Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Linus Torvalds [Sun, 4 Mar 2012 00:33:51 +0000 (16:33 -0800)]
Merge tag 'parisc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/parisc-2.6
PARISC fixes from James Bottomley:
"This is a set of build fixes to get the cross compiled architecture
testbeds building again"
* tag 'parisc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/parisc-2.6:
[PARISC] don't unconditionally override CROSS_COMPILE for 64 bit.
[PARISC] include <linux/prefetch.h> in drivers/parisc/iommu-helpers.h
[PARISC] fix compile break caused by iomap: make IOPORT/PCI mapping functions conditional
Linus Torvalds [Fri, 2 Mar 2012 23:21:48 +0000 (15:21 -0800)]
Merge tag 'hwmon-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/groeck/linux-staging
hhwmon fixes for 3.3-rc6 from Guenter Roeck:
These patches are necessary for correct operation and management of
F75387.
* tag 'hwmon-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/groeck/linux-staging:
hwmon: (f75375s) Catch some attempts to write to r/o registers
hwmon: (f75375s) Properly map the F75387 automatic modes to pwm_enable
hwmon: (f75375s) Make pwm*_mode writable for the F75387
hwmon: (f75375s) Fix writes to the pwm* attribute for the F75387
Linus Torvalds [Fri, 2 Mar 2012 23:21:15 +0000 (15:21 -0800)]
Merge tag 'fbdev-fixes-for-3.3-2' of git://github.com/schandinat/linux-2.6
fbdev fixes for 3.3 from Florian Tobias Schandinat
It includes:
- two fixes for OMAP HDMI
- one fix to make new OMAP functions behave as they are supposed to
- one Kconfig dependency fix
- two fixes for viafb for modesetting on VX900 hardware
* tag 'fbdev-fixes-for-3.3-2' of git://github.com/schandinat/linux-2.6:
OMAPDSS: APPLY: make ovl_enable/disable synchronous
OMAPDSS: panel-dvi: Add Kconfig dependency on I2C
viafb: fix IGA1 modesetting on VX900
viafb: select HW scaling on VX900 for IGA2
OMAPDSS: HDMI: hot plug detect fix
OMAPDSS: HACK: Ensure DSS clock domain gets out of idle when HDMI is enabled
Linus Torvalds [Fri, 2 Mar 2012 23:20:41 +0000 (15:20 -0800)]
Merge tag 'sound-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound
sound fixes for 3.3-rc6 from Takashi Iwai
This contains again regression fixes for various HD-audio and ASoC
regarding SSI and dapm shutdown path. In addition, a minor azt3328
fix and the correction of the new jack-notification strings in HD-audio.
* tag 'sound-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound:
ALSA: hda - Kill hyphenated names
ALSA: hda - Add a fake mute feature
ALSA: hda - Always set HP pin in unsol handler for STAC/IDT codecs
ALSA: azt3328 - Fix NULL ptr dereference on cards without OPL3
ALSA: hda/realtek - Fix resume of multiple input sources
ASoC: i.MX SSI: Fix DSP_A format.
ASoC: dapm: Check for bias level when powering down
Linus Torvalds [Fri, 2 Mar 2012 22:49:24 +0000 (14:49 -0800)]
vfs: split up name hashing in link_path_walk() into helper function
The code in link_path_walk() that finds out the length and the hash of
the next path component is some of the hottest code in the kernel. And
I have a version of it that does things at the full width of the CPU
wordsize at a time, but that means that we *really* want to split it up
into a separate helper function.
So this re-organizes the code a bit and splits the hashing part into a
helper function called "hash_name()". It returns the length of the
pathname component, while at the same time computing and writing the
hash to the appropriate location.
The code generation is slightly changed by this patch, but generally for
the better - and the added abstraction actually makes the code easier to
read too. And the new interface is well suited for replacing just the
"hash_name()" function with alternative implementations.
Linus Torvalds [Fri, 2 Mar 2012 22:47:15 +0000 (14:47 -0800)]
vfs: clarify and clean up dentry_cmp()
It did some odd things for unclear reasons. As this is one of the
functions that gets changed when doing word-at-a-time compares, this is
yet another of the "don't change any semantics, but clean things up so
that subsequent patches don't get obscured by the cleanups".
Linus Torvalds [Fri, 2 Mar 2012 22:32:59 +0000 (14:32 -0800)]
vfs: uninline full_name_hash()
.. and also use it in lookup_one_len() rather than open-coding it.
There aren't any performance-critical users, so inlining it is silly.
But it wouldn't matter if it wasn't for the fact that the word-at-a-time
dentry name patches want to conditionally replace the function, and
uninlining it sets the stage for that.
So again, this is a preparatory patch that doesn't change any semantics,
and only prepares for a much cleaner and testable word-at-a-time dentry
name accessor patch.
Linus Torvalds [Fri, 2 Mar 2012 22:23:30 +0000 (14:23 -0800)]
vfs: trivial __d_lookup_rcu() cleanups
These don't change any semantics, but they clean up the code a bit and
mark some arguments appropriately 'const'.
They came up as I was doing the word-at-a-time dcache name accessor
code, and cleaning this up now allows me to send out a smaller relevant
interesting patch for the experimental stuff.
Nikolaus Schulz [Tue, 28 Feb 2012 21:15:54 +0000 (16:15 -0500)]
hwmon: (f75375s) Catch some attempts to write to r/o registers
It makes no sense to attempt to manually configure the fan in auto mode,
or set the duty cycle directly in closed loop mode. The corresponding
registers are then read-only. If the user tries it nonetheless, error out
with EINVAL instead of silently doing nothing.
Nikolaus Schulz [Tue, 28 Feb 2012 21:15:53 +0000 (16:15 -0500)]
hwmon: (f75375s) Properly map the F75387 automatic modes to pwm_enable
The F75387 supports automatic fan control using either PWM duty cycle or
RPM speed values. Make the driver detect the latter mode, and expose the
different modes in sysfs as per pwm_enable, so that the user can switch
between them.
The interpretation of the pwm_enable attribute for the F75387 is adjusted
to be a superset of those values used for similar Fintek chips which do
not support automatic duty mode, with 2 mapping to automatic speed mode,
and moving automatic duty mode to the new value 4.
Toggling the duty mode via pwm_enable is currently denied for the F75387,
as the chip then simply reinterprets the fan configuration register values
according to the new mode, switching between RPM and PWM units, which
makes this a dangerous operation.
This patch introduces a new pwm mode into the driver. This is necessary
because the new mode (automatic pwm mode, 4) may already be enabled by the
BIOS, and the driver should not break existing functionality. This was seen
on at least one board.
Linus Torvalds [Fri, 2 Mar 2012 19:38:43 +0000 (11:38 -0800)]
Merge branches 'core-urgent-for-linus', 'perf-urgent-for-linus' and 'sched-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pulling latest branches from Ingo:
* 'core-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
memblock: Fix size aligning of memblock_alloc_base_nid()
* 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
perf probe: Ensure offset provided is not greater than function length without DWARF info too
perf tools: Ensure comm string is properly terminated
perf probe: Ensure offset provided is not greater than function length
perf evlist: Return first evsel for non-sample event on old kernel
perf/hwbp: Fix a possible memory leak
* 'sched-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
CPU hotplug, cpusets, suspend: Don't touch cpusets during suspend/resume
H. Peter Anvin [Fri, 2 Mar 2012 18:43:49 +0000 (10:43 -0800)]
regset: Return -EFAULT, not -EIO, on host-side memory fault
There is only one error code to return for a bad user-space buffer
pointer passed to a system call in the same address space as the
system call is executed, and that is EFAULT. Furthermore, the
low-level access routines, which catch most of the faults, return
EFAULT already.
Signed-off-by: H. Peter Anvin <hpa@zytor.com> Reviewed-by: Oleg Nesterov <oleg@redhat.com> Acked-by: Roland McGrath <roland@hack.frob.com> Cc: <stable@vger.kernel.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
H. Peter Anvin [Fri, 2 Mar 2012 18:43:48 +0000 (10:43 -0800)]
regset: Prevent null pointer reference on readonly regsets
The regset common infrastructure assumed that regsets would always
have .get and .set methods, but not necessarily .active methods.
Unfortunately people have since written regsets without .set methods.
Rather than putting in stub functions everywhere, handle regsets with
null .get or .set methods explicitly.
Signed-off-by: H. Peter Anvin <hpa@zytor.com> Reviewed-by: Oleg Nesterov <oleg@redhat.com> Acked-by: Roland McGrath <roland@hack.frob.com> Cc: <stable@vger.kernel.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Joerg Roedel [Wed, 29 Feb 2012 13:57:32 +0000 (14:57 +0100)]
perf/x86/kvm: Fix Host-Only/Guest-Only counting with SVM disabled
It turned out that a performance counter on AMD does not
count at all when the GO or HO bit is set in the control
register and SVM is disabled in EFER.
This patch works around this issue by masking out the HO bit
in the performance counter control register when SVM is not
enabled.
The GO bit is not touched because it is only set when the
user wants to count in guest-mode only. So when SVM is
disabled the counter should not run at all and the
not-counting is the intended behaviour.
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Avi Kivity <avi@redhat.com> Cc: Stephane Eranian <eranian@google.com> Cc: David Ahern <dsahern@gmail.com> Cc: Gleb Natapov <gleb@redhat.com> Cc: Robert Richter <robert.richter@amd.com> Cc: stable@vger.kernel.org # v3.2 Link: http://lkml.kernel.org/r/1330523852-19566-1-git-send-email-joerg.roedel@amd.com Signed-off-by: Ingo Molnar <mingo@elte.hu>
Linus Torvalds [Fri, 2 Mar 2012 02:27:43 +0000 (18:27 -0800)]
Merge git://www.linux-watchdog.org/linux-watchdog
Watchdog updates from Wim Van Sebroeck:
* git://www.linux-watchdog.org/linux-watchdog:
watchdog: fix GETTIMEOUT ioctl in booke_wdt
watchdog: update maintainers git entry
watchdog: Fix typo in pnx4008_wdt.c
watchdog: Fix typo in Kconfig
watchdog: fix error in probe() of s3c2410_wdt (reset at booting)
watchdog: hpwdt: clean up set_memory_x call for 32 bit
Linus Torvalds [Fri, 2 Mar 2012 02:26:48 +0000 (18:26 -0800)]
Merge tag 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator
Pull from Mark Brown:
"A simple, driver specific fix. This device isn't widely used outside
of Marvell reference boards most of which are probably used with their
BSPs rather than with mainline so low risk."
* tag 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator:
regulator: fix the ldo configure according to 88pm860x spec
Linus Torvalds [Fri, 2 Mar 2012 02:24:52 +0000 (18:24 -0800)]
Merge branch 'i2c-embedded/for-3.3' of git://git.pengutronix.de/git/wsa/linux-2.6
i2c bugfix from Wolfram Sang:
"This patch fixes a wrong assumption in the mxs-i2c-driver about a
command queue being done. Without it, we have seen races when the
bus was under load."
* 'i2c-embedded/for-3.3' of git://git.pengutronix.de/git/wsa/linux-2.6:
i2c: mxs: only flag completion when queue is completely done
Linus Torvalds [Fri, 2 Mar 2012 02:23:43 +0000 (18:23 -0800)]
Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux
DRM fixes from Dave Airlie:
intel: fixes for output regression on 965GM, an oops and a machine
hang
radeon: uninitialised var (that gcc didn't warn about for some reason)
+ a couple of correctness fixes.
exynos: fixes for various things, drop some chunks of unused code.
* 'drm-fixes' of git://people.freedesktop.org/~airlied/linux:
drm/radeon/kms/vm: fix possible bug in radeon_vm_bo_rmv()
drm/radeon: fix uninitialized variable
drm/radeon/kms: fix radeon_dp_get_modes for LVDS bridges (v2)
drm/i915: Remove use of the autoreported ringbuffer HEAD position
drm/i915: Prevent a machine hang by checking crtc->active before loading lut
drm/i915: fix operator precedence when enabling RC6p
drm/i915: fix a sprite watermark computation to avoid divide by zero if xpos<0
drm/i915: fix mode set on load pipe. (v2)
drm/exynos: exynos_drm.h header file fixes
drm/exynos: added panel physical size.
drm/exynos: added postclose to release resource.
drm/exynos: removed exynos_drm_fbdev_recreate function.
drm/exynos: fixed page flip issue.
drm/exynos: added possible_clones setup function.
drm/exynos: removed pageflip_event_list init code when closed.
drm/exynos: changed priority of mixer layers.
drm/exynos: Fix typo in exynos_mixer.c
Linus Torvalds [Fri, 2 Mar 2012 02:22:55 +0000 (18:22 -0800)]
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux
Pull s390 fixes from Martin Schwidefsky
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux:
[S390] memory hotplug: prevent memory zone interleave
[S390] crash_dump: remove duplicate include
[S390] KEYS: Enable the compat keyctl wrapper on s390x
Takashi Iwai [Thu, 1 Mar 2012 13:17:07 +0000 (14:17 +0100)]
Merge tag 'asoc-3.3' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus
A small fix for the SSI driver and a fix for system shutdown with modern
devices. Most of the modern devices will never get shut down normally
with a visible kernel log as the systems they're in tend not to shut
down often and when they do it's usually in form factors that don't have
a user visible console.
Tejun Heo [Tue, 28 Feb 2012 20:56:21 +0000 (05:56 +0900)]
memblock: Fix size aligning of memblock_alloc_base_nid()
memblock allocator aligns @size to @align to reduce the amount
of fragmentation. Commit:
7bd0b0f0da ("memblock: Reimplement memblock allocation using reverse free area iterator")
Broke it by incorrectly relocating @size aligning to
memblock_find_in_range_node(). As the aligned size is not
propagated back to memblock_alloc_base_nid(), the actually
reserved size isn't aligned.
While this increases memory use for memblock reserved array,
this shouldn't cause any critical failure; however, it seems
that the size aligning was hiding a use-beyond-allocation bug in
sparc64 and losing the aligning causes boot failure.
The underlying problem is currently being debugged but this is a
proper fix in itself, it's already pretty late in -rc cycle for
boot failures and reverting the change for debugging isn't
difficult. Restore the size aligning moving it to
memblock_alloc_base_nid().
Reported-by: Meelis Roos <mroos@linux.ee> Signed-off-by: Tejun Heo <tj@kernel.org> Cc: David S. Miller <davem@davemloft.net> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Andrew Morton <akpm@linux-foundation.org> Link: http://lkml.kernel.org/r/20120228205621.GC3252@dhcp-172-17-108-109.mtv.corp.google.com Signed-off-by: Ingo Molnar <mingo@elte.hu>
LKML-Reference: <alpine.SOC.1.00.1202130942030.1488@math.ut.ee>
Amit Shah [Wed, 29 Feb 2012 12:12:51 +0000 (17:42 +0530)]
virtio: balloon: leak / fill balloon across S4
commit e562966dbaf49e7804097cd991e5d3a8934fc148 added support for S4 to
the balloon driver. The freeze function did nothing to free the pages,
since reclaiming the pages from the host to immediately give them back
(if S4 was successful) seemed wasteful. Also, if S4 wasn't successful,
the guest would have to re-fill the balloon. On restore, the pages were
supposed to be marked freed and the free page counters were incremented
to reflect the balloon was totally deflated.
However, this wasn't done right. The pages that were earlier taken away
from the guest during a balloon inflation operation were just shown as
used pages after a successful restore from S4. Just a fancy way of
leaking lots of memory.
Instead of trying that, just leak the balloon on freeze and fill it on
restore/thaw paths. This works properly now. The optimisation to not
leak can be added later on after a bit of refactoring of the code.
Signed-off-by: Amit Shah <amit.shah@redhat.com> Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Tomi Valkeinen [Wed, 29 Feb 2012 08:48:22 +0000 (10:48 +0200)]
OMAPDSS: APPLY: make ovl_enable/disable synchronous
ovl->enable/disable are meant to be synchronous so that they can handle
the configuration of fifo sizes. The current kernel doesn't configure
fifo sizes yet, and so the code doesn't need to block to function (from
omapdss driver's perspective).
However, for the users of omapdss a non-blocking ovl->disable is
confusing, because they don't know when the memory area is not used
any more.
Furthermore, when the fifo size configuration is added in the next merge
window, the change from non-blocking to blocking could cause side
effects to the users of omapdss. So by making the functions block
already will keep them behaving in the same manner.
And, while not the main purpose of this patch, this will also remove the
compile warning:
drivers/video/omap2/dss/apply.c:350: warning:
'wait_pending_extra_info_updates' defined but not used
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
perf probe: Ensure offset provided is not greater than function length without DWARF info too
The 'perf probe' command allows kprobe to be inserted at any offset from
a function start, which results in adding kprobes to unintended
location. (example: perf probe do_fork+10000 is allowed even though
size of do_fork is ~904).
My previous patch https://lkml.org/lkml/2012/2/24/42 addressed the case
where DWARF info was available for the kernel. This patch fixes the
case where perf probe is used on a kernel without debuginfo available.
Acked-by: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com> Cc: Ananth N Mavinakayanahalli <ananth@in.ibm.com> Cc: Jason Baron <jbaron@redhat.com> Cc: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com> Cc: Srikar Dronamraju <srikar@linux.vnet.ibm.com> Cc: Steven Rostedt <rostedt@goodmis.org> Cc: Andrew Morton <akpm@linux-foundation.org> Link: http://lkml.kernel.org/r/4F4C544D.1010909@linux.vnet.ibm.com Signed-off-by: Prashanth Nageshappa <prashanth@linux.vnet.ibm.com> Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
David Ahern [Fri, 24 Feb 2012 19:31:38 +0000 (12:31 -0700)]
perf tools: Ensure comm string is properly terminated
If threads in a multi-threaded process have names shorter than the main
thread the comm for the named threads is not properly terminated.
E.g., for the process 'namedthreads' where each thread is named noploop%d
where %d is the thread number:
Before:
perf script -f comm,tid,ip,sym,dso
noploop:4ads 21616 400a49 noploop (/tmp/namedthreads)
The 'ads' in the thread comm bleeds over from the process name.
Namhyung Kim [Mon, 20 Feb 2012 01:47:26 +0000 (10:47 +0900)]
perf evlist: Return first evsel for non-sample event on old kernel
On old kernels that don't support sample_id_all feature,
perf_evlist__id2evsel() returns NULL for non-sampling events.
This breaks perf top when multiple events are given on command line. Fix
it by using first evsel in the evlist. This will also prevent getting
the same (potential) problem in such new tool/ old kernel combo.
Suggested-by: Arnaldo Carvalho de Melo <acme@ghostprotocols.net> Cc: Ingo Molnar <mingo@elte.hu> Cc: Paul Mackerras <paulus@samba.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/1329702447-25045-1-git-send-email-namhyung.kim@lge.com Signed-off-by: Namhyung Kim <namhyung.kim@lge.com> Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Linus Torvalds [Wed, 29 Feb 2012 19:24:39 +0000 (11:24 -0800)]
Merge tag 'fixes-3.3-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Arnd Bergmann says:
"Another set of arm-soc bug fixes on top of v3.3-rc5. The few larger
bits are all for devices that still need to get set up in board code.
Only three platforms are in this set of fixes: omap2+, pxa and lpc32xx."
* tag 'fixes-3.3-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (22 commits)
ARM: LPC32xx: serial.c: Fixed loop limit
ARM: LPC32xx: serial.c: HW bug workaround
ARM: LPC32xx: irq.c: Clear latched event
ARM: LPC32xx: Fix interrupt controller init
ARM: LPC32xx: Fix irq on GPI_28
ARM: OMAP2: fix mailbox init code
ARM: OMAP2+: gpmc-smsc911x: add required smsc911x regulators
ARM: OMAP1: Fix out-of-bounds array access for Innovator
OMAP3 EVM: remove out-of-bounds array access of gpio_leds
ARM: OMAP: Fix build error when mmc_omap is built as module
ARM: OMAP: Fix kernel panic with HSMMC when twl4030_gpio is a module
pxa/hx4700: add platform device and I2C info for AK4641 codec
arch/arm/mach-pxa/: included linux/gpio.h twice
arch/arm/mach-mmp/: some files include some headers twice
ARM: pxa: fix error handling in pxa2xx_drv_pcmcia_probe
ARM: pxa: fix including linux/gpio.h twice
ARM: pxa: fix mixed declarations and code in sharpsl_pm
ARM: pxa: fix wrong parsing gpio event on spitz
ARM: OMAP2+: usb-host: fix compile warning
ARM: OMAP4: Move the barrier memboclk_steal() as part of reserve callback
...
drm/radeon/kms/vm: fix possible bug in radeon_vm_bo_rmv()
The bo is removed from the list at the top of
radeon_vm_bo_rmv(), but then the list is used
in radeon_vm_bo_update_pte() to look up the vm.
remove the bo_list entry at the end of the
function instead.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jerome Glisse <j.glisse@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Takashi Iwai [Mon, 27 Feb 2012 14:00:58 +0000 (15:00 +0100)]
ALSA: hda - Add a fake mute feature
Some codecs don't supply the mute amp-capabilities although the lowest
volume gives the mute. It'd be handy if the parser provides the mute
mixers in such a case.
This patch adds an extension amp-cap bit (which is used only in the
driver) to represent the min volume = mute state. Also modified the
amp cache code to support the fake mute feature when this bit is set
but the real mute bit is unset.
In addition, conexant cx5051 parser uses this new feature to implement
the missing mute controls.
Christian König [Tue, 28 Feb 2012 22:19:20 +0000 (23:19 +0100)]
drm/radeon: fix uninitialized variable
Without this fix the driver randomly treats
textures as arrays and I'm really wondering
why gcc isn't complaining about it.
Signed-off-by: Christian König <deathsimple@vodafone.de> Reviewed-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
projects / mv-sheeva.git / log