Signed-off-by: Rob Herring <rob.herring@calxeda.com> Reviewed-by: Jamie Iles <jamie@jamieiles.com> Tested-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Grant Likely <grant.likely@secretlab.ca>
arm/imx6q: add core drivers clock, gpc, mmdc and src
It adds a number of core drivers support for imx6q, including clock,
General Power Controller (gpc), Multi Mode DDR Controller(mmdc) and
System Reset Controller (src).
Signed-off-by: Rob Herring <rob.herring@calxeda.com> Reviewed-by: Jamie Iles <jamie@jamieiles.com> Tested-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Grant Likely <grant.likely@secretlab.ca>
Rob Herring [Thu, 29 Sep 2011 02:25:31 +0000 (21:25 -0500)]
ARM: gic: add irq_domain support
Convert the gic interrupt controller to use irq domains in preparation
for device-tree binding and MULTI_IRQ. This allows for translation between
GIC interrupt IDs and Linux irq numbers.
The meaning of irq_offset has changed. It now is just the number of skipped
GIC interrupt IDs for the controller. It will be 16 for primary GIC and 32
for secondary GICs.
Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Marc Zyngier <marc.zyngier@arm.com> Reviewed-by: Jamie Iles <jamie@jamieiles.com> Tested-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Grant Likely <grant.likely@secretlab.ca>
Rob Herring [Fri, 30 Sep 2011 15:48:38 +0000 (10:48 -0500)]
irq: support domains with non-zero hwirq base
Interrupt controllers can have non-zero starting value for h/w irq numbers.
Adding support in irq_domain allows the domain hwirq numbering to match
the interrupt controllers' numbering.
As this makes looping over irqs for a domain more complicated, add loop
iterators to iterate over all hwirqs and irqs for a domain.
Signed-off-by: Rob Herring <rob.herring@calxeda.com> Reviewed-by: Jamie Iles <jamie@jamieiles.com> Tested-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Thomas Gleixner <tglx@linutronix.de>
Rob Herring [Tue, 20 Sep 2011 20:13:50 +0000 (15:13 -0500)]
of/irq: introduce of_irq_init
of_irq_init will scan the devicetree for matching interrupt controller
nodes. Then it calls an initialization function for each found controller
in the proper order with parent nodes initialized before child nodes.
Based on initial pseudo code from Grant Likely.
Changes in v4:
- Drop unnecessary empty list check
- Be more verbose on errors
- Simplify "if (!desc) WARN_ON(1)" to "if (WARN_ON(!desc))"
Changes in v3:
- add missing kfree's found by Jamie
- Implement Grant's comments to simplify the init loop
- fix function comments
Changes in v2:
- Complete re-write of list searching code from Grant Likely
Signed-off-by: Rob Herring <rob.herring@calxeda.com> Reviewed-by: Jamie Iles <jamie@jamieiles.com> Tested-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Grant Likely <grant.likely@secretlab.ca>
Mark Brown [Mon, 17 Oct 2011 23:46:50 +0000 (08:46 +0900)]
gpio/samsung: Complain loudly if we don't know the SoC
If we don't know the SoC type then we won't add any chips which is rather
unfortunate as neither GPIO nor pinmux APIs will work, breaking lots of
different subsystems. Logging at least provides a hint to the user as to
what's gone wrong.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Mark Brown [Mon, 17 Oct 2011 23:39:57 +0000 (08:39 +0900)]
ARM: S3C64XX: Fix SoC identification for S3C64xx devices
The IS_SAMSUNG_CPU() macro works by comparing the CPU ID mask exactly with
the CPU ID. This was failing for S3C64xx SoCs as in order to support
identification of the exact device the mask covers both variants of the
chip, meaning that the test would always fail on S3C6410 devices. This in
turn caused the core GPIO subsystem to fail to identify the CPU and not
support any GPIOs, crippling the system.
As a minimally invasive fix change the test for the class to be done by
checking each implementation and oring them together.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Shawn Guo [Mon, 17 Oct 2011 06:15:10 +0000 (14:15 +0800)]
mmc: mxcmmc: explicitly includes mach/hardware.h
When indirect inclusion to <mach/hardware.h> via <mach/gpio.h> gets
removed, we will see the following compile error.
CC drivers/mmc/host/mxcmmc.o
drivers/mmc/host/mxcmmc.c: In function ‘mxcmci_init_card’:
drivers/mmc/host/mxcmmc.c:811:2: error: implicit declaration of function ‘cpu_is_mx3’
Shawn Guo [Mon, 17 Oct 2011 06:15:09 +0000 (14:15 +0800)]
arm/imx: explicitly includes mach/hardware.h in pm-imx27.c
The pm-imx27.c references a number of things requiring the explicit
inclusion of mach/hardware.h. Otherwise, when indirect inclusion
to mach/hardware.h gets cleaned up, we will see the following
compile error.
CC arch/arm/mach-imx/pm-imx27.o
arch/arm/mach-imx/pm-imx27.c: In function ‘mx27_suspend_enter’:
arch/arm/mach-imx/pm-imx27.c:22:3: error: implicit declaration of function ‘IOMEM’
arch/arm/mach-imx/pm-imx27.c:22:3: error: implicit declaration of function ‘IMX_IO_P2V’
arch/arm/mach-imx/pm-imx27.c: In function ‘mx27_pm_init’:
arch/arm/mach-imx/pm-imx27.c:42:2: error: implicit declaration of function ‘cpu_is_mx27’
Shawn Guo [Mon, 17 Oct 2011 06:15:08 +0000 (14:15 +0800)]
arm/imx: remove mx27_setup_weimcs() from mx27.h
The helper function mx27_setup_weimcs() references IOMEM() and
IMX_IO_P2V() but without required header mach/hardware.h included
in mx27.h. This will break the build of those mx27 file with no
direct inclusion of mach/hardware.h, or when indirect inclusion to
mach/hardware.h breaks.
For example, when the inclusion of mach/hardware.h gets removed from
mach/gpio.h, we will see the following compile error.
CC arch/arm/mach-imx/pm-imx27.o
In file included from arch/arm/mach-imx/pm-imx27.c:14:0:
arch/arm/plat-mxc/include/mach/mx27.h: In function ‘mx27_setup_weimcs’:
arch/arm/plat-mxc/include/mach/mx27.h:138:2: error: implicit declaration of function ‘IOMEM’
arch/arm/plat-mxc/include/mach/mx27.h:138:2: error: implicit declaration of function ‘IMX_IO_P2V’
This patch removes mx27_setup_weimcs() from mx27.h and makes it local
to mach-pcm038.c, which is the only user for this helper.
Shawn Guo [Mon, 17 Oct 2011 06:15:07 +0000 (14:15 +0800)]
arm/imx: explicitly includes mach/hardware.h in mach-kzm_arm11_01.c
The mach-kzm_arm11_01.c references a number of things requiring the
explicit inclusion of mach/hardware.h. Otherwise, when indirect
inclusion to mach/hardware.h gets cleaned up, we will see the following
compile error.
CC arch/arm/mach-imx/mach-kzm_arm11_01.o
arch/arm/mach-imx/mach-kzm_arm11_01.c:71:3: error: implicit declaration of function ‘IOMEM’
arch/arm/mach-imx/mach-kzm_arm11_01.c:71:3: error: implicit declaration of function ‘IMX_IO_P2V_MODULE’
arch/arm/mach-imx/mach-kzm_arm11_01.c:71:14: error: ‘MX31_CS4’ undeclared here (not in a function)
arch/arm/mach-imx/mach-kzm_arm11_01.c:71:14: error: ‘MX31_CS5’ undeclared here (not in a function)
arch/arm/mach-imx/mach-kzm_arm11_01.c:71:3: error: implicit declaration of function ‘IMX_IO_P2V’
Shawn Guo [Mon, 17 Oct 2011 06:15:06 +0000 (14:15 +0800)]
arm/imx: remove mx31_setup_weimcs() from mx31.h
The helper function mx31_setup_weimcs() references IOMEM() and
IMX_IO_P2V() but without required header mach/hardware.h included
in mx31.h. This will break the build of those mx31 based board file
with no direct inclusion of mach/hardware.h, or when indirect inclusion
to mach/hardware.h breaks.
For example, when the inclusion of mach/hardware.h gets removed from
mach/gpio.h, we will see the following compile error.
CC arch/arm/mach-imx/mach-pcm037_eet.o
In file included from arch/arm/mach-imx/devices-imx31.h:9:0,
from arch/arm/mach-imx/mach-pcm037_eet.c:20:
arch/arm/plat-mxc/include/mach/mx31.h: In function ‘mx31_setup_weimcs’:
arch/arm/plat-mxc/include/mach/mx31.h:129:2: error: implicit declaration of function ‘IOMEM’
arch/arm/plat-mxc/include/mach/mx31.h:129:2: error: implicit declaration of function ‘IMX_IO_P2V’
This patch removes mx31_setup_weimcs() from mx31.h and makes it local
to mach-qong.c, which is the only user for this helper.
Linus Torvalds [Mon, 17 Oct 2011 15:24:24 +0000 (08:24 -0700)]
Avoid using variable-length arrays in kernel/sys.c
The size is always valid, but variable-length arrays generate worse code
for no good reason (unless the function happens to be inlined and the
compiler sees the length for the simple constant it is).
Also, there seems to be some code generation problem on POWER, where
Henrik Bakken reports that register r28 can get corrupted under some
subtle circumstances (interrupt happening at the wrong time?). That all
indicates some seriously broken compiler issues, but since variable
length arrays are bad regardless, there's little point in trying to
chase it down.
"Just don't do that, then".
Reported-by: Henrik Grindal Bakken <henribak@cisco.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: stable@kernel.org Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Shawn Guo [Fri, 19 Aug 2011 04:56:59 +0000 (05:56 +0100)]
arm/imx: use Kconfig choice for low-level debug UART selection
Now that the DEBUG_LL UART can be selected by a Kconfig choice,
simplify the #ifdefery in debug-macro.S and add entries to the
top-level Kconfig.debug instead.
Will Deacon [Tue, 16 Aug 2011 21:30:28 +0000 (22:30 +0100)]
ARM: realview: use Kconfig choice for debug UART selection
Now that the DEBUG_LL UART can be selected by a Kconfig choice, simplify
the #ifdefery in debug-macro.S and add entries to the top-level
Kconfig.debug instead.
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
Will Deacon [Tue, 9 Aug 2011 11:24:07 +0000 (12:24 +0100)]
ARM: versatile: convert logical CPU numbers to physical numbers
This patch uses the new cpu_logical_map() macro for converting logical
CPU numbers into physical numbers when dealing with the pen_release
variable in the SMP boot and CPU hotplug paths.
Will Deacon [Tue, 9 Aug 2011 11:21:36 +0000 (12:21 +0100)]
ARM: ux500: convert logical CPU numbers to physical numbers
This patch uses the new cpu_logical_map() macro for converting logical
CPU numbers into physical numbers when dealing with the pen_release
variable in the SMP boot and CPU hotplug paths.
Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
Will Deacon [Tue, 9 Aug 2011 11:13:53 +0000 (12:13 +0100)]
ARM: shmobile: convert logical CPU numbers to physical numbers
This patch uses the new cpu_logical_map() macro for converting logical
CPU numbers into physical numbers when dealing with the SCU in the SMP
boot path for sh73a0.
Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Paul Mundt <lethal@linux-sh.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
Will Deacon [Tue, 9 Aug 2011 11:02:27 +0000 (12:02 +0100)]
ARM: msm: convert logical CPU numbers to physical numbers
This patch uses the new cpu_logical_map() macro for converting logical
CPU numbers into physical numbers when dealing with the pen_release
variable in the SMP boot and CPU hotplug paths.
Tested-and-acked-by: David Brown <davidb@codeaurora.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
Will Deacon [Tue, 9 Aug 2011 10:29:19 +0000 (11:29 +0100)]
ARM: exynos4: convert logical CPU numbers to physical numbers
This patch uses the new cpu_logical_map() macro for converting logical
CPU numbers into physical numbers when dealing with the pen_release
variable in the SMP boot and CPU hotplug paths.
Cc: Kukjin Kim <kgene.kim@samsung.com> Tested-and-acked-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
Barry Song [Fri, 30 Sep 2011 13:43:12 +0000 (14:43 +0100)]
ARM: 7114/1: cache-l2x0: add resume entry for l2 in secure mode
we save the l2x0 registers at the first initialization, and platform codes
can get them to restore l2x0 status after wakeup.
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Mark Rutland [Wed, 17 Aug 2011 17:03:17 +0000 (18:03 +0100)]
ARM: 7023/1: L2x0: Add interrupts property to OF binding
Following the discussion here:
http://lists.ozlabs.org/pipermail/devicetree-discuss/2011-August/007301.html
The L2x0 L2 Cache Controllers support a combined interrupt line
which can be used for several events (e.g. read/write/parity errors on
tag/data RAM, event counter increment/overflow). Unfortunately the
OF binding added in c519ecf2 ("ARM: 7009/1: l2x0: Add OF based
initialization") does not represent the interrupt.
This patch adds an "interrupts" property to the L2x0 OF binding,
representing the combined interrupt line.
Signed-off-by: Mark Rutland <mark.rutland@arm.com> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Will Deacon <will.deacon@arm.com> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Olof Johansson <olof@lixom.net> Cc: Barry Song <21cnbao@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Barry Song [Wed, 14 Sep 2011 02:20:01 +0000 (03:20 +0100)]
ARM: 7090/1: CACHE-L2X0: filter start address can be 0 and is often 0
this patch fixes the error in Rob Herring's
ARM: 7009/1: l2x0: Add OF based initialization
http://www.spinics.net/lists/arm-kernel/msg131123.html
it has been in rmk/for-next with commit 41c86ff5b
Cc: Shawn Guo <shawn.guo@linaro.org> Cc: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Barry Song <Baohua.Song@csr.com> Acked-by: Rob Herring <robherring2@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Barry Song [Fri, 9 Sep 2011 09:30:34 +0000 (10:30 +0100)]
ARM: 7089/1: L2X0: add explicit cpu_relax() for busy wait loop
using cpu_relax in busy loops is a well-known idiom in the kernel.
It's more for documentation purposes than technically needed here.
Signed-off-by: Barry Song <Baohua.Song@csr.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Jamie Iles <jamie@jamieiles.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Rob Herring [Wed, 3 Aug 2011 17:12:05 +0000 (18:12 +0100)]
ARM: 7009/1: l2x0: Add OF based initialization
This adds probing for ARM L2x0 cache controllers via device tree. Support
includes the L210, L220, and PL310 controllers. The binding allows setting
up cache RAM latencies and filter addresses (PL310 only).
Signed-off-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Olof Johansson <olof@lixom.net> Acked-by: Barry Song <21cnbao@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Will Deacon [Mon, 3 Oct 2011 17:29:03 +0000 (18:29 +0100)]
ARM: 7116/1: debug: provide dummy default option for DEBUG_LL UART choice
Defaulting to DEBUG_ICEDCC will cause systems to hang during boot unless
a hardware debugger is listening to the debug comms. channel.
This patch adds a dummy UART option as the default DEBUG_LL choice which
requires the platform to do the right thing.
Acked-by: Stephen Boyd <sboyd@codeaurora.org> Tested-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Stephen Boyd [Thu, 22 Sep 2011 19:28:36 +0000 (20:28 +0100)]
ARM: 7097/1: debug: Move DEBUG_ICEDCC into the DEBUG_LL choice
DEBUG_ICEDCC support is just another DEBUG_LL choice and
selecting it along with other DEBUG_LL options doesn't make
much sense. Put it into the DEBUG_LL choice to avoid confusion.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Stephen Boyd [Thu, 22 Sep 2011 19:28:35 +0000 (20:28 +0100)]
ARM: 7096/1: debug: Add UART1 config choices
ARM patch 7072/1 (debug: use kconfig choice for selecting
DEBUG_LL UART) didn't notice that the Kconfigs relied on being
unselected to configure a different serial port. Since there is
no NONE option in a choice menu, explicitly add the other option
so that both serial ports can be selected.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Will Deacon [Thu, 1 Sep 2011 18:04:44 +0000 (19:04 +0100)]
ARM: 7073/1: debug: augment DEBUG_LL Kconfig help to clarify behaviour
Enabled DEBUG_LL hardcodes the UART address into the kernel and results
in a non-portable kernel image. Since this option is only intended for
use when debugging early boot failures, supporting multiple platforms
in such a configuration is not the intended use-case.
This patch documents this limitation in the DEBUG_LL Kconfig help text,
so that users are aware of the portability restrictions that are associated
with enabling low-level debugging support.
Reported-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Will Deacon [Thu, 1 Sep 2011 17:58:51 +0000 (18:58 +0100)]
ARM: 7072/1: debug: use kconfig choice for selecting DEBUG_LL UART
Enabling CONFIG_DEBUG_LL (which is required for earlyprintk) hardwires
the debug UART address into the kernel, so that we can print before the
platform is initialised.
If the user inadvertently selects multiple platforms with DEBUG_LL
enabled, the UART address may not be correct and will likely cause the
kernel to hang in the very early stages of boot.
This patch, based on a skeleton from Russell, uses a Kconfig choice for
selecting the DEBUG_LL UART, therefore allowing the user to make a
choice about the supported platform when DEBUG_LL is enabled.
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Jamie Iles [Sat, 8 Oct 2011 10:20:42 +0000 (11:20 +0100)]
ARM: 7115/4: move __exception and friends to asm/exception.h
The definition of __exception_irq_entry for
CONFIG_FUNCTION_GRAPH_TRACER=y needs linux/ftrace.h, but this creates a
circular dependency with it's current home in asm/system.h. Create
asm/exception.h and update all current users.
v4: - rebase to rmk/for-next
v3: - remove redundant includes of linux/ftrace.h
v2: - document the usage restricitions of __exception*
Cc: Zoltan Devai <zdevai@gmail.com> Signed-off-by: Jamie Iles <jamie@jamieiles.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Shawn Guo [Thu, 6 Oct 2011 14:19:14 +0000 (15:19 +0100)]
ARM: 7124/1: smp: Add a localtimer handler callable from C code
In order to be able to handle localtimer directly from C code instead of
assembly code, introduce handle_local_timer(), which is modeled after
handle_IRQ().
Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
ARM: 7100/1: smp_scu: remove __init annotation from scu_enable()
When Cortex-A9 MPCore resumes from Dormant or Shutdown modes,
SCU needs to be re-enabled. This patch removes __init annotation
from function scu_enable(), so that platform resume procedure can
call it to re-enable SCU.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Vincent Guittot [Mon, 8 Aug 2011 12:21:59 +0000 (13:21 +0100)]
ARM: 7011/1: Add ARM cpu topology definition
The affinity between ARM processors is defined in the MPIDR register.
We can identify which processors are in the same cluster,
and which ones have performance interdependency. We can define the
cpu topology of ARM platform, that is then used by sched_mc and sched_smt.
The default state of sched_mc and sched_smt config is disable.
When enabled, the behavior of the scheduler can be modified with
sched_mc_power_savings and sched_smt_power_savings sysfs interfaces.
Changes since v4 :
* Remove unnecessary parentheses and blank lines
Changes since v3 :
* Update the format of printk message
* Remove blank line
Changes since v2 :
* Update the commit message and some comments
Changes since v1 :
* Update the commit message
* Add read_cpuid_mpidr in arch/arm/include/asm/cputype.h
* Modify header of arch/arm/kernel/topology.c
* Modify tests and manipulation of MPIDR's bitfields
* Modify the place and dependancy of the config
* Modify Noop functions
Signed-off-by: Vincent Guittot <vincent.guittot@linaro.org> Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>