Tim Harvey [Tue, 9 Sep 2014 06:07:30 +0000 (23:07 -0700)]
ARM: dts: imx: ventana: cleanup pinctrl groups
Follow the conventions for pinctrl:
- grouping pinctrl in logical alphabatized groups
- remove any pinctrl not being used by a driver or needed by user
- move iomuxc to bottom of file for readability
Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The general device-tree rule is to not include nodes that do not have a driver
or bindings in a dts/dtsi. Remove the place-holder nodes from the Gateworks
Ventana boards until a time that a driver with proper bindings exists.
Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
ARM: dts: imx28-tx28: remove spidev labels and add third instance of spidev
The labels on the spidev nodes are not used and not required, so
remove them. The TX28 supports 3 chipselects on the SPI
interface. Make all those chipselects available to the user.
ARM: dts: imx6qdl-sabresd: Configure the pins locally
Passing '0x80000000' to the pin configuration means that kernel will skip the
IOMUXC_SW_PAD_CTL configuration and will use whathever values come from the
bootloader.
Instead of relying on the bootloader setup, let's configure it in the kernel to
have predictable settings.
'0x1b0b0' is the default POR value for all these pins and has also been verified
that the pins are using this value by manually inspecting the IOMUXC_SW_PAD_CTL
registers, so no functional change has been made.
Rabeeh Khoury [Sat, 23 Aug 2014 09:11:47 +0000 (10:11 +0100)]
ARM: dts: hummingboard: gpio-ir on gpio 3,5
HummingBoard after rev 2.0 and the production one starting rev 3.0 uses
gpio 3,5 (EIM_DA5 pad) as the gpio infra red receiver input.
Since the original Carrier1 board is obsolete and we are retiring it,
update the DT file for this. This will mean IR reception will not
work on Carrier1 with this DT file.
Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Stefan Agner [Mon, 18 Aug 2014 20:07:17 +0000 (22:07 +0200)]
ARM: dts: vf610-twr: Add USB support
Add USB support for Freescale Vybrid tower. The USB hosts over-current
protection signal is not connected to the PHY's over- current
protection, hence we need to disable it.
Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Stefan Agner [Mon, 18 Aug 2014 20:07:16 +0000 (22:07 +0200)]
ARM: dts: vf610-colibri: Add USB support
Add USB support for Colibri VF61 modules. The Colibri standard pinout
defines a pin for USB over-current. However, due to lack of pinmux
options, the USB hosts over-current protection signal of the Colibri
standard could not be connected to the PHY's over-current protection.
Hence we need to disable the over-current functionality of the USB
controller.
Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Stefan Agner [Mon, 18 Aug 2014 20:07:14 +0000 (22:07 +0200)]
ARM: dts: vf610: Add usbmisc for non-core registers
Add device tree node for usbmisc which controls the non-core USB
registers. This is required to use the property to disable the over-
current detection.
Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Stefan Agner [Mon, 18 Aug 2014 20:07:11 +0000 (22:07 +0200)]
ARM: dts: vf610: Add USB PHY and controller
This adds USB PHY and USB controller nodes. Vybrid SoCs have two
independent USB cores which each supports DR (dual role). However,
real OTG is not supported since the OTG ID pin is not available.
The PHYs are located within the anadig register range, hence we need
to change the length of the anadig registers.
Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
[ukl: rebase from ancient kernel version] Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Lucas Stach [Wed, 23 Jul 2014 17:29:11 +0000 (19:29 +0200)]
ARM: dts: imx6qdl-sabresd: add always on pcie regulator
Everything in the PCI specification assumes devices to be
enumerable on startup. This is only possible if they have
power available.
A future improvement may allow this regulator to be switched
off for D3hot and D3cold power states, but there is a lot
of work to do the pcie host controller side for this to work.
To keep things simple always enable the regulator for now.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Stefan Agner [Fri, 18 Jul 2014 14:25:18 +0000 (16:25 +0200)]
ARM: dts: vf610-colibri: split device tree for carrier boards
The Colibri VF61 is a module which needs a carrier board to actually
run. Different carrier board have different hardware support, hence
we should reflect this in the device tree files. This patch adds the
Colibri Evaluation Board, which supports almost all peripherals
defined in the Colibri standard.
Also align the compatible naming, file splitting and file naming with
the scheme which was choosen for the Tegra based modules.
Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The imx weim driver is used by some mx27/mx1 boards, so let's enable it by
default.
Generated this patch by doing:
- make imx_v4_v5_defconfig
- make menuconfig and manually select CONFIG_IMX_WEIM
- make savedefconfig
- cp defconfig arch/arm/configs/imx_v4_v5_defconfig
ARM: imx: source gpt per clk from OSC for system timer
On i.MX6Q TO > 1.0, i.MX6DL and i.MX6SX, gpt per clock
can be from OSC instead of ipg_per, as ipg_per's rate
may be scaled when system enter low bus mode, to keep
system timer NOT drift, better to make gpt per clock
at fixed rate, here add support for gpt per clock to
be from OSC which is at fixed rate always.
There are some difference on this implementation of
gpt per clock source, see below for details:
i.MX6Q TO > 1.0: GPT_CR_CLKSRC, b'101 selects fix clock
of OSC / 8 for gpt per clk;
i.MX6DL and i.MX6SX: GPT_CR_CLKSRC, b'101 selects OSC
for gpt per clk, and we must enable GPT_CR_24MEM to
enable OSC clk source for gpt per, GPT_PR_PRESCALER24M
is for pre-scaling of this OSC clk, here set it to 8
to make gpt per clk is 3MHz;
i.MX6SL: ipg_per can be from OSC directly, so no need to
implement this new clk source for gpt per.
Add gpt_3m clock for i.mx6qdl, as gpt can source clock
from OSC, some i.MX6 series SOCs has fixed divider of
8 for gpt clock, so here add a fix clk of gpt_3m.
i.MX6Q TO1.0 has no gpt_3m option, so force it to be
from ipg_per.
ARM: imx: fix register offset of pll7_usb_host gate clock
There is a copy&paste error on register offset of pll7_usb_host gate
clock introduced by i.MX6 PLL bypass support patches. The error breaks
the ENET function, because it overwrites the pll6_enet gate bit.
Correct the offset for all i.MX6 clock drivers.
Thanks to Fugang Duan <B38611@freescale.com> for spotting the error.
Shawn Guo [Tue, 26 Aug 2014 15:06:33 +0000 (23:06 +0800)]
ARM: imx: remove ENABLE and BYPASS bits from clk-pllv3 driver
Since ENABLE and BYPASS bits of PLLs are now implemented as separate
gate and mux clocks by clock drivers, the code handling these two bits
can be removed from clk-pllv3 driver.
This is the same change for imx6sx clock driver as "ARM: imx6q: add BYPASS
support for PLL clocks" for imx6q. The difference is that only anaclk1
is available on imx6sx.
This is the same change for imx6sl clock driver as "ARM: imx6q: add BYPASS
support for PLL clocks" for imx6q. The difference is that only anaclk1
is available on imx6sl.
The imx6q clock driver currently hard-codes all PLL clocks to source
from OSC24M without BYPASS support. The patch adds the missing lvds_in
clock which is mutually exclusive with lvds_gate, and implements BYPASS
and BYPASS_CLK_SRC selection for PLL clocks as per Figure 10-3. Primary
Clock Generation in IMX6DQRM, i.e. both BYPASS_CLK_SRC and BYPASS bits
are implemented as mux clocks, and ENABLE bit of PLL clocks is
implemented as a gate clock after BYPASS mux.
Shawn Guo [Tue, 26 Aug 2014 07:06:33 +0000 (15:06 +0800)]
ARM: imx: add an exclusive gate clock type
There are a couple of gate clocks are mutually exclusive on i.MX6, i.e.
LVDSCLK1_IBEN and LVDSCLK1_OBEN. They cannot be enabled simultaneously.
This patches adds an exclusive gate clock type specifically for such
case. The clock driver will need to call imx_clk_gate_exclusive() to
register a gate clock with parameter exclusive_mask indicating the mask
of gate bits which are mutually exclusive to this gate clock.
Right now, it only handles the exclusive gate clocks which are defined
in a single hardware register, which is the case we're running into
today. But it can be extended to handle exclusive gate clocks defined
in different registers later if needed.
ARM: clk-imx6sl: correct the pxp and epdc axi clock selections
The parent clocks of IMX6SL_CLK_PXP_AXI_SEL and IMX6SL_CLK_EPDC_AXI_SEL
clocks are not the same. So split the epdc_pxp_sels into two different
clock selections 'pxp_axi_sels' and 'epdc_axi_sels'.
Shengjiu Wang [Fri, 8 Aug 2014 07:02:47 +0000 (15:02 +0800)]
ARM: clk-imx6q: refine clock tree for ESAI
There are three clock for ESAI, esai_extal, esai_ipg, esai_mem. Rename
'esai' to 'esai_extal', 'esai_ahb' to 'esai_mem', and add 'esai_ipg'.
Make the clock for ESAI more clear and align them with imx6sx.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Stefan Agner [Tue, 29 Jul 2014 14:20:28 +0000 (16:20 +0200)]
ARM: imx: clk-vf610: introduce clks_init_on
At the end of the boot process, the clock framework might disable
required main PLL's. So far, this was no issue since drivers
requested clocks, which are descended of the main PLL's (e.g.
pll1_pfd1, which provides the system clock).
To archive the full 500MHz system clock, DDR clock need to be a
descendant of PLL2 rather than PLL1 (DDRC_CLK_SEL set to 0). The
bootloader sets up the clocks accordingly before making use of
DDR at all. However, in Linux, there is no driver using PLL2,
which lead to PLL2 being disabled by the clock framework.
With this patch, we make sure that the main system clock and the
DDR clock are initially enabled and are kept enabled.
Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Jason Liu [Tue, 5 Nov 2013 04:03:18 +0000 (12:03 +0800)]
ARM: i.MX6: add more chip revision support
Add more revision support for the new i.MX6DQ tape-out (TO1.5). This
TO1.5 is the Rev 1.3 as documented in i.MX6DQ data sheet, because TO1.3
and TO1.4 are never revealed.
Signed-off-by: Jason Liu <r64343@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
With commit c716483c3db1 ("ARM: 8122/1: smp_scu: enable SCU standby
support"), the STANDBY bit of SCU is handled by core function
scu_enable(). So imx_scu_standby_enable() can be removed now.
pcm970-baseboard.c and mach-pcm038.c can be replaced with their
devicetree equivalents: imx27-phytec-phycore-rdk.dts and
imx27-phytec-phycore-som.dtsi respectively, so remove the board files.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Alexander Shiyan [Sat, 26 Jul 2014 13:41:08 +0000 (17:41 +0400)]
ARM: i.MX: Remove mach-cpuimx27sd board file
eukrea_mbimx27-baseboard.c and mach-cpuimx27.c can be replaced with their
devicetree equivalents: imx27-eukrea-mbimxsd27-baseboard.dts and
imx27-eukrea-cpuimx27.dtsi respectively, so remove the board files.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Acked-by: Eric Bénard <eric@eukrea.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Alexander Stein [Thu, 24 Jul 2014 07:05:21 +0000 (09:05 +0200)]
ARM: imx: iomux: Do not export symbol without public declaration
The iomux function declarations are in headers only accessible in this
directory. Thus those can't be used in any module. None of the
objects in this directory is tristate. Neither can the header be included
in out-of-tree modules.
Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Merge tag 'xtensa-20140830' of git://github.com/czankel/xtensa-linux
Pull Xtensa updates from Chris Zankel:
"Xtensa improvements for 3.17:
- support highmem on cores with aliasing data cache. Enable highmem
on kc705 by default
- simplify addition of new core variants (no need to modify Kconfig /
Makefiles)
- improve robustness of unaligned access handler and its interaction
with window overflow/underflow exception handlers
- deprecate atomic and spill registers syscalls
- clean up Kconfig: remove orphan MATH_EMULATION, sort 'select'
statements
- wire up renameat2 syscall.
Various fixes:
- fix address checks in dma_{alloc,free}_coherent (runtime BUG)
- fix access to THREAD_RA/THREAD_SP/THREAD_DS (debug build breakage)
- fix TLBTEMP_BASE_2 region handling in fast_second_level_miss
(runtime unrecoverable exception)
- fix a6 and a7 handling in fast_syscall_xtensa (runtime userspace
register clobbering)
- fix kernel/user jump out of fast_unaligned (potential runtime
unrecoverabl exception)
- replace termios IOCTL code definitions with constants (userspace
build breakage)"
* tag 'xtensa-20140830' of git://github.com/czankel/xtensa-linux: (25 commits)
xtensa: deprecate fast_xtensa and fast_spill_registers syscalls
xtensa: don't allow overflow/underflow on unaligned stack
xtensa: fix a6 and a7 handling in fast_syscall_xtensa
xtensa: allow single-stepping through unaligned load/store
xtensa: move invalid unaligned instruction handler closer to its users
xtensa: make fast_unaligned store restartable
xtensa: add double exception fixup handler for fast_unaligned
xtensa: fix kernel/user jump out of fast_unaligned
xtensa: configure kc705 for highmem
xtensa: support highmem in aliasing cache flushing code
xtensa: support aliasing cache in kmap
xtensa: support aliasing cache in k[un]map_atomic
xtensa: implement clear_user_highpage and copy_user_highpage
xtensa: fix TLBTEMP_BASE_2 region handling in fast_second_level_miss
xtensa: allow fixmap and kmap span more than one page table
xtensa: make fixmap region addressing grow with index
xtensa: fix access to THREAD_RA/THREAD_SP/THREAD_DS
xtensa: add renameat2 syscall
xtensa: fix address checks in dma_{alloc,free}_coherent
xtensa: replace IOCTL code definitions with constants
...
Guenter Roeck [Sun, 31 Aug 2014 18:14:26 +0000 (11:14 -0700)]
unicore32: Fix build error
unicore32 builds fail with
arch/unicore32/kernel/signal.c: In function ‘setup_frame’:
arch/unicore32/kernel/signal.c:257: error: ‘usig’ undeclared (first use in this function)
arch/unicore32/kernel/signal.c:279: error: ‘usig’ undeclared (first use in this function)
arch/unicore32/kernel/signal.c: In function ‘handle_signal’:
arch/unicore32/kernel/signal.c:306: warning: unused variable ‘tsk’
arch/unicore32/kernel/signal.c: In function ‘do_signal’:
arch/unicore32/kernel/signal.c:376: error: implicit declaration of function ‘get_signsl’
make[1]: *** [arch/unicore32/kernel/signal.o] Error 1
make: *** [arch/unicore32/kernel/signal.o] Error 2
Bisect points to commit 649671c90eaf ("unicore32: Use get_signal()
signal_setup_done()").
This code never even compiled. Reverting the patch does not work, since
previously used functions no longer exist, so try to fix it up. Compile
tested only.
Fixes: 649671c90eaf ("unicore32: Use get_signal() signal_setup_done()") Cc: Richard Weinberger <richard@nod.at> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Merge branch 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm
Pull ARM fixes from Russell King:
"Various assorted fixes:
- a couple of patches from Mark Rutland to resolve an errata with
Cortex-A15 CPUs.
- fix cpuidle for the CPU part ID changes in the last merge window
- add support for a relocation which ARM binutils is generating in
some circumstances"
* 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm:
ARM: 8130/1: cpuidle/cpuidle-big_little: fix reading cpu id part number
ARM: 8129/1: errata: work around Cortex-A15 erratum 830321 using dummy strex
ARM: 8128/1: abort: don't clear the exclusive monitors
ARM: 8127/1: module: add support for R_ARM_TARGET1 relocations
Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
"Here's the weekly batch of fixes from arm-soc.
The delta is a largeish negative delta, due to revert of SMP support
for Broadcom's STB SoC -- it was accidentally merged before some
issues had been addressed, so they will make a new attempt for 3.18.
I didn't see a need for a full revert of the whole platform due to
this, we're keeping the rest enabled.
The rest is mostly:
- a handful of DT fixes for i.MX (Hummingboard/Cubox-i in particular)
- some MTD/NAND fixes for OMAP
- minor DT fixes for shmobile
- warning fix for UP builds on vexpress/spc
There's also a couple of patches that wires up hwmod on TI's DRA7 SoC
so it can boot. Drivers and the rest had landed for 3.17, and it's
small and isolated so it made sense to pick up now even if it's not a
bugfix"
* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (23 commits)
vexpress/spc: fix a build warning on array bounds
ARM: DRA7: hwmod: Add dra74x and dra72x specific ocp interface lists
ARM: DRA7: Add support for soc_is_dra74x() and soc_is_dra72x() variants
MAINTAINERS: catch special Rockchip code locations
ARM: dts: microsom-ar8035: MDIO pad must be set open drain
ARM: dts: omap54xx-clocks: Fix the l3 and l4 clock rates
ARM: brcmstb: revert SMP support
ARM: OMAP2+: hwmod: Rearm wake-up interrupts for DT when MUSB is idled
ARM: dts: Enable UART wake-up events for beagleboard
ARM: dts: Remove twl6030 clk32g "regulator"
ARM: OMAP2+: omap_device: remove warning that clk alias already exists
ARM: OMAP: fix %d confusingly prefixed with 0x in format string
ARM: dts: DRA7: fix interrupt-cells for GPIO
mtd: nand: omap: Fix 1-bit Hamming code scheme, omap_calculate_ecc()
ARM: dts: omap3430-sdp: Revert to using software ECC for NAND
ARM: OMAP2+: GPMC: Support Software ECC scheme via DT
mtd: nand: omap: Revert to using software ECC by default
ARM: dts: hummingboard/cubox-i: change SPDIF output to be more descriptive
ARM: dts: hummingboard/cubox-i: add USB OC pinctrl configuration
ARM: shmobile: r8a7791: add missing 0x0100 for SDCKCR
...
Alex Shi [Wed, 16 Jul 2014 11:21:56 +0000 (19:21 +0800)]
vexpress/spc: fix a build warning on array bounds
With ARCH_VEXPRESS_SPC option, kernel build has the following
warning:
arch/arm/mach-vexpress/spc.c: In function ‘ve_spc_clk_init’:
arch/arm/mach-vexpress/spc.c:431:38: warning: array subscript is below array bounds [-Warray-bounds]
struct ve_spc_opp *opps = info->opps[cluster];
^
since 'cluster' maybe '-1' in UP system. This patch does a active
checking to fix this issue.
Signed-off-by: Alex Shi <alex.shi@linaro.org> Acked-by: Pawel Moll <pawel.moll@arm.com> Acked-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* tag 'for-v3.17-rc/omap-dra72x-d74x-support-a' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending:
ARM: DRA7: hwmod: Add dra74x and dra72x specific ocp interface lists
ARM: DRA7: Add support for soc_is_dra74x() and soc_is_dra72x() variants
Linus Torvalds [Sun, 31 Aug 2014 17:09:07 +0000 (10:09 -0700)]
Merge tag 'spi-v3.17-rc3-2' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
Pull spi bugfixes from Mark Brown:
"A smattering of bug fixes for the SPI subsystem, all in driver code
which has seen active work recently and none of them with any great
global impact.
There's also a new ACPI ID for the pxa2xx driver which required no
code changes and the addition of kerneldoc for some structure fields
that were missing it and generating warnings during documentation
builds as a result"
* tag 'spi-v3.17-rc3-2' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi:
spi: sh-msiof: Fix transmit-only DMA transfers
spi/rockchip: Avoid accidentally turning off the clock
spi: dw: fix kernel crash due to NULL pointer dereference
spi: dw-pci: fix bug when regs left uninitialized
spi: davinci: fix SPI_NO_CS functionality
spi/rockchip: fixup incorrect dma direction setting
spi/pxa2xx: Add ACPI ID for Intel Braswell
spi: spi-au1550: fix build failure
spi: rspi: Fix leaking of unused DMA descriptors
spi: sh-msiof: Fix leaking of unused DMA descriptors
spi: Add missing kerneldoc bits
spi/omap-mcspi: Fix the spi task hangs waiting dma_rx
Mark Brown [Sun, 31 Aug 2014 12:46:19 +0000 (13:46 +0100)]
Merge tag 'spi-v3.17-rc3' into spi-linus
spi: Bug fixes for v3.17
A smattering of bug fixes for the SPI subsystem, all in driver code
which has seen active work recently and none of them with any great
global impact.
There's also a new ACPI ID for the pxa2xx driver which required no code
changes and the addition of kerneldoc for some structure fields that
were missing it and generating warnings during documentation builds as a
result.
# gpg: Signature made Sun 31 Aug 2014 13:19:12 BST using RSA key ID 7EA229BD
# gpg: Good signature from "Mark Brown <broonie@sirena.org.uk>"
# gpg: aka "Mark Brown <broonie@debian.org>"
# gpg: aka "Mark Brown <broonie@kernel.org>"
# gpg: aka "Mark Brown <broonie@tardis.ed.ac.uk>"
# gpg: aka "Mark Brown <broonie@linaro.org>"
# gpg: aka "Mark Brown <Mark.Brown@linaro.org>"
Linus Torvalds [Sun, 31 Aug 2014 04:04:37 +0000 (21:04 -0700)]
Merge tag 'locks-v3.17-3' of git://git.samba.org/jlayton/linux
Pull file locking bugfx from Jeff Layton:
"Just a bugfix for a bug that crept in to v3.15. It's in a rather rare
error path, and I'm not aware of anyone having hit it, but it's worth
fixing for v3.17"
* tag 'locks-v3.17-3' of git://git.samba.org/jlayton/linux:
locks: pass correct "before" pointer to locks_unlink_lock in generic_add_lease
Linus Torvalds [Sat, 30 Aug 2014 00:22:27 +0000 (17:22 -0700)]
Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 fixes from Peter Anvin:
"One patch to avoid assigning interrupts we don't actually have on
non-PC platforms, and two patches that addresses bugs in the new
IOAPIC assignment code"
* 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
x86, irq, PCI: Keep IRQ assignment for runtime power management
x86: irq: Fix bug in setting IOAPIC pin attributes
x86: Fix non-PC platform kernel crash on boot due to NULL dereference
projects / linux-beck.git / log