Christian König [Tue, 21 Jun 2016 14:28:15 +0000 (16:28 +0200)]
drm/amdgpu: validate VM PTs only on eviction
We don't need to validate them again if the eviction counter didn't changed.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Tue, 21 Jun 2016 14:28:14 +0000 (16:28 +0200)]
drm/amdgpu: add eviction counter
Keep track of the number of evictions since boot.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Arindam Nath [Mon, 20 Jun 2016 10:35:01 +0000 (16:05 +0530)]
drm/amd/powerplay: make sure VCE is disabled by default
This patch is a port of similar patch for amdgpu
when PP is disabled. Since the code flow is little
different when PP is enabled, we need to make sure
the patch is applied for PP enabled path as well.
With the current code, when we boot with the amdgpu
driver enabled and loaded, the VCE also automatically
remains enabled since bootup. This can be verified from
the output of amdgpu_pm_info. It does not matter whether
we boot into command line directly or into X, the VCE
stays enabled the entire time.
This patch addresses the issue and makes sure that
VCE is turned on only during playback, and remains
disabled otherwise.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Arindam Nath <arindam.nath@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Arindam Nath [Mon, 20 Jun 2016 08:47:49 +0000 (14:17 +0530)]
drm/amd/amdgpu: make sure VCE is disabled by default
With the current code, when we boot with the amdgpu
driver enabled and loaded, the VCE also automatically
remains enabled since bootup. This can be verified from
the output of amdgpu_pm_info. It does not matter whether
we boot into command line directly or into X, the VCE
stays enabled the entire time.
This patch addresses the issue and makes sure that
VCE is turned on only during playback, and remains
disaled otherwise.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Arindam Nath <arindam.nath@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Sun, 12 Jun 2016 07:43:20 +0000 (15:43 +0800)]
drm/amdgpu: evict vram when gpu reset
On workstation cards with ECC vram, the entirety of vram is cleared to 0
on asic init to set the ECC status correctly. On non ECC boards, I don't
think they do any explicit clearing, but the vram controller is reset
which may cause issues with the data there.
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Sun, 12 Jun 2016 07:41:58 +0000 (15:41 +0800)]
drm/amdgpu: block scheduler when gpu reset
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Arnd Bergmann [Wed, 15 Jun 2016 20:15:00 +0000 (22:15 +0200)]
amdgpu: use NULL instead of 0 for pointer
In the AMD powerplay driver, a pointer is checked for validity by
comparing against an integer '0', which causes a harmless warning
when building with "make W=1":
drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/processpptables.c:1502:16: error: ordered comparison of pointer with integer zero [-Werror=extra]
This changes the code to the more conventional "if (pointer)" check.
Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Wed, 15 Jun 2016 11:44:05 +0000 (13:44 +0200)]
drm/amdgpu: pipeline evictions as well
This boosts Xonotic from 38fps to 47fps when artificially limiting VRAM to
256MB for testing. It should improve all CPU bound rendering situations
where we have a lot of swapping to/from VRAM.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Wed, 15 Jun 2016 11:44:04 +0000 (13:44 +0200)]
drm/amdgpu: save the PD addr before scheduling the job
When we pipeline evictions the page directory could already be
moving somewhere else when grab_id is called.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Wed, 15 Jun 2016 11:44:03 +0000 (13:44 +0200)]
drm/ttm: add the infrastructure for pipelined evictions
Free up the memory immediately, remember the last eviction for each domain and
make new allocations depend on the last eviction to be completed.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Wed, 15 Jun 2016 11:44:02 +0000 (13:44 +0200)]
drm/ttm: simplify ttm_bo_wait
As far as I can see no need for a custom implementation any more.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Wed, 15 Jun 2016 11:44:01 +0000 (13:44 +0200)]
drm/ttm: remove TTM_BO_PRIV_FLAG_MOVING
Instead of using the flag just remember the fence of the last move operation.
This avoids waiting for command submissions pipelined after the move, but
before accessing the BO with the CPU again.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Wed, 15 Jun 2016 11:44:00 +0000 (13:44 +0200)]
drm/ttm: remove no_gpu_wait param from ttm_bo_move_accel_cleanup
It isn't used and not waiting for the GPU after scheduling a move is
actually quite dangerous.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Mon, 6 Jun 2016 08:17:59 +0000 (10:17 +0200)]
drm/amdgpu: remove pre move wait
Not needed any more.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Mon, 6 Jun 2016 08:17:58 +0000 (10:17 +0200)]
drm/amdgpu: sync to buffer moves before VM updates
Otherwise we could update the VM page tables while the move is only scheduled.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Mon, 6 Jun 2016 08:17:57 +0000 (10:17 +0200)]
drm/ttm: wait for BO idle after the move in ttm_bo_swapout
Final part to avoid pre move waits.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Mon, 6 Jun 2016 08:17:56 +0000 (10:17 +0200)]
drm/ttm: drop waiting for idle in ttm_bo_evict.
That is unnecessary now.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Mon, 6 Jun 2016 08:17:55 +0000 (10:17 +0200)]
drm/ttm: drop wait for idle in ttm_bo_move_buffer
That is unnecessary now.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Mon, 6 Jun 2016 08:17:54 +0000 (10:17 +0200)]
drm/ttm: wait for BO idle in ttm_bo_move_memcpy
When we want to pipeline accelerated moves we need to wait in the fallback path.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Mon, 6 Jun 2016 08:17:53 +0000 (10:17 +0200)]
drm/ttm: add wait for idle in all drivers bo_move functions
Wait for idle before moving the BO in all drivers implementing
an accelerated move function.
This should keep the current behavior when removing the pre move wait.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Mon, 6 Jun 2016 08:17:52 +0000 (10:17 +0200)]
drm/ttm: remove dummy bo_move implementations
It's pointless to only call the default implementation.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Mon, 6 Jun 2016 08:17:51 +0000 (10:17 +0200)]
drm/ttm: remove NULL checks when calling ttm_tt_destroy
The function is a no-op with a NULL pointer.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Mon, 6 Jun 2016 08:17:50 +0000 (10:17 +0200)]
drm/ttm: cleanup ttm_tt_(unbind|destroy)
ttm_tt_destroy should be the only one unbinding the object.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Huang [Tue, 14 Jun 2016 19:08:22 +0000 (15:08 -0400)]
drm/amdgpu: some improvement in parsing inputs
It changes the way to skip newline character and also avoids
warning message from some compiler.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Huang [Thu, 7 Jul 2016 18:53:42 +0000 (14:53 -0400)]
drm/amd/powerplay: remove useless soft pptable in Asic related backend
The soft pptable was used for re-uploading pptable as cache, but since
previous commits, the generic codes for uploading pptable are used and
backend is released during resetting powerplay. So it becomes redundance.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Huang [Mon, 13 Jun 2016 18:31:27 +0000 (14:31 -0400)]
drm/amd/powerplay: remove useless pp_table codes for Tonga/Fiji/Polaris10
Due to uploading pptable implementation changed, the generic codes in
previous commit have been used intead of the Asic specific codes.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Huang [Wed, 1 Jun 2016 21:08:07 +0000 (17:08 -0400)]
drm/amd/powerplay: add uploading pptable and resetting powerplay support
Necessary for re-initializing dpm with new pptables at runtime.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Huang [Thu, 2 Jun 2016 20:15:59 +0000 (16:15 -0400)]
drm/amd/powerplay: change backend allocation to backend init
backend_init and backend_fini are paired functions, backend is freed
in backend_fini and should be allocated in backend_init.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Huang [Mon, 6 Jun 2016 20:42:46 +0000 (16:42 -0400)]
drm/amd/powerplay: add disable dpm tasks for Polaris10
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Huang [Mon, 6 Jun 2016 19:36:42 +0000 (15:36 -0400)]
drm/amd/powerplay: add disable dpm tasks for Tonga
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Huang [Tue, 31 May 2016 21:06:14 +0000 (17:06 -0400)]
drm/amd/powerplay: add function disable_dpm_tasks for Fiji
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Huang [Tue, 31 May 2016 21:31:12 +0000 (17:31 -0400)]
drm/amd/powerplay: add event task of disable dynamic state management
Add an interface to disable dpm so that we can disable dpm before
updating pptables at runtime.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Huang [Tue, 31 May 2016 21:02:43 +0000 (17:02 -0400)]
drm/amd/powerplay: keep soft_pp_table pointer value for re-uploading
Necessary for updating pptables at runtime.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Suggested-by: Alex Deucher <Alexander.Deucher@amd.com> Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Sun, 12 Jun 2016 07:44:44 +0000 (15:44 +0800)]
drm/amdgpu: factor out the AMDGPU_INFO_FW_VERSION case branch into amdgpu_firmware_info
The new amdgpu_firmware_info function will be used on amdgpu firmware
version debugfs.
Suggested-by: Christian König <christian.koenig@amd.com> Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Nicolai Hähnle [Tue, 14 Jun 2016 10:10:07 +0000 (12:10 +0200)]
drm/amdgpu: remove cgs_acpi_method_argument member method_length
It was redundant with data_length, and in fact set incorrectly in one case
leading to an out-of-bound read by memcpy in acpi_ut_copy_esimple_to_isimple,
reported by CONFIG_KASAN=y.
Signed-off-by: Nicolai Hähnle <Nicolai.Haehnle@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Huang [Tue, 7 Jun 2016 21:01:27 +0000 (17:01 -0400)]
drm/amd/powerplay: set UVD clocks bypass mode for Polaris10
Saves power when not in use.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Tested-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Thu, 9 Jun 2016 21:27:36 +0000 (17:27 -0400)]
drm/radeon/cik: fix CP jump table size
Align to the jump table offset. May fix hangs on some
asics with GFX PG enabled.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Thu, 9 Jun 2016 21:22:56 +0000 (17:22 -0400)]
drm/amdgpu/gfx7: fix CP jump table size
Align to the jump table offset. May fix hangs on some
asics with GFX PG enabled.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
David Mao [Tue, 7 Jun 2016 09:48:52 +0000 (17:48 +0800)]
drm/amd/amdgpu : adding new tracepoints to track memory information.
- adding amdgpu_cs_bo_status to track total size and
total entry count of bo for each submission.
- adding amdgpu_ttm_bo_move to track the bo eviction
including the size of bo and the location before/after the move
Signed-off-by: David Mao <David.Mao@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
David Mao [Tue, 7 Jun 2016 09:43:51 +0000 (17:43 +0800)]
drm/amd/amdgpu : Refine tracepoints to track more information
- adding memory type, prefered heap, allowed heap, and host visible
information to the amdgpu_bo_create tracepoint.
- adding bo size to the amdgpu_bo_list_set tracepoint.
Signed-off-by: David Mao <David.Mao@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Tue, 7 Jun 2016 17:04:36 +0000 (13:04 -0400)]
drm/amdgpu/uvd6: De-numberify startup
To make the code more legible various numerical constants
have been changed to their #define'ed MASKs.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Xie [Mon, 6 Jun 2016 22:21:09 +0000 (18:21 -0400)]
drm/amdgpu: Initialize the variables in a straight-forward way
Initialize the variable in a straight-forward way instead of
hiding the initialization inside the loop. This can also
reduce one function call.
Signed-off-by: Alex Xie <AlexBin.Xie@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Xie [Mon, 6 Jun 2016 22:14:57 +0000 (18:14 -0400)]
drm/amdgpu: Add comment to describe the purpose of one difficult if statement
Use == instead of != in the if statement to make code easier understood
Signed-off-by: Alex Xie <AlexBin.Xie@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Xie [Mon, 6 Jun 2016 22:13:26 +0000 (18:13 -0400)]
drm/amdgpu: Change some variable names to make code easier understood
Add comment to describe some variables otherwise.
Signed-off-by: Alex Xie <AlexBin.Xie@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Mon, 6 Jun 2016 05:50:18 +0000 (13:50 +0800)]
drm/amdgpu: enable BUS master after pci reset
Re-enable bus mastering after GPU reset. We disable it
at the top of these functions, so balance them by
re-enabling it.
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
eviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Mon, 6 Jun 2016 05:06:45 +0000 (13:06 +0800)]
drm/amdgpu: add return value for pci config reset
So we know whether or not the reset succeeded.
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Wed, 1 Jun 2016 11:31:17 +0000 (13:31 +0200)]
drm/amdgpu: remove now unnecessary checks
vm_flush() now comes directly after vm_grab_id().
Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Wed, 1 Jun 2016 08:47:36 +0000 (10:47 +0200)]
drm/amdgpu: use a fence array for VMID management
Just wait for any fence to become available, instead
of waiting for the last entry of the LRU.
Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Mon, 23 May 2016 14:00:32 +0000 (16:00 +0200)]
drm/amdgpu: reuse VMIDs assigned to a VM only if there is also a free one
This fixes a fairness problem with the GPU scheduler. VM having lot of
jobs could previously starve VM with less jobs.
Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Mon, 23 May 2016 13:30:08 +0000 (15:30 +0200)]
drm/amdgpu: prefer VMIDs idle on the current ring
Prefer to use a VMIDs which are idle on the ring we want to submit to. This
also removes bubbling idle VMIDs up on the LRU, which is actually not
beneficial.
Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Mon, 23 May 2016 12:26:39 +0000 (14:26 +0200)]
drm/amdgpu: add optional ring to amdgpu_sync_is_idle
Check if the sync object is idle depending on the ring a submission works with.
Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 20 May 2016 11:06:09 +0000 (13:06 +0200)]
drm/amdgpu: remove amdgpu_sync_wait
Stop hiding bugs, instead print a proper error when the scheduler
doesn't handle all dependencies.
Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 20 May 2016 10:53:52 +0000 (12:53 +0200)]
drm/amdgpu: generalize the scheduler fence
Make it two events, one for the job being scheduled and one when it is finished.
Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Mon, 23 May 2016 14:19:44 +0000 (16:19 +0200)]
drm/amdgpu: document amdgpu_sync_get_fence
It's not obvious what it should do.
Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Fri, 3 Jun 2016 18:31:46 +0000 (14:31 -0400)]
drm/amdgpu/gfx80: Add QUICK_PG bit to GFX header and use it.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Fri, 3 Jun 2016 16:52:03 +0000 (12:52 -0400)]
drm/amdgpu/gfx8: Tidy up various PG helpers
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Thu, 2 Jun 2016 12:53:35 +0000 (08:53 -0400)]
drm/amdgpu/gfx8: Enable PG on Stoney
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Thu, 2 Jun 2016 12:52:39 +0000 (08:52 -0400)]
drm/amdgpu/gfx8: Enable CG on Stoney
Enable all relevant CG flags for Stoney parts.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Thu, 2 Jun 2016 12:51:15 +0000 (08:51 -0400)]
drm/amdgpu/gfx8: Switch Stoney to share CZ's RLC functions
According to the bringup code ST/CZ share the RLC
ENTER/EXIT logic.
Tested on my ST board.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Tue, 31 May 2016 12:02:27 +0000 (08:02 -0400)]
drm/amdgpu/trace: Add tracepoints to MMIO read/writes
Add tracepoints to the MMIO read/write so we can log
MMIO traffic.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Mon, 2 May 2016 12:35:35 +0000 (08:35 -0400)]
drm/amd/amdgpu: ring debugfs is read in increments of 4 bytes
If a user tries to read a non-multiple of 4 bytes it would have
read until the end of the ring potentially crashing the user
task.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Wed, 27 Apr 2016 16:41:16 +0000 (12:41 -0400)]
drm/amd/amdgpu: Convert ring debugfs entries to binary
They now emit ring data in binary which will be read/written by
the userspace tool umr shortly.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Thu, 2 Jun 2016 13:31:59 +0000 (09:31 -0400)]
drm/radeon: drop explicit pci D3/D0 setting for ATPX power control
The ATPX power control method does this for you.
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Thu, 2 Jun 2016 13:27:03 +0000 (09:27 -0400)]
drm/radeon/atpx: hybrid platforms use d3cold
The platform d3 cold is used to power down the dGPU.
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Thu, 2 Jun 2016 13:24:53 +0000 (09:24 -0400)]
drm/radeon/atpx: track whether if this is a hybrid graphics platform
hybrid graphics in this case refers to systems which use the new
platform d3 cold ACPI methods as opposed to ATPX for dGPU power
control.
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Thu, 2 Jun 2016 13:18:34 +0000 (09:18 -0400)]
drm/amdgpu: drop explicit pci D3/D0 setting for ATPX power control
The ATPX power control method does this for you.
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Thu, 2 Jun 2016 13:08:32 +0000 (09:08 -0400)]
drm/amdgpu/atpx: hybrid platforms use d3cold
The platform d3 cold is used to power down the dGPU.
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Thu, 2 Jun 2016 13:04:01 +0000 (09:04 -0400)]
drm/amdgpu/atpx: track whether if this is a hybrid graphics platform
hybrid graphics in this case refers to systems which use the new
platform d3 cold ACPI methods as opposed to ATPX for dGPU power
control.
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Wed, 1 Jun 2016 19:13:24 +0000 (15:13 -0400)]
drm/radeon/atpx: drop forcing of dGPU power control
Now that we handle this correctly, there is no need to force
it.
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Wed, 1 Jun 2016 19:07:44 +0000 (15:07 -0400)]
drm/radeon: use PCI_D3hot for PX systems without dGPU power control
On PX systems without dGPU power control, use PCI_D3hot.
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Wed, 1 Jun 2016 19:05:05 +0000 (15:05 -0400)]
drm/radeon/atpx: add a query for ATPX dGPU power control
The runtime pm sequence is different depending on whether or
not the platform supports ATPX dGPU power control.
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Wed, 1 Jun 2016 16:58:36 +0000 (12:58 -0400)]
drm/radeon: add a delay after ATPX dGPU power off
ATPX dGPU power control requires a 200ms delay between
power off and on. This should fix dGPU failures on
resume from power off.
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
Alex Deucher [Wed, 1 Jun 2016 16:47:38 +0000 (12:47 -0400)]
drm/radeon: clean up atpx power control handling
The presence of the power control method should be determined
via the presence of the method in function 0. However, some
sbioses only set the appropriate bits in function 1 so use
then to override a missing power control function.
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Wed, 1 Jun 2016 16:20:16 +0000 (12:20 -0400)]
drm/radeon: disable power control on hybrid laptops
Windows 10 (and some 8.1) systems use standardized
ACPI calls for hybrid laptops to control dGPU power.
Detect those cases and disable the AMD specific ATPX
power control.
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Wed, 1 Jun 2016 17:14:48 +0000 (13:14 -0400)]
drm/amdgpu/atpx: drop forcing of dGPU power control
Now that we handle this correctly, there is no need to force
it.
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Wed, 1 Jun 2016 17:12:25 +0000 (13:12 -0400)]
drm/amdgpu: use PCI_D3hot for PX systems without dGPU power control
On PX systems without dGPU power control, use PCI_D3hot.
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Wed, 1 Jun 2016 17:08:21 +0000 (13:08 -0400)]
drm/amdgpu/atpx: add a query for ATPX dGPU power control
The runtime pm sequence is different depending on whether or
not the platform supports ATPX dGPU power control.
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Wed, 1 Jun 2016 16:54:33 +0000 (12:54 -0400)]
drm/amdgpu: add a delay after ATPX dGPU power off
ATPX dGPU power control requires a 200ms delay between
power off and on. This should fix dGPU failures on
resume from power off.
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
Alex Deucher [Wed, 1 Jun 2016 16:42:35 +0000 (12:42 -0400)]
drm/amdgpu: clean up atpx power control handling
The presence of the power control method should be determined
via the presence of the method in function 0. However, some
sbioses only set the appropriate bits in function 1 so use
then to override a missing power control function.
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Wed, 1 Jun 2016 16:28:13 +0000 (12:28 -0400)]
drm/amdgpu: disable power control on hybrid laptops
Windows 10 (and some 8.1) systems use standardized
ACPI calls for hybrid laptops to control dGPU power.
Detect those cases and disable the AMD specific ATPX
power control.
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/radeon: allow PACKET3_PFP_SYNC_ME on evergreen
Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Edmondo Tommasina <edmondo.tommasina@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Thu, 26 May 2016 13:47:44 +0000 (09:47 -0400)]
drm/amdgpu/gfx8: Add serdes wait for idle in CGCG en/disable
Must wait for SERDES idle before exiting RLC SAFEMODE
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
projects / linux-beck.git / log