Danny Nold [Thu, 8 Mar 2012 21:12:43 +0000 (15:12 -0600)]
ENGR00176504 - EPDC fb: Reduce number of PxP output buffers to 2
- Changed from one-buffer-per-LUT (up to 16 for EPDCv1.0 and 64 for EPDCv2.0)
to using 2 static buffers for PxP output. This is facilitated by the switch
to using a single-threaded workqueue to process each update, which
guarantees that we can use just 2 buffers without clobbering concurrent
updates.
- One known limitation: This restricts the SNAPSHOT update scheme to only 2
concurrent updates. So if a user intends to use SNAPSHOT scheme, the
EPDC_MAX_NUM_BUFFERS #define should be increased based on the desired number
of allowable concurrent updates (with a corresponding penalty in static
memory allocation).
Signed-off-by: Danny Nold <dannynold@freescale.com>
Anson Huang [Tue, 6 Mar 2012 04:00:16 +0000 (12:00 +0800)]
ENGR00176160 [MX6]Correct PLL1 freq change flow
Previous PLL1 freq change is done by switching CPU clock
to 400M pfd or 24M OSC, then modifying
PLL1 div directly, and switch back CPU clock immediately,
it will result in CPU clock stop during PLL1 hardware lock
period, thus, DRAM FIFO may blocked by the data CPU
requested before PLL1 clock changed, and it will block other devices
accessing DRAM, such as IPU, VPU etc. It will cause
underrun or hang issue. We should wait PLL1 lock, then switch
back.
Peter Chen [Wed, 22 Feb 2012 03:14:01 +0000 (11:14 +0800)]
ENGR00176147-1: usb: fix some wakeup problems
- Do not call hcd core adjust wakeup flag code. It may change
wakeup flag, and cause port change detect(PCD) enable setting change.
- For ID wakeup, it should not call host's fsl_usb_recover_hcd at ID interrupt.
The coming ID switch event will resume host.
- Do not need enable wakeup interrupt for host at platform driver resume
routine, it may introduce unnessary wakeup interrupt during bus resume.
The wakeup will be enabled again when usb host goes to controller again
due to autosuspend.
- When there is no gadget enabled, the otg port is still at host mode with
interrupt enabled, so when male Micro-B to female A-type cable with
usb device plugs in, there will be PCD interrupt before hcd core leaves
suspend mode.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Xinyu Chen [Mon, 5 Mar 2012 08:17:52 +0000 (16:17 +0800)]
ENGR00176068-2 smp_twd: reconfigure clockevents after cpufreq change
After a cpufreq transition, update the clockevent's frequency
by fetching the new clock rate from the clock framework and
reprogram the next clock event.
Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com> Signed-off-by: Colin Cross <ccross@android.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Xinyu Chen [Mon, 5 Mar 2012 08:15:20 +0000 (16:15 +0800)]
ENGR00176068-1 mx6q: add smp_twd clock for localtimer
Add a smp_twd system clock which is simple clock
from parent of cpu_clk, and it's rate is half
of the cpu_clk.
This is used for reprograming the twd clock event
after cpu freq is changed.
Also disable local timer setup when wait mode enabled.
ENGR00176136- MX6: Added support for 1.2GHz ARM Frequency
Added the new 1.2GHz working point.
Currently 'arm_freq=1200" should be added to commandline
for the core to run at 1.2GHz. Also ensure that the appropriate
HW board mods have been done to set VDDARM_IN at 1.425V.
Zhang Jiejing [Tue, 6 Mar 2012 06:47:57 +0000 (14:47 +0800)]
ENGR00176159 video: ipuv3-fb: change to timeout semaphore to wait on irq.
change to timeout semaphore to wait on irq.
use no timeout semaphore have below issues:
1. since fbmem.c will hold the console_lock() before call PAN_DISPLAY ioictl,
if have wrong happens on IPU, IRQ not come, any log printk will not ouput,
it will become like a system hang, and developer don't know what's wrong.
2. semaphore don't have timeout, here we can't know irq not come,
so hang it infintly.
3. semaphore lock and unlock in different context is a dangous operation.
To fix these issue, use timedout version to wait on irq.
But for better coding stly to align Kernel Coding Style Doc,
better use complete to wait on irq, use semaphre little ugly.
Lionel Xu [Fri, 2 Mar 2012 05:18:17 +0000 (13:18 +0800)]
ENGR00170526-4 ESAI: To resolve the playback no sound issue occasionally happen
There is no sound output any longer sometimes after several times of playback,
this platch is trying to resolve this issue by:
1)move the global power control bit setting from function hw_params/shutdown to
DAPM, thererfor the PWN bit will not be set/unset each time playback;
2) Signed-off-by: Lionel Xu <Lionel.Xu@freescale.com>
Lionel Xu [Fri, 2 Mar 2012 05:12:26 +0000 (13:12 +0800)]
ENGR00170526-3 ESAI: Remove the workaround to reset codec before playbacking
Previously in order to avoid audio playback no sound issue, a hardware reset
was made to the codec chip each time when doing playback. now remove this
workaround.
Francisco Munoz [Thu, 1 Mar 2012 23:50:28 +0000 (17:50 -0600)]
ENGR00175551:Update sabreauto board file for handling spi and paralle nor
*Files affected: board-mx6q_sabreauto.c
*Added IOMUX settings for parallel nor
*Utilized physmap driver in order to probe the chip
*Implemented conditional compilation enabling either spi or parallel
nor.
Signed-off-by: Francisco Munoz <b37752@freescale.com>
Danny Nold [Wed, 29 Feb 2012 20:31:04 +0000 (14:31 -0600)]
ENGR00175261 - EPDC fb: Remove warning messages from EPDC init
- Remove screen update from probe function. This update is redundant.
The update in mxc_epdc_fb_fw_handler() will update and show the tux
logo if FB console is added, so this achieves the same effect as the
update invocation that was removed.
- Remove dmaengine_get(), because SDMA driver returns a failure when
cycling through DMA channels. Since it is not essential to register
with this call, it has been removed. dmaengine_put() also removed.
- Added hw_inialization variable to track whether HW is in process
of being initialized. In which case, we do not print an error
message when an update is received.
Signed-off-by: Danny Nold <dannynold@freescale.com>
Per Forlin [Fri, 1 Jul 2011 16:55:33 +0000 (18:55 +0200)]
mmc: block: add handling for two parallel block requests in issue_rw_rq
Change mmc_blk_issue_rw_rq() to become asynchronous.
The execution flow looks like this:
* The mmc-queue calls issue_rw_rq(), which sends the request
to the host and returns back to the mmc-queue.
* The mmc-queue calls issue_rw_rq() again with a new request.
* This new request is prepared in issue_rw_rq(), then it waits for
the active request to complete before pushing it to the host.
* When the mmc-queue is empty it will call issue_rw_rq() with a NULL
req to finish off the active request without starting a new request.
Signed-off-by: Per Forlin <per.forlin@linaro.org> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Venkatraman S <svenkatr@ti.com> Tested-by: Sourav Poddar <sourav.poddar@ti.com> Tested-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org>
Per Forlin [Fri, 1 Jul 2011 16:55:31 +0000 (18:55 +0200)]
mmc: queue: add a second mmc queue request member
Add an additional mmc queue request instance to make way for two active
block requests. One request may be active while the other request is
being prepared.
Signed-off-by: Per Forlin <per.forlin@linaro.org> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Venkatraman S <svenkatr@ti.com> Tested-by: Sourav Poddar <sourav.poddar@ti.com> Tested-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org>
Per Forlin [Fri, 1 Jul 2011 16:55:29 +0000 (18:55 +0200)]
mmc: block: add a block request prepare function
Break out code from mmc_blk_issue_rw_rq to create a block request prepare
function. This doesn't change any functionallity. This helps when handling
more than one active block request.
Signed-off-by: Per Forlin <per.forlin@linaro.org> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Venkatraman S <svenkatr@ti.com> Tested-by: Sourav Poddar <sourav.poddar@ti.com> Tested-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org>
Per Forlin [Sat, 9 Jul 2011 21:12:36 +0000 (17:12 -0400)]
mmc: block: add member in mmc queue struct to hold request data
The way the request data is organized in the mmc queue struct, it only
allows processing of one request at a time. This patch adds a new struct
to hold mmc queue request data such as sg list, request, blk request and
bounce buffers, and updates any functions depending on the mmc queue
struct. This prepares for using multiple active requests in one mmc queue.
Signed-off-by: Per Forlin <per.forlin@linaro.org> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Venkatraman S <svenkatr@ti.com> Tested-by: Sourav Poddar <sourav.poddar@ti.com> Tested-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org>
Adrian Hunter [Tue, 28 Jun 2011 14:16:02 +0000 (17:16 +0300)]
mmc: queue: let host controllers specify maximum discard timeout
Some host controllers will not operate without a hardware
timeout that is limited in value. However large discards
require large timeouts, so there needs to be a way to
specify the maximum discard size.
A host controller driver may now specify the maximum discard
timeout possible so that max_discard_sectors can be calculated.
However, for eMMC when the High Capacity Erase Group Size
is not in use, the timeout calculation depends on clock
rate which may change. For that case Preferred Erase Size
is used instead.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Chris Ball <cjb@laptop.org>
Check the status bits in the r/w command response for any errors.
If error bits are set, then we won't have seen any data transferred,
so it's pointless doing any further checking.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Linus Walleij <linus.walleij@linaro.org> Tested-by: Pawel Moll <pawel.moll@arm.com> Signed-off-by: Chris Ball <cjb@laptop.org>
mmc: block: improve error recovery from command channel errors
Command channel errors fall into four classes:
1. The command was issued with the card in the wrong state
2. The command failed to be received by the card correctly
3. The cards response failed to be received by the host (CRC error)
4. The card failed to respond to the card
For (1), in theory we should know that the card is in the correct state.
However, a failed stop command (or other failure) may result in the card
remaining in a data transfer state from the previous command. If we
detect this condition, we try to recover by sending a stop command.
For the initial commands (set block count and the read/write command)
no data will have been transferred. All that we need deal with is
retrying at this point. A failed stop command can be remedied as
above.
If we are unable to recover the card (eg, the card ignores our requests
for status, or we don't recognise the error code) then we immediately
fail the request.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Linus Walleij <linus.walleij@linaro.org> Tested-by: Pawel Moll <pawel.moll@arm.com> Signed-off-by: Chris Ball <cjb@laptop.org>
mmc: block: allow get_card_status() to return error status
If the MMC_SEND_STATUS command is not successful, we should not return
a zero status word, but instead allow the caller to know positively
that an error occurred.
Convert the open-coded get_card_status() to use the helper function,
and provide definitions for the card state field.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Linus Walleij <linus.walleij@linaro.org> Tested-by: Pawel Moll <pawel.moll@arm.com> Signed-off-by: Chris Ball <cjb@laptop.org>
Per Forlin [Fri, 1 Jul 2011 16:55:27 +0000 (18:55 +0200)]
mmc: mmc_test: test to measure how sg_len affect performance
Add a test that measures how the mmc bandwidth depends on the numbers of
sg elements in the sg list. The transfer size if fixed and sg length goes
from a few up to 512. The purpose is to measure overhead caused by
multiple sg elements.
Signed-off-by: Per Forlin <per.forlin@linaro.org> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Venkatraman S <svenkatr@ti.com> Tested-by: Sourav Poddar <sourav.poddar@ti.com> Tested-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org>
Per Forlin [Fri, 1 Jul 2011 16:55:26 +0000 (18:55 +0200)]
mmc: mmc_test: add test for non-blocking transfers
Add four tests for read and write performance per
different transfer size, 4k to 4M.
* Read using blocking mmc request
* Read using non-blocking mmc request
* Write using blocking mmc request
* Write using non-blocking mmc request
The host driver must support pre_req() and post_req()
in order to run the non-blocking test cases.
Signed-off-by: Per Forlin <per.forlin@linaro.org> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Venkatraman S <svenkatr@ti.com> Tested-by: Sourav Poddar<sourav.poddar@ti.com> Tested-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org>
Per Forlin [Fri, 1 Jul 2011 16:55:24 +0000 (18:55 +0200)]
mmc: mmci: implement pre_req() and post_req()
pre_req() runs dma_map_sg() and prepares the dma descriptor for the next
mmc data transfer. post_req() runs dma_unmap_sg. If not calling pre_req()
before mmci_request(), mmci_request() will prepare the cache and dma just
like it did it before. It is optional to use pre_req() and post_req()
for mmci.
Signed-off-by: Per Forlin <per.forlin@linaro.org> Tested-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org>
Per Forlin [Fri, 1 Jul 2011 16:55:23 +0000 (18:55 +0200)]
mmc: omap_hsmmc: add support for pre_req and post_req
pre_req() runs dma_map_sg(), post_req() runs dma_unmap_sg. If not calling
pre_req() before omap_hsmmc_request(), dma_map_sg will be issued before
starting the transfer. It is optional to use pre_req(). If issuing
pre_req(), post_req() must be called as well.
Signed-off-by: Per Forlin <per.forlin@linaro.org> Reviewed-by: Venkatraman S <svenkatr@ti.com> Tested-by: Sourav Poddar <sourav.poddar@ti.com> Signed-off-by: Chris Ball <cjb@laptop.org>
Per Forlin [Fri, 1 Jul 2011 16:55:22 +0000 (18:55 +0200)]
mmc: core: add non-blocking mmc request function
Previously there has only been one function mmc_wait_for_req()
to start and wait for a request. This patch adds:
* mmc_start_req() - starts a request wihtout waiting
If there is on ongoing request wait for completion
of that request and start the new one and return.
Does not wait for the new command to complete.
This patch also adds new function members in struct mmc_host_ops
only called from core.c:
* pre_req - asks the host driver to prepare for the next job
* post_req - asks the host driver to clean up after a completed job
The intention is to use pre_req() and post_req() to do cache maintenance
while a request is active. pre_req() can be called while a request is
active to minimize latency to start next job. post_req() can be used after
the next job is started to clean up the request. This will minimize the
host driver request end latency. post_req() is typically used before
ending the block request and handing over the buffer to the block layer.
Add a host-private member in mmc_data to be used by pre_req to mark the
data. The host driver will then check this mark to see if the data is
prepared or not.
Signed-off-by: Per Forlin <per.forlin@linaro.org> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Venkatraman S <svenkatr@ti.com> Tested-by: Sourav Poddar <sourav.poddar@ti.com> Tested-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org>
Huang Shijie [Wed, 29 Feb 2012 10:56:16 +0000 (18:56 +0800)]
ENGR00175824 fix the wrong patch for arch/arm/include/asm/futex.h
The patch
"1e5fce1 ENGR00139261 [MX6Q]support 8 bit MMC and eMMC DDR mode"
reverts the patch
"28d5b74 ARM: 7099/1: futex: preserve oldval in SMP __futex_atomic_op"
Jason Liu [Tue, 28 Feb 2012 12:16:52 +0000 (20:16 +0800)]
ENGR00174839 i.mx: asrc: enable clock before access the asrc register
proc01 test fail on MX6dl and system hange after
the following output:
proc01 0 TINFO: /proc/kmsg: known issue: errno=EAGAIN(11):
<hang>
system will hang when access the proc file under: /proc/driver/asrc/ChSettings
The issue is that the asrc clock is off when try toaccess the asrc register.
Enable the asrc clock before access the asrc register fix the issue.
And we need turn off the clock after we finished accessing the register
The variables here are really not used uninitialized.
kernel/futex.c: In function 'fixup_pi_state_owner.clone.17':
kernel/futex.c:1582:6: warning: 'curval' may be used uninitialized in this function
kernel/futex.c: In function 'handle_futex_death':
kernel/futex.c:2486:6: warning: 'nval' may be used uninitialized in this function
kernel/futex.c: In function 'do_futex':
kernel/futex.c:863:11: warning: 'curval' may be used uninitialized in this function
kernel/futex.c:828:6: note: 'curval' was declared here
kernel/futex.c:898:5: warning: 'oldval' may be used uninitialized in this function
kernel/futex.c:890:6: note: 'oldval' was declared here
Larry Li [Tue, 21 Feb 2012 06:51:15 +0000 (14:51 +0800)]
ENGR00174905 [MX6] gc355 can't work after specific suspend/resume case
GC355 can't work at below steps:
- suspend resume
- load gpu driver and run gc355 application
In order to make GPU work properly, GPU clock needs to be on while power
on GPU. Not only direct GPU clk ccgr needs to be on, but also relative
clock in GPU clock tree has to be enabled.
- EPDC firmware build was breaking due to binary build pre-empting
the conversion from .fw.ihex->.fw. Resolve this by forcing
firmware objects to be built in order.
Signed-off-by: Danny Nold <dannynold@freescale.com>
Peter Chen [Fri, 17 Feb 2012 07:22:07 +0000 (15:22 +0800)]
ENGR00174734-2 usb: fix bugs that dp and dm are floating at device mode
At i.mx6x, the data line (dp and dm) are floating at device mode,
that is to say data line will be any values (0-3.6v).
So if the usb wakeup is enabled, there will be a wakeup interrupt
that causes usb to active mode.
In order to fix this problem well, we need to do below things:
- Need to discharge both dp and dm
- It needs to discharge data line when we switch to device mode and
usb cable is disconnected from the host, but not to disable discharge
after line state is SE0, the reason is that if we do not pulldown
the data line, the line state will be floating again, and possible cause
the wakeup interrupt.
- It needs to disable discharge data line when the usb cable connects at
device mode and usb device is connected at host mode, otherwise it will
affect signal quality.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Sandor Yu [Tue, 21 Feb 2012 09:26:28 +0000 (17:26 +0800)]
ENGR00174911 MX6x Setting HDMI default mode according bootload cmdline
Origin HDMI default video mode is setting to VGA.
But the HDMI will change to the vide mode setting in bootloader
command line when the first time HDMI cable plugin.
It will cause GUI sometime can't not get correct FB video mode
when system bootup without HDMI cable plugout.
Ryan QIAN [Wed, 22 Feb 2012 01:32:51 +0000 (09:32 +0800)]
ENGR00175080 [MX6] MMC: kernel failed to init eMMC card, after boot from eMMC
issue:
if uboot is loaded from eMMC, the eMMC memory will be configured to DDR mode.
on kernel startup, it will initialize the card at SDR mode, while the register
of USDHC is still configured to DDR enable mode. Therefore, the initialization
of eMMC memory will fail.
fix:
- clear MIX_CTRL on sdhc platform init code.
- clear vselect bit of VENDOR_SPEC on sdhc platform init code.
Adrian Alonso [Fri, 17 Feb 2012 00:42:33 +0000 (18:42 -0600)]
ENGR00171079-8 imx6q sabreauto cs42888 audio support
* Add imx6q sabreauto cs42888 audio support
* Set clock parent relations
anaclk_2 -> pll4_audio_clk -> esai_root_clk
* Match corresponding sysclk frequency to keep lrclk_ratio
relation on imx-cs4288 esai configuration
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
* Add mx6q anaclk_1/2 clock input source clock support
* anaclk can be bypassed to pll4_audio.
* _clk_audio_video_set_parent allows to bypass anaclk input
clock source, for sabreauto platform anaclk_2 is the clock
source for cs42888 and this clock needs to be bypassed to
esai to supply the same master clk signal.
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
Adrian Alonso [Fri, 17 Feb 2012 00:32:27 +0000 (18:32 -0600)]
ENGR00171079-6 imx-cs42888 sabreauto esai config
* imx-cs42888 config esai for sabreauto support
* Select lrclk_ratio according to mclk_freq
* Set clkdiv relations
* Add safer codec reset, request and free gpio
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
Adrian Alonso [Fri, 17 Feb 2012 21:09:31 +0000 (15:09 -0600)]
ENGR00171079-5 imx6q-sabreauto set supportted sample rates
* cs42888 set imx6q-sabreauto supportted play/record sample rates
master clk signal is a fixed source clock @24576000Mhz, thus
limit the play/record sample rates lrclk.
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
* Get audio codec platform data and overwrite supportted
sample rates if defined in machine board file.
* Remove machine soc specific sample rate settings.
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
Adrian Alonso [Fri, 17 Feb 2012 18:14:28 +0000 (12:14 -0600)]
ENGR00171079-3 fsl_devices add generic audio codec platform data
* Add generic audio codec platform_data to be able to
pass specific settings to audio codecs found in Freescale
target boards.
* cs42888 get this platform data to override specific settings
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
Adrian Alonso [Fri, 17 Feb 2012 00:18:25 +0000 (18:18 -0600)]
ENGR00171079-1 mx6q-ard: esai remove record early param
* Remove record early param, pad GPIO9 shared with
ESAI_FSR and WDOG1 doesn't conflict as WDOG1
connection is open, NANDF_CS3 is shared with ESAI_TX1
and connection is also open with nand socket, no other
pad conflicts.
* Add esai interrupt gpio pin.
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
GPU clock on i.mx6dl:
gpu2d_core_clk source from gpu3d_shader_clk,
gpu3d_axi_clk source from mmdc0 directly, 400Mhz by default,
gpu2d_axi_clk source from mmdc0 directly, 400Mhz by default,
AXI_CLK on i.mx6dl:
set axi_clk parent to pll3_pfd_540M and divid by 2, which will
get 270Mhz by default,
VPU clock on i.mx6dl:
VPU will parent from axi_clk, then by default, it will be 270Mhz,
which will be suitable for VPU 1080p support.
pll3_pfd_540M on i.mx6dl will be dedicated to VPU/IPU/AXI_CLK use,
other users should not change this assignment
Sammy He [Tue, 21 Feb 2012 05:51:20 +0000 (13:51 +0800)]
ENGR00174904 VPU: change spinlock to mutex
The spinlock caused a bug warning when we enable the lock debug mechenism.
See the log:
"
BUG: sleeping function called from invalid context at mm/slub.c:847
in_atomic(): 1, irqs_disabled(): 0, pid: 6053, name: aiurdemux0:sink
INFO: lockdep is turned off.
no locks held by aiurdemux0:sink/6053.
[<80042f24>] (unwind_backtrace+0x0/0xfc) from
[<800f1dec>] (kmem_cache_alloc+0x114/0x180)
[<800f1dec>] (kmem_cache_alloc+0x114/0x180) from
[<800e425c>] (__get_vm_area_node+0x88/0x194)
[<800e425c>] (__get_vm_area_node+0x88/0x194) from
[<800e4b78>] (__vmalloc_node_range+0x68/0x1c8)
[<800e4b78>] (__vmalloc_node_range+0x68/0x1c8) from
[<800e4d18>] (__vmalloc_node+0x40/0x48)
[<800e4d18>] (__vmalloc_node+0x40/0x48) from
[<800e4f04>] (vmalloc_user+0x2c/0x74)
[<800e4f04>] (vmalloc_user+0x2c/0x74) from [<8038eb28>] (vpu_ioctl+0x204/0x8b0)
[<8038eb28>] (vpu_ioctl+0x204/0x8b0) from [<8010643c>] (do_vfs_ioctl+0x80/0x5e4)
[<8010643c>] (do_vfs_ioctl+0x80/0x5e4) from [<801069d8>] (sys_ioctl+0x38/0x60)
[<801069d8>] (sys_ioctl+0x38/0x60) from [<8003d500>] (ret_fast_syscall+0x0/0x3c)
"
Change the spinlock to mutex to fix this issue.
Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Sammy He <r62914@freescale.com>
Wu Guoxing [Tue, 21 Feb 2012 05:02:50 +0000 (13:02 +0800)]
ENGR00174899: mx6/dl:gpu2d:fix gc320 can not run at high core clock issue
gc320 on Rigel can not run at high core clock, above 200M core clock will
make system hang.
change gc320's axi outstanding limit to 16 as a ic workaround.