missed the 74xx_7xx and mpc86xx arches and the ppmc7xx board do_reset()
functions which resulted in build errors such as:
cpu.c:128: error: conflicting types for 'do_reset'
include/command.h:102: error: previous declaration of 'do_reset' was here
PowerPC, nand_spl: Add relocation support for -fpic
By rearranging the linker script we get support for
relocation of -fpic for free.
Move __got2_entries outside _GOT2_TABLE_ defining scope
matching the rest of PowerPC
Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se> Acked-by: Scott Wood <scottwood@freescale.com> Acked-by: Kim Phillips <kim.phillips@freescale.com>
Priyanka Jain [Tue, 26 Oct 2010 09:22:19 +0000 (14:52 +0530)]
RTC driver for PT7C4338 chip.
PT7C4338 chip is being manufactured by Pericom Technology Inc.
It is a serial real-time clock which provides:
1)Low-power clock/calendar.
2)Programmable square-wave output.
It has 56 bytes of nonvolatile RAM.
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Acked-by: Timur Tabi <timur@freescale.com>
Stefan Roese [Mon, 25 Oct 2010 16:31:48 +0000 (18:31 +0200)]
cfi_flash: Add optional config register write to cfi-detection
This patch adds the possibility to (optinally) write to the
flash configuration register. The Intel style CFI chips support
such a register that can be used to configure the operation
mode to a non-default value.
This method will be used by the t3corp board, which needs to
configure the DS617 Xilinx flash for async read mode.
Stefan Roese [Mon, 25 Oct 2010 16:31:39 +0000 (18:31 +0200)]
cfi_flash: Use flash_read32() in sector_erased()
The function sector_erased() is modified to not use pointer
access, but to use the correct accessor functions. This fixes a
problem on the t3corp board with the Xilinx DS617 flash chips. Here
a board specific accessor function is needed to read from flash
in 32bit mode. This patch enables such an operation mode.
Stefan Roese [Mon, 25 Oct 2010 16:31:29 +0000 (18:31 +0200)]
cfi_flash: Fix problems with status/id read mode
This patch adds some calls to set the flash chip in the read-status-
register- or read-id-mode before the corresponding register is
read back. This problem was detected while porting the common CFI
driver to support the Xilinx DS617 flash chips.
Stefan Roese [Fri, 26 Nov 2010 18:17:40 +0000 (19:17 +0100)]
ppc4xx/POST: Change ethernet test loop count to a default of 10
This patch changes the PPC4xx ethernet POST loop test count from
currently 192 (256 - 64) to a default of 10. While doing this the max
frame size is increased. Each loop run uses a different frame size,
starting with a max of 1514 bytes, down to 64. The default loop
count of 10 can be overriden using CONFIG_SYS_POST_ETH_LOOPS in the
board config header.
The TEST_NUM loop has been removed as it was never used.
The main reason for this change is to reduce the boot time on boards
using this POST test, like the lwmon5 board. This change reduces the
boot time by about 600ms on the lwmon5 board.
Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Wolfgang Denk <wd@denx.de>
Stefan Roese [Fri, 26 Nov 2010 14:45:48 +0000 (15:45 +0100)]
ppc4xx: Update lwmon5 board support
This patch includes the following changes for the lwmon5 board support:
- Enable cache in SDRAM
- Use common EHCI driver instead of the PPC4xx specific OHCI driver
This can be done since only high-speed devices are connected.
- Remove cached TLB entry again after ECC setup
- Use correct define for cache enabling
(CONFIG_4xx_DCACHE instead of CONFIG_SYS_ENABLE_SDRAM_CACHE)
- Enable FIT image support
Stefan Roese [Mon, 25 Oct 2010 16:32:08 +0000 (18:32 +0200)]
ppc4xx: t3corp: Add support for the Xilinx DS617 flash chip
The t3corp board has an Xilinx DS617 flash chip connected to the
onboard FPGA. This patch adds support for these chips. Board
specific flash accessor functions are needed, since the chips
can only be read correctly in 16bit mode.
Additionally the FPGA chip-selects are configured for device-paced
transfers (ready is enabled).
Scott Wood [Fri, 10 Dec 2010 21:13:39 +0000 (15:13 -0600)]
powerpc/nand spl: link libgcc
Recent GCC (4.4+) performs out-of-line epilogues in some cases, when
optimizing for size. It causes a link error for _restgpr_30_x (and similar)
if libgcc is not linked.
It actually increases size with very small binaries, due to the fixed size
of the out-of-line code, and not having any functions that actually need to
restore more than 2 or 3 registers. But I don't see a way to turn it off,
other than asking GCC to optimize for speed -- which may also increase
size for some boards.
Signed-off-by: Scott Wood <scottwood@freescale.com> Acked-by: Kim Phillips <kim.phillips@freescale.com> Acked-by: Wolfgang Denk <wd@denx.de>
Armada100: Add Board Support for Marvell Aspenite-DB
Aspenite is a Development Board for ASPEN/ARMADA168(88AP168) with
* Processor upto 1.2GHz
* Parallel 1Gb x8 DDR2-1066 MHz
* 16 Mb x16 NOR, 4Gb x8 SLC NAND, footprint for SPI NOR
* Footprints for eMMC/eSD NAND & MMC x8 card
* 4-in-1 card reader (xD, MMC/SD/MS Pro), CF True IDE socket
* SEAF memory board, subset of PISMO2
With Peripherals:
* 4.3” WVGA 24-bit LCD
* Audio codecs (AC97 & I2S), TSI
* VGA camera
* Video in via 3 RCA jacks, and HDMI type C out
* Marvell 88W8688 802.11bg/BT module
* GPS RF IC
* Dual analog mics & speakers, headset jack, LED, ambient light sensor
* USB2.0 HS host (A), OTG (micro AB)
* FE PHY, PCIE Mini Card slot
* GPIO, GPIO expander with DIP switches for easier selection UART serial over USB, CIR
This patch adds basic board support with DRAM and UART functionality
The patch is tested for boot from DRAM using XDB
arm: Add Support for Marvell ARMADA 100 Familiy SoCs
ARMADA 100 Family processors are highly integrated SoCs
based on Sheeva_88SV331x-v5 PJ1 cpu core.
Ref: http://www.marvell.com/products/processors/applications/armada_100
Stefan Roese [Tue, 14 Dec 2010 16:49:52 +0000 (17:49 +0100)]
ppc4xx: Fix missing linker scripts for partial linking
This patch fixes the acadia_nand and kilauea_nand linker scripts
which have been missing in commit ee8028b7 [ppc4xx: Cleanup for
partial linking and --gc-sections]
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Bernhard Weirich <Bernhard.Weirich@riedel.net>
Baidu Boy [Mon, 29 Nov 2010 13:10:45 +0000 (21:10 +0800)]
mpc83xx: fix pcie enumeration
This patch fix a problem for the pcie enumeration for mpc83xx cpus. Without
this we will not get correct value in hose->regions[...].
The pointer *reg in function mpc83xx_pcie_init_bus() shall not be changed.
Because we will use this pointer as a parameter to call function
mpc83xx_pcie_register_hose().
Signed-off-by: Baidu Boy <liucai.lfn@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Timur Tabi [Fri, 3 Dec 2010 19:03:45 +0000 (13:03 -0600)]
p1022ds: fix switching of DIU/LBC signals
On the P1022, the pins which drive the video display (DIU) are muxed with the
local bus controller (LBC), so if the DIU is active, the pins need to be
temporarily muxed to LBC whenever accessing NOR flash.
The code which handled this transition is checking and changing the wrong
bits in PMUXCR.
Also add a follow-up read after a write to NOR flash if we're going to
mux back to DIU after the write, as described in the P1022 RM.
Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
P.V.Suresh [Sat, 4 Dec 2010 05:07:23 +0000 (10:37 +0530)]
fsl_esdhc: Set the eSHDC DMACTL[SNOOP] bit after resetting the controller
eSDHC host controller reset results in clearing of snoop bit also.
This patch sets the SNOOP bit after the completion of host controller reset.
Without this patch mmc reads are not consistent.
Signed-off-by: P.V.Suresh <pala@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
John Schmoller [Thu, 2 Dec 2010 17:43:10 +0000 (11:43 -0600)]
fsl_upm: Add MxMR/MDR synchronization
According to Freescale reference manuals (eg section "13.4.4.2
Programming the UPMs" of the P4080 Reference Manual):
"Since the result of any update to the MxMR/MDR register must be in
effect before the dummy read or write to the UPM region, a write to
MxMR/MDR should be followed immediately by a read of MxMR/MDR."
The UPM on a custom P4080-based board did not work without performing
a read of MxMR/MDR after a write.
Signed-off-by: John Schmoller <jschmoller@xes-inc.com> Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
tsec: Force TBI PHY to 1000Mbps full duplex in SGMII mode
Removed setting Auto-Neg by default, however this is believed to be
proper default configuration for initialization of the TBI interface.
Instead we explicitly set CONFIG_TSEC_TBICR_SETTINGS for the
XPedite5370 & XPedite5500 boards that use a Broadcomm PHY which require
Auto-Neg to be disabled to function properly.
This addresses a breakage on the P2020 DS & MPC8572 DS boards when used
with an SGMII riser card. We also remove setting
CONFIG_TSEC_TBICR_SETTINGS on the P1_P2_RDB family of boards as now the
default setting is sufficient for them.
Additionally, we clean up the code a bit to remove an unnecessary second
define.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Peter Tyser <ptyser@xes-inc.com> Tested-by: Peter Tyser <ptyser@xes-inc.com>
Dirk Behme [Sat, 11 Dec 2010 16:01:00 +0000 (11:01 -0500)]
OMAP3: SPI driver
CC: Ruslan N. Araslanov <byaaka@yandex.ru> Signed-off-by: Ruslan Araslanov <ruslan.araslanov@vitecmm.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Balaji T K [Thu, 25 Nov 2010 10:52:04 +0000 (16:22 +0530)]
ARMV7: OMAP4: twl6030 add battery charging support
Add battery charging support twl6030 driver.
Add support for battery voltage and current measurements.
Add command to get battery status and start/stop battery charging from USB.
Signed-off-by: Balaji T K <balajitk@ti.com> Tested-by: Steve Sakoman <steve.sakoman@linaro.org> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Nick Thompson [Sat, 11 Dec 2010 15:46:46 +0000 (10:46 -0500)]
davinci: Rewrite timer.c to use tbl/tbu emulation variables in gd
This change allows the davinci timer functions to be used before
relocation since it avoids using static variables prior to BSS being
made available.
The code is based on that used in the at91 timers, modified to use
a davinci specific hardware timer. It also maintains reset_timer()
to allow deprecated timer usage to continue to work (for example,
in nand_base.c)
Signed-off-by: Nick Thompson <nick.thompson@ge.com> Tested-by: Ben Gardiner <bengardiner@nanometrics.ca> Tested-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Tested-by: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Macpaul Lin [Fri, 3 Dec 2010 05:52:34 +0000 (13:52 +0800)]
include/linux/mii.h: update for supporting GE
This file has been synced (copy) from Linux source code.
This commit was based on kernel 2.6.32.
It updates gigabit related phy registers and basic definitions.
Signed-off-by: Macpaul Lin <macpaul@andestech.com>
ARM: make timer variables in gt_t available for all ARM platforms
All code that attemots to access variables in BSS before relocation
(for example directly or indirectly by board_init_f()) needs to be
fixed. Especially timer.c needs to fix on most of the ARM platforms.
This patch makes timer related variables in gd_t available for
all ARM implementations.
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Edited commit message. Signed-off-by: Wolfgang Denk <wd@denx.de>
Andreas Bießmann [Tue, 30 Nov 2010 23:58:36 +0000 (00:58 +0100)]
armv7: fix relocation skip
I doubt the stack_setup() was defective before:
we load the current location of _start and compare against destination
of relocate_code(). If we are already there we shoud skip the
relocation and jump over to clear_bss. Before the clear_bss was also skipped.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Andreas Bießmann [Tue, 30 Nov 2010 23:58:34 +0000 (00:58 +0100)]
arm: relocate_code(): do not set register useless
In case we are still at relocation target address before relocation we
do not need to load the registers needed for relocation. We should
instead skip the whole relocation part and jump over to clear_bss
immediately.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Andreas Bießmann [Tue, 30 Nov 2010 23:58:33 +0000 (00:58 +0100)]
arm: copy_loop(): use scratch register
This patch uses r1 as scratch register for copy_loop(). Therefore we do
not longer need r7 for the storage of relocate_code()'s 'addr_moni' (the
destination address of relocation).
Therefore r7 can be used later on for other purposes.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Kumar Gala [Tue, 30 Nov 2010 21:58:27 +0000 (15:58 -0600)]
hwconfig: Fix handling of env_hwconfig, board_hwconfig, and cpu_hwconfig
The handling of env_hwconfig, board_hwconfig, and cpu_hwconfig got
broken when we removed the boards defining dummy board_hwconfig
& cpu_hwconfig values.
We fix this by handling the various strings in priority order. If
hwconfig_parse returns NULL for a given string we check the next one
in order (env_hwconfig, board_hwconfig, followed by cpu_hwconfig).
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Wolfgang Denk [Sun, 28 Nov 2010 20:18:58 +0000 (21:18 +0100)]
Move LDSCRIPT definitions to board config files.
Recent cleanup actions resulted in a number of config.mk files that
contained only LDSCRIPT definitions. Move these into th respective
board config files and remove the now empty config.mk files.
Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Matthias Fuchs <matthias.fuchs@esd-electronics.com> Cc: Detlev Zundel <dzu@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Andre Schwarz <andre.schwarz@matrix-vision.de> Cc: Peter De Schrijver <p2@mind.be> Acked-by: Detlev Zundel < dzu@denx.de> Acked-by: Andre Schwarz <andre.schwarz@matrix-vision.de> Acked-by: Heiko Schocher<hs@denx.de> Acked-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Stefano Babic [Tue, 30 Nov 2010 16:32:10 +0000 (11:32 -0500)]
Davinci 8xx: Move common functions to share code
As more Davinci 8xx board can be added, move common code
to be shared between boards.
* rebased ontop of Sugosh's patches
* moving the HAWKBOARD_KICK{0,1}_UNLOCK defines to
arch/arm/include/asm/arch-davinci/davinci_misc.h from to
arch/arm/include/asm/arch-davinci/da8xx_common.h
* don't define dram functions in PRELOADER
* move sync_env_enetaddr into existing EMAC ifdef
* use misc.c in hawkboard nand_spl
This patch is a port of the work by Sudhakar Rajeshekhara in commit ab3effbcad8851cc65dc5241a01c064d2030a3b2 of
git://arago-project.org/git/people/sandeep/u-boot-davinci.git.
The da850 UI board has on it an RMII PHY which can be used if the MDC line
to the MII PHY on the baseboard is disabled and the RMII PHY is enabled by
configuring the values of some GPIO pins on the IO expander of the UI board.
This patch implements disabling that line via GPIO2[6], configuring the UI
board's IO expander and setting only the pinmux settings that are needed for
RMII operation.
Tested on da850evm by adding a define for CONFIG_DRIVER_TI_EMAC_USE_RMII.
Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca> CC: Sandeep Paulraj <s-paulraj@ti.com> CC: Ben Warren <biggerbadderben@gmail.com> CC: Mike Frysinger <vapier@gentoo.org> CC: Sughosh Ganu <urwithsughosh@gmail.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Sughosh Ganu [Tue, 30 Nov 2010 16:25:01 +0000 (11:25 -0500)]
Add board support for hawkboard
The patch adds basic board support for TI's OMAP-L138 based
Hawkboard. This board is pretty similar to the da850 EVM. Support for
nand and network access is added in this version.
The following bootup procedure is used.
At reset, the Rom Boot Loader(RBL), initialises the ddr and the nand
controllers and copies the second stage bootloader(nand_spl) to
RAM. The secondary bootloader then copies u-boot from a predefined
location in the nand flash to the RAM, and passes control to the
u-boot image.
Three config options are supported
* hawkboard_config - Used to create the u-boot.bin. Tftp the
u-boot.bin image to the RAM from u-boot, and flash to the nand flash
at address 0xe0000.
* hawkboard_nand_config - Used to generate the secondary
bootloader(nand_spl) image. This creates an elf file u-boot-spl
under nand_spl/. Create an AIS signed image using this file, and
flash it to the nand flash at address 0x20000. The ais file should
fit in one block.
* hawkboard_uart_config - This is same as the first image, but with
the TEXT_BASE as expected by the RBL(0xc1080000). Create the AIS
Sughosh Ganu [Mon, 29 Nov 2010 01:21:58 +0000 (20:21 -0500)]
Remove board_init_f function from nand_boot.c
Remove the board_init_f function from nand_spl/nand_boot.c. This
function is to be defined by all boards using the nand_spl
functionality in their individual board directory.
Currently this function was being used by the smdk6400 board. Added
the board specific function definition.
Stefano Babic [Thu, 11 Nov 2010 14:38:02 +0000 (15:38 +0100)]
da850: Enable SPI Flash
The patch was already posted to the arago project,
but not yet to mainline. It allows to save environment into
the spi flash. Tested on LogiPD tmdxl138.
Wolfgang Wegner [Fri, 23 Apr 2010 09:08:05 +0000 (11:08 +0200)]
add Xilinx_abort_fn to Xilinx_Spartan3_Slave_Serial_fns
Currently the hardware was left in an undefined state in case Spartan3
serial load failed. This patch adds Xilinx_abort_fn to give the board
a possibility to clean up in this case.
Signed-off-by: Wolfgang Wegner <w.wegner@astro-kom.de>
Dirk Behme [Mon, 29 Nov 2010 18:56:59 +0000 (19:56 +0100)]
ARMV7: Vexpress: Fix build error
Fix ca9x4_ct_vxp build error
Configuring for ca9x4_ct_vxp board...
board/armltd/vexpress/libvexpress.o: In function `udelay':
u-boot.git/board/armltd/vexpress/ca9x4_ct_vxp.c:161: multiple
definition of `udelay'
lib/libgeneric.o:u-boot.git/lib/time.c:34: first defined here
lib/libgeneric.o: In function `udelay':
zlib.c:(.text+0x1ee8): undefined reference to `__udelay'
Matt Waddel [Thu, 2 Dec 2010 19:43:14 +0000 (12:43 -0700)]
ARMV7: Vexpress: fix build errors
This patch fixes build errors in the vexpress system:
- Removed sys_proto.h requirement from syslib.c.
- Switched vexpress to the default armv7 linker script.
- Renamed TEXT_BASE to CONFIG_SYS_TEXT_BASE.
Signed-off-by: Matt Waddel <matt.waddel@linaro.org>
Lei Wen [Tue, 7 Dec 2010 01:38:18 +0000 (09:38 +0800)]
onenand: fix oob print out issue
Seems original implementation forget to set the pointer to point
to the oobbuf, so when we want to see oob buf, we see nothing...
Fix it by get pointer as the oobbuf set.
Andreas Bießmann [Tue, 30 Nov 2010 09:45:06 +0000 (09:45 +0000)]
arm920t/at91/timer: replace bss variables by gd
Reuse the gd->tbl value for timestamp and add gd->lastinc for lastinc
bss values in arm920t/at91/timer driver.
The usage of bss values in driver before initialisation of bss is
forbidden. In that special case some data in .rel.dyn gets corrupted by
the arm920t/at91/timer driver.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Stefan Roese [Mon, 1 Nov 2010 16:28:00 +0000 (17:28 +0100)]
UBIFS: Change ubifsload to not read beyond the requested size
Until now ubifsload pads the destination with 0 up to a multiple of
UBIFS_BLOCK_SIZE (4KiB) while reading a file to memory. This patch
changes this behaviour to only read to the requested length. This
is either the file length or the length/size provided as parameter
to the ubifsload command.
Since the driver is used not only on Freescale boards,
we move it to a common place for video drivers as
suggested by Wolfgang. The patch also cleans up the
top level Makefile.
projects / karo-tx-uboot.git / log