Merge tag 'amlogic-drivers-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/late
Pull "Amlogic driver updates for v4.9, 2nd round" from Kevin Hilman:
- media: update IR support for newer SoCs
- firmware: add secure monitor driver
- net: new stmmac glue driver
- usb: udd DWC2 support for meson-gxbb
- clocks: expose more clock IDs for use by DT
- DT binding updates
* tag 'amlogic-drivers-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: (21 commits)
clk: gxbb: expose i2c clocks
clk: gxbb: expose USB clocks
clk: gxbb: expose spifc clock
clk: gxbb: expose MPLL2 clock for use by DT
Documentation: dt-bindings: Add documentation for the Meson USB2 PHYs
usb: dwc2: add support for Meson8b and GXBB SoCs
net: stmmac: update the module description of the dwmac-meson driver
net: stmmac: add a glue driver for the Amlogic Meson 8b / GXBB DWMAC
stmmac: introduce get_stmmac_bsp_priv() helper
net: dt-bindings: Document the new Meson8b and GXBB DWMAC bindings
clk: meson-gxbb: Export PWM related clocks for DT
meson: clk: Add support for clock gates
gxbb: clk: Adjust MESON_GATE macro to be shared with meson8b
clk: meson: Copy meson8b CLKID defines to private header file
meson: clk: Rename register names according to Amlogic datasheet
meson: clk: Move register definitions to meson8b.h
clk: meson: Rename meson8b-clkc.c to reflect gxbb naming convention
nvmem: amlogic: Add Amlogic Meson EFUSE driver
firmware: Amlogic: Add secure monitor driver
media: rc: meson-ir: Add support for newer versions of the IR decoder
...
Kevin Hilman [Thu, 15 Sep 2016 22:35:35 +0000 (15:35 -0700)]
Merge tag 'amlogic-drivers-2' into v4.8/dt64-2
Amlogic driver updates for v4.9, 2nd round
- media: update IR support for newer SoCs
- firmware: add secure monitor driver
- net: new stmmac glue driver
- usb: udd DWC2 support for meson-gxbb
- clocks: expose more clock IDs for use by DT
- DT binding updates
USB0_DDR_BRIDGE and USB1_DDR_BRIDGE1 are needed for the related
dwc2 usb controller. USB, USB0 and USB1 are needed for the PHYs.
Expose these clocks to DT and comment out in clk driver.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This exposes the MPLL2 clock as this is one of the input clocks of the
ethernet controller's internal mux.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Kevin Hilman [Wed, 14 Sep 2016 18:21:15 +0000 (11:21 -0700)]
Merge branch 'clk-meson-gxbb' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux into v4.8/drivers
* 'clk-meson-gxbb' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux:
clk: meson-gxbb: Export PWM related clocks for DT
meson: clk: Add support for clock gates
gxbb: clk: Adjust MESON_GATE macro to be shared with meson8b
clk: meson: Copy meson8b CLKID defines to private header file
meson: clk: Rename register names according to Amlogic datasheet
meson: clk: Move register definitions to meson8b.h
clk: meson: Rename meson8b-clkc.c to reflect gxbb naming convention
clk: meson: Fix invalid use of sizeof in gxbb_aoclkc_probe()
clk: meson: Add GXBB AO Clock and Reset controller driver
dt-bindings: clock: reset: Add GXBB AO Clock and Reset Bindings
clk: gxbb: add MMC gate clocks, and expose for DT
Documentation: dt-bindings: Add documentation for the Meson USB2 PHYs
Add the documentation for the bindings for the Meson8b and GXBB USB2
PHYs.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Acked-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add the nodes for the dwc2 USB controller and the related USB PHYs.
Currently we force usb0 to host mode because OTG is currently not
working in our PHY driver.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add nodes for i2c bus on gxbb based platforms.
On the OdroidC2 (I2C A) and P200 (I2C B), the pull-up resistor are
present directly on the board. This indicates that these pins are
dedicated to i2c.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Neil Armstrong [Sun, 11 Sep 2016 12:39:03 +0000 (14:39 +0200)]
ARM64: dts: meson-gxbb: add the SDIO pins
This is used to configure the pins of the sd_emmc_a controller to
which an SDIO module is connected (when available).
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
ARM64: dts: meson-gxbb: use the new GXBB DWMAC glue driver
The Amlogic reference driver uses the "mc_val" devicetree property to
configure the PRG_ETHERNET_ADDR0 register. Unfortunately it uses magic
values for this configuration.
According to the datasheet the PRG_ETHERNET_ADDR0 register is at address
0xc8834108. However, the reference driver uses 0xc8834540 instead.
According to my tests, the value from the reference driver is correct.
No changes are required to the board dts files because the only
required configuration option is the phy-mode, which had to be
configured correctly before as well.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
ARM64: dts: amlogic: enable ethernet on all Tronsmart Vega S95 devices
All of these have a Realtek Gbit RGMII PHY.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Tested-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Merge tag 'integrator-armsoc-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into next/late
Pull "This is a bunch of Integrator changes for v4.9" Linus Walleij:
- Add and fix a bunch of clocks in the DTS corresponding
to the new clock support merged into the clk tree.
- Move the CLCD display configuration from boardfile to
device tree using the new CLCD support merged into the
fbdev tree.
- Cut some auxdata.
- Cut some static remappings.
- Move the sched_clock() counter to use syscon+regmap.
* tag 'integrator-armsoc-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
ARM: integrator: read counter using syscon/regmap
ARM: integrator: cut down on static maps
ARM: integrator: delete some auxdata
ARM: integrator: move CP CLCD display to DTS
ARM: dts: add the core module clocks to Integrator/CP
ARM: dts: Add the core module clocks to Integrator/AP
ARM: dts: add the Integrator/AP baseboard clocks
ARM: dts: set the 24MHz xtal as parent of the UART clock
Merge tag 'renesas-arm64-dt-for-v4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/late
Pull "Renesas ARM64 Based SoC DT Updates for v4.9" from Simon Horman:
Clean up:
* Remove unnecessary cap-mmc-highspeed property from SDHI nodes on r8a7795 SoC
* Add SoC-specific compatible property to audio-dmac nodes on r8a7795 SoC
New Board:
* Add r8a7794/h3ulcb board
Enablement:
* Add PFC and GPIO to r8a7796 SoC
* Enable DU and USB 2.0 on r8a7795/salvator-x board
* Add VTP, FCPV, FCPF and FDP1 to r8a7795 SoC
* Set maximum frequency for SDHI clocks on r8a7795 SoC
Merge tag 'sunxi-dt-for-4.9-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/late
Merge "Allwinner DT changes for 4.9, take 2" from Maxime Ripard:
A second set of device tree changes, this time switching a few SoCs to the
new sunxi-ng clock framework. We also added the support for a new SoC
(NextThing GR8 and its evaluation board), and the support for the DRM
driver in the A33.
To maintain bisectability, while avoiding some un-trivial merge
conflicts, I had to merge the clk branch that I've sent a PR to Mike
and Stephen. This branch will of course be stable.
* tag 'sunxi-dt-for-4.9-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux: (53 commits)
ARM: dts: gr8: Add support for the GR8 evaluation board
ARM: dts: Add NextThing GR8 dtsi
ARM: dts: sun8i: Move A23/A33 usbphy and usb_otg nodes to common dtsi
ARM: sun8i: a23/a33: Add RGB666 pins
ARM: sun8i: a33: Add display pipeline
ARM: sun8i: Convert the A23 and A33 to the CCU
ARM: dts: sun6i: switch A31/A31s to new CCU clock bindings
clk: sunxi-ng: Add hardware dependency
clk: sunxi-ng: Add A23 CCU
clk: sunxi-ng: Add A33 CCU support
clk: sunxi-ng: Add N-class clocks support
clk: sunxi-ng: mux: Add mux table macro
clk: sunxi-ng: div: Allow to set a maximum
clk: sunxi-ng: div: Add kerneldoc for the _ccu_div structure
clk: sunxi-ng: div: Add mux table macros
devicetree: Add vendor prefix for FriendlyARM
ARM: dts: sun8i: Add dts file for the NanoPi NEO SBC
ARM: dts: sun8i-q8-common: Add support for SDIO wifi controllers
ARM: dts: sun8i: Add dts file for the Orange Pi Plus2E SBC
ARM: dts: sun8i: Orange Pi Plus dts is for the Plus and Plus 2
...
ARM: dts: gr8: Add support for the GR8 evaluation board
The GR8-EVB is a small board with an NextThing GR8, an Hynix MLC NAND,
an AXP209 PMIC, USB host and OTG, an SPDIF output and a connectors for CSI,
I2S and LCD.
The GR8 is an SoC made by Nextthing loosely based on the sun5i family.
Since it's not clear yet what we can factor out and merge with the A10s and
A13 support, let's keep it out of the sun5i.dtsi include tree. We will
figure out what can be shared when things settle down.
Jean Delvare [Thu, 8 Sep 2016 21:28:29 +0000 (23:28 +0200)]
clk: sunxi-ng: Add hardware dependency
The sunxi-ng clock driver is useless for other architectures.
Signed-off-by: Jean Delvare <jdelvare@suse.de> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Maxime Ripard [Wed, 24 Aug 2016 12:10:15 +0000 (14:10 +0200)]
clk: sunxi-ng: Add A33 CCU support
This commit introduces the clocks found in the Allwinner A33 CCU.
Since this SoC is very similar to the A23, and we share a significant share
of the DTSI, the clock IDs that are going to be used will also be shared
with the A23, hence the name of the various header files.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
Maxime Ripard [Tue, 6 Sep 2016 10:29:04 +0000 (12:29 +0200)]
clk: sunxi-ng: div: Allow to set a maximum
Some dividers might have a maximum value that is lower than the width of
the register.
Add a field to _ccu_div to handle those case properly. If the field is set
to 0, the code will assume that the maximum value is the maximum one that
can be used with the field register width.
Otherwise, we'll use whatever value has been set.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
Remove cap-mmc-highspeed property from SDHI2 and SDHI3.
This property is unnecessary as the driver automatically sets
the highspeed capability. Furthermore its use is inconsistent with SDHI0
and SDHI1 which are also highspeed capable but do not have this property
present.
Found by inspection.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
net: stmmac: add a glue driver for the Amlogic Meson 8b / GXBB DWMAC
The Ethernet controller available in Meson8b and GXBB SoCs is a Synopsys
DesignWare MAC IP core which is already supported by the stmmac driver.
In addition to the standard stmmac driver some Meson8b / GXBB specific
registers have to be configured for the PHY clocks. These SoC specific
registers are called PRG_ETHERNET_ADDR0 and PRG_ETHERNET_ADDR1 in the
datasheet.
These registers are not backwards compatible with those on Meson 6b,
which is why a new glue driver is introduced. This worked for many
boards because the bootloader programs the PRG_ETHERNET registers
correctly. Additionally the meson6-dwmac driver only sets bit 1 of
PRG_ETHERNET_ADDR0 which (according to the datasheet) is only used
during reset.
Currently all configuration values can be determined automatically,
based on the configured phy-mode (which is mandatory for the stmmac
driver). If required the tx-delay and the mux clock (so it supports
the MPLL2 clock as well) can be made configurable in the future.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Tested-by: Kevin Hilman <khilman@baylibre.com> Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Create a helper to retrieve dwmac private data from a dev
pointer. This is useful in PM callbacks and driver remove.
Signed-off-by: Joachim Eastwood <manabian@gmail.com> Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
net: dt-bindings: Document the new Meson8b and GXBB DWMAC bindings
This patch adds the documentation for the DWMAC ethernet controller
found in Amlogic Meson 8b (S805) and GXBB (S905) SoCs.
The main difference between the Meson6 glue is that different registers
(with different layout) are used.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Hans de Goede [Fri, 26 Aug 2016 14:52:36 +0000 (16:52 +0200)]
ARM: dts: sun8i-q8-common: Add support for SDIO wifi controllers
Most of the sun8i q8 boards have an SDIO wifi controller, on the
variants which use an USB wifi controller, this will result in a
couple of error msg-s in dmesg when proving the sdio bus and
an used mmc controller.
The best way to deal with wifi on this boards really is to simply
let the kernel auto-detect usb or sdio wifi controllers, so we
will just have to live with the few errors in dmesg.
This has been tested on a23 based q8 tablets with ESP8089, RTL8703AS and
RTL8189FTV wifi controllers.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Hans de Goede [Sat, 3 Sep 2016 11:05:18 +0000 (13:05 +0200)]
ARM: dts: sun8i: Add dts file for the Orange Pi Plus2E SBC
The Orange Pi Plus2E is an extended version of the Orange Pi Pc Plus,
with 2G RAM and an external gbit ethernet phy.
Note currently the dts is pretty much empty (except for including the
pc-plus dts), I've a local patch which enables the emac actually making
this dts different from the pc-plus one, but that needs the h3 emac
driver to get merged first.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Neil Armstrong [Mon, 22 Aug 2016 12:49:37 +0000 (14:49 +0200)]
clk: meson-gxbb: Export PWM related clocks for DT
Add the PWM related clocks in order to be referenced as PWM source
clocks.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/1471870177-10609-1-git-send-email-narmstrong@baylibre.com
Alexander Müller [Sat, 27 Aug 2016 17:40:54 +0000 (19:40 +0200)]
meson: clk: Add support for clock gates
This patch adds support for the meson8b clock gates. Most of
them are disabled by Amlogic U-Boot, but need to be enabled
for ethernet, USB and many other components.
Signed-off-by: Alexander Müller <serveralex@gmail.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/1472319654-59048-7-git-send-email-serveralex@gmail.com
Alexander Müller [Sat, 27 Aug 2016 17:40:53 +0000 (19:40 +0200)]
gxbb: clk: Adjust MESON_GATE macro to be shared with meson8b
The macro used gxbb_ prefix for clock definitions. In order
to share the macro between gxbb and meson8b, the prefix must
be moved to gxbb.c.
Signed-off-by: Alexander Müller <serveralex@gmail.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/1472319654-59048-6-git-send-email-serveralex@gmail.com
Alexander Müller [Sat, 27 Aug 2016 17:40:52 +0000 (19:40 +0200)]
clk: meson: Copy meson8b CLKID defines to private header file
Only expose future CLKID constants if necessary. This patch
removes CLK_NR_CLKS from the DT bindings but leaves all previously
defined CLKIDs there to keep backward compatibility.
Signed-off-by: Alexander Müller <serveralex@gmail.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/1472319654-59048-5-git-send-email-serveralex@gmail.com
Alexander Müller [Sat, 27 Aug 2016 17:40:51 +0000 (19:40 +0200)]
meson: clk: Rename register names according to Amlogic datasheet
Signed-off-by: Alexander Müller <serveralex@gmail.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/1472319654-59048-4-git-send-email-serveralex@gmail.com
Alexander Müller [Sat, 27 Aug 2016 17:40:50 +0000 (19:40 +0200)]
meson: clk: Move register definitions to meson8b.h
Move the register definitions into a separate header file
to reflect the gxbb implementation.
Signed-off-by: Alexander Müller <serveralex@gmail.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/1472319654-59048-3-git-send-email-serveralex@gmail.com
Alexander Müller [Sat, 27 Aug 2016 17:40:49 +0000 (19:40 +0200)]
clk: meson: Rename meson8b-clkc.c to reflect gxbb naming convention
Signed-off-by: Alexander Müller <serveralex@gmail.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/1472319654-59048-2-git-send-email-serveralex@gmail.com
ARM64: dts: meson-gxbb: Enable the the IR decoder on supported boards
Enable the Infrared Remote Controller on boards which have an Infrared
receiver.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Tested-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This adds the Infrared Remote Controller node so boards with an IR
remote can simply enable it.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Tested-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Neil Armstrong [Sat, 20 Aug 2016 09:54:21 +0000 (11:54 +0200)]
dt-bindings: media: meson-ir: Add Meson8b and GXBB compatible strings
New bindings are needed as the register layout on the newer platforms
is slightly different compared to Meson6b.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Acked-by: Rob Herring <robh@kernel.org> Tested-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Kevin Hilman [Thu, 1 Sep 2016 22:26:13 +0000 (15:26 -0700)]
ARM64: dts: amlogic: add the input pin for the IR remote
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Tested-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>