Richard Liu [Tue, 1 Apr 2014 01:58:49 +0000 (09:58 +0800)]
ENGR00306257 [#1027]fix system hang up issue caused by GPU
This issue happens when multiple thread is trying to idle GPU at the
same time, root cause is some wrong logic related with powerMutex which
cause cpu still access GPU AHB register after GPU is suspend(clock off),
that cause the bus lockup and make the whole system hang.
-Updated the outstanding request limit to 12.
-Refined the 2D chip feature check.
-Refine the 2D cache flush operation
(avoid FE and PE access memory through the same port).
-Enable cache flush for filterblt.
-Dynamic enabling SPLIT_RECT by checking chip feature(disable for us)
-Use brush stretch blt for clear operation.
Liu Ying [Mon, 17 Mar 2014 03:28:53 +0000 (11:28 +0800)]
ENGR00303663 mxc v4l2 capture: Don't return error if we cannot get mipi csi2
The mipi csi2 code is ugly present in the capture pipeline setup/disable
routions with '#ifdef CONFIG_MXC_MIPI_CSI2/#endif' protected. Whenever
it finds mipi_csi2_info is not gotten correctly, it will return error to
callers. This breaks the normally routines in which mipi csi2 is not used
and mipi csi2 driver is disabled in its devicetree node(but with the
Kconfig CONFIG_MXC_MIPI_CSI2 defined). A real example is the capture
feature on the MX6 Sabreauto platforms. We have only parallel CSI input
on it and the mipi csi2 driver is disabled in its devicetree node but with
the Kconfig CONFIG_MXC_MIPI_CSI2 defined. So, a reasonable choice at present
is not to return error if mipi_csi2_info cannot be gotten, though we could
eventually re-organize the capture code for a better total solution in the
future.
commit f8e1a3bb62eecf93a31a51c4dbe08a0214fa1d57 added a hard
coding for csi_parma.mclk setting to 27MHz. The comment added by
that commit is totally wrong by telling that csi_param.mclk
would be a kind of 'pixel clock' set in 'csi_data_dest' register.
This patch removes the unnecessary mclk setting for csi_param.mclk
variable, since it is only valid for CSI test mode.
Liu Ying [Fri, 8 Mar 2013 08:33:35 +0000 (16:33 +0800)]
ENGR00243315-2 IPUv3 CSI:Remove test mode clock setting
This patch removes test mode clock setting in function
ipu_csi_init_interface(), since the setting is only
necessary for function _ipu_csi_set_test_generator().
This unnecessary setting is added wrongly by commit f8e1a3bb62eecf93a31a51c4dbe08a0214fa1d57.
As the sabreauto CPU board schematics mentions, the MIPI connector
isn't mechanically compatible with Freescale MIPI display and camera
board, then we have only the parallel CSI video input that is supported
by the v4l2_cap_0 node. So, let's remove the orphan one - v4l2_cap_1.
Loren Huang [Thu, 27 Feb 2014 07:44:49 +0000 (15:44 +0800)]
ENGR00301095 gpu:gpu hang when dma memory is used up
When dma zone memory used up, gckOS_AllocateNonPagedMemory() will try to
free non paged memory cache and allocate again. Such operation will cause
twice memory mutex request and cause gpu driver hang.
The solution is free the memory mutex at first before trying to free non
paged memory cache.
Oliver Brown [Wed, 19 Feb 2014 23:32:48 +0000 (17:32 -0600)]
ENGR00290659 IPUv3: Fix a flashing vert. line when downsizing 1080i to 300x400.
When split mode deinterlacing is the ipu_calc_stripes_sizes() was failing due
to an unnecessary test. Added logic to use the maximal_stripe_width only if
the flag parameter has the bit 0 clear for not equal stripe sizes.
Signed-off-by: Oliver Brown <oliver.brown@freescale.com>
Peter Chen [Fri, 24 Jan 2014 06:59:30 +0000 (14:59 +0800)]
ENGR00296519 USB: EHCI: wait more than 3ms until the device enters full-speed idle
If the high-speed device does not enter full-speed idle after
wakeup on disconnect logic has effected, there will be an
unexpected disconnect wakeup interrupt due to the bus is still SE0.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Sandor Yu [Wed, 22 Jan 2014 07:09:37 +0000 (15:09 +0800)]
ENGR00296050 mxsfb: fb failed to work after suspend in console mode
When device boot into console, frame buffer failed to work after
suspend/resume.
That is caused by LCDIF IP lost all registers configuration
in suspend mode, and console didn't reconfiguration fb after resume.
Same issue didn't found with Yocto UI.
Reinitialize frame buffer driver after resume to fix the issue.
Sandor Yu [Wed, 15 Jan 2014 08:50:04 +0000 (16:50 +0800)]
ENGR00295201 ipuv3: vdic: kernel dump when run deinterlace stress test
Kernel will dump when run deinterlace stress test.
It is caused by vditmpbuf being reallocated by another thread
when one thread accesses it.
Issue is fixed by putting these code in mutex.
Sandor Yu [Fri, 27 Dec 2013 09:10:03 +0000 (17:10 +0800)]
ENGR00293488 ipu: vdi: Support more memory type
__va function only can handle frame buffer from low memory.
Use page_address function to replace it, that can handle
frame buffer from both lower and high memory.
Use ioremap_nocache function to handle Frame buffer
from GPU reserve memory pool.
Correct vdi data save buffer size, save both luma and chroma part for
interleaved YUV format.
For non-interleaved and partial-interleaved YUV format,
save luma part data, chroma part is not covered in the patch.
Robin Gong [Tue, 21 Jan 2014 02:41:46 +0000 (10:41 +0800)]
ENGR00295892-1: leds: leds-gpio: keep charger led state while system suspended
gpio-leds driver common framework didn't take care of this case if use CONFIG_OF
, add property "retain-state-suspended" in dts and check it while gpio-leds
device created.
Loren Huang [Thu, 16 Jan 2014 08:23:37 +0000 (16:23 +0800)]
ENGR00295218-2 gpu: Allow allocate vg memory from small block reserved memory
-Most vg memory must requires reserved memory, when reserved memory is
used up by 3d appliction. vg hardware can't be constructed successfully,
which cause whole context creation failure(including 3d context).
-Allow allocating vg memory from small block reserved memory can help such
multi context cases.
Loren Huang [Thu, 9 Jan 2014 09:38:37 +0000 (17:38 +0800)]
ENGR00294354 gpu:Using vitural memory cause AXI bus error
There are two possible reasons to cause AXI bus error
1.Allocate Tile status buffer from virtual memory. It seems gc2000
and gc880 doesn't support tile status buffer from virtual memory.
2.Stream buffer using very beginning gpu mmu address. In this condition,
a faked non gpu mmu address maybe generated and fill into gpu which cause
AXI bus error.
Loren Huang [Thu, 9 Jan 2014 09:36:27 +0000 (17:36 +0800)]
ENGR00292154-3 gpu:Adjust logic for non_paged memory cache
non_page memory cache will only be freed when application exit.
It will have waste when contiguous memory used up.
Add logic to free it when contiguous memory is used up.
Loren Huang [Thu, 9 Jan 2014 09:35:07 +0000 (17:35 +0800)]
ENGR00292154-1 gpu:Fix kernel panic when ctrl+c an application
When application is using virtual memory, ctrl+c it will have
kernel panic caused by null pointer.
The reason is hardware struture already is freed when driver wants
to use it.
Loren Huang [Thu, 9 Jan 2014 09:41:50 +0000 (17:41 +0800)]
ENGR00286762 gpu: enable swap rectange and fix a bug
add eglSetSwapRectangleANDROID back and enable swap rectange,
fix a swap rectange bug which will swap whole screen instead
of the indicate swap region if region's left and top is (0,0).
Signed-off-by: Richard Liu <r66033@freescale.com> Acked-by: Shawn Guo
Xianzhong [Thu, 28 Nov 2013 14:37:16 +0000 (22:37 +0800)]
ENGR00289999 gpu: fixed gc880 invalid command state message
gpu kernel dump the error message when enable DEBUG mode:
gckCONTEXT_Update(1493): State 0x0518 is not mapped.
gckCONTEXT_Update(1493): State 0x0520 is not mapped.
gckCONTEXT_Update(1493): State 0x0518 is not mapped.
gckCONTEXT_Update(1493): State 0x0520 is not mapped.
align gpu kernel driver to fix the error message
Signed-off-by: Xianzhong <b07117@freescale.com> Acked-by: Jason Liu
Loren Huang [Thu, 9 Jan 2014 09:03:08 +0000 (17:03 +0800)]
ENGR00284988 gpu:Sync gpu kernel driver code
Sync the code with commit 255ee1de in gpu-viv git.
Mainly covered tickets:
ENGR00288588 fixed system reboot when run webGL test
ENGR00284988 Camera recording kernel crash on WFD source
ENGR00283494 Modify Status to status to avoid build error
ENGR00278179-1 query video memory with seperate types
Fancy Fang [Wed, 8 Jan 2014 02:32:52 +0000 (10:32 +0800)]
ENGR00294114 PXP: correct the PS U/V buffer settings when format is YVU420P
The PXP itself doesn't support YVU420P default. But we can get the
U and V address according to the format when we try to set PS_UBUF
and PS_VBUF registers. So the YVU420P can be supported indirectly.
Terry Lv [Tue, 16 Aug 2011 08:06:24 +0000 (16:06 +0800)]
ENGR00154889-2: Add virtual iim driver
Add virtual iim driver.
This driver will be used by MM team.
Signed-off-by: Terry Lv <r65388@freescale.com>
(cherry picked from commit 6637e480585112bb310fcbd7ccd1cbf1d67cf9ff) Signed-off-by: Robin Gong <b38343@freescale.com>
Peter Chen [Thu, 26 Dec 2013 08:16:44 +0000 (16:16 +0800)]
ENGR00291282-6 usb: phy-nop: add the implementation of .set_suspend
Add clock enable/disable at .set_suspend if the PHY has
suspend requirement, it can be benefit of power saving for
phy and the whole system (parent clock may also be disabled).
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Peter Chen [Tue, 10 Dec 2013 02:17:02 +0000 (10:17 +0800)]
ENGR00291282-3 ARM: imx6q-arm2-hsic: add usb hsic dts
Since hsic has pin conflict with ethernet, we disable ethernet
at this dts. Besides, please make sure the line of data and strobe
has unchanged between board boots up and hsic controller has
benn enabled.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Fancy Fang [Wed, 25 Dec 2013 10:04:56 +0000 (18:04 +0800)]
ENGR00293323 PXP: add WC and cacheable dma buffer support for PXP device
This change add support for new dma buffer type(writecombine and cacheable)
which allows user application has more choices for the buffer type. And if
the dma buffer is cacheable, then add flush interfaces to make it cache
coherent when necessary.
Fancy Fang [Wed, 25 Dec 2013 02:03:35 +0000 (10:03 +0800)]
ENGR00293292 PXP: enhance channel and buffer reclaim for PXP device
Enhance channel and buffer reclaim to make sure that all the
allocated resources which are not freed yet to be freed
when the device file descriptor release() function called.
Fancy Fang [Tue, 24 Dec 2013 08:05:53 +0000 (16:05 +0800)]
ENGR00293211 PXP: bind allocated DMA channels to opened device file descriptor
The allocated DMA channels via some opened file descriptor is better
to be bound to this descriptor. Since this can avoid some application
to fake a channel id which may be requested by other applications to
request PXP service. And also, this make it easier to release the dma
channel when application exists abnormally or forgets to release it
explicitly.
Robby Cai [Wed, 25 Dec 2013 07:46:37 +0000 (15:46 +0800)]
ENGR00293132-2 pxp/v4l2: restore smem_start for framebuffer even exit abnormally
Previously, the framebuffer for UI display may only be restored after
STREAMOFF ioctl is called. But sometimes the application may exit abnormally
(without call STREAMOFF) for some reason. Now restore previously-saved
smem_start in release function to make sure it's set correctly, to avoid some
video frame remain.
Robby Cai [Fri, 20 Dec 2013 10:20:47 +0000 (18:20 +0800)]
ENGR00293132-1 pxp/v4l2: change memory alloc policy for PxP output buffer
In previous implementation, the memory allocation/free for PxP output buffer is
done each time v4l2 output device is opened/closed. This is not necessary and
may cause memory fragmentation issue after running many many times. Now we
re-allocate the memory for it only if the existing memory size is not sufficent
for new case.
Fancy Fang [Tue, 24 Dec 2013 02:36:17 +0000 (10:36 +0800)]
ENGR00293170 PXP: remove cpu_addr field from struct pxp_mem_desc
The cpu_addr field in struct pxp_mem_desc cannot be used
by user application, so it is not necessary to pass this
field data to user. Now the similar field 'virtual' in
struct pxp_buf_obj is used to store the kernel space
virtual addr for allocated dma buffer.
Liu Ying [Tue, 24 Dec 2013 08:26:35 +0000 (16:26 +0800)]
ENGR00293235 IPUv3: Refine register access
The original IPUv3 driver uses readl()/writel() to
access the IPUv3 registers in the following way where
ipu->reg_base is a pointer which points to a 32 bit
I/O memory cell of a certain IPUv3 deblock's base address:
writel(value, ipu->reg_base + offset);
readl(ipu->reg_base + offset);
This makes the register offset values shrink 4 times,
comparing to the offset values documented in the
reference manual. For example, we need to change the
offset value from 0x003C to 0x003C/4 so that we may
access the register IPU_INT_CTRL_1 correctly.
This patch redefines the type of ipu->reg_base to
'void __iomem *', then the offset values can be the
same to what they are documented.
Also, this patch corrects some register relevant
macros by wrapping their arguments with parentheses
to avoid any unsafe decipher.
Reviewed-by: Robby Cai <R63905@freescale.com> Cc: Oliver Brown <oliver.brown@freescale.com> Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
Liu Ying [Tue, 24 Dec 2013 08:18:56 +0000 (16:18 +0800)]
ENGR00293231 IPUv3 reg: Remove some unused macros
This patch removes two unused macros IPU_INT_CTRL_IRQ(irq)
and IPU_INT_STAT_IRQ(irq) to save two lines of code. The
existing another two macros IPUIRQ_2_STATREG(irq) and
IPUIRQ_2_CTRLREG(irq) are the surrogates for them.
Reviewed-by: Robby Cai <R63905@freescale.com> Cc: Oliver Brown <oliver.brown@freescale.com> Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
Fancy Fang [Fri, 20 Dec 2013 10:14:21 +0000 (18:14 +0800)]
ENGR00293119 PXP: change the dma buffer lists management for PXP device
Create pxp_info struct data for each opened device file descriptor.
And bind all the allocated dma buffers to this struct for each opened
file. This makes the dma buffer lists management safer, more effective
and more flexible.
Fancy Fang [Thu, 19 Dec 2013 10:32:42 +0000 (18:32 +0800)]
ENGR00292816 PXP: move two struct definitions to pxp_device.h
Move two struct definitions defined in pxp_device.c to pxp_device.h.
Now the pxp_device.h has been created for PXP device driver. So all
the type definition should stay in header file not c source file.
Luwei Zhou [Mon, 23 Dec 2013 06:09:25 +0000 (14:09 +0800)]
ENGR00293101 hwmon: mma8451: add sys interface to set sensor scale mode.
mma8451 sensor driver on i.MX6Q/DL SabreSD/AUTO doesn't provide the
interface to set sensor scale. The new sys interface name is "scalemode".
The mode is defined as:
MODE_2G : 0, MODE_4G : 1, MODE_8G : 2
Oliver Brown [Thu, 19 Dec 2013 18:59:05 +0000 (12:59 -0600)]
ENGR00292585 IPUv3: Fix a horizontal line at the middle playing 1080i
Added additional check to handle stripe limits differently for upscaling
and downscaling. Upscaling requires relaxed checking because input stripe
may fall slighty outside of the input window. Downscaling requires strict
limit checking.
Signed-off-by: Oliver Brown <oliver.brown@freescale.com>
Fancy Fang [Wed, 18 Dec 2013 05:38:23 +0000 (13:38 +0800)]
ENGR00292562 PXP: move the definitions used only by PXP device to a new header file
Some definitions used only by PXP device driver should not stay in
pxp_dma.h which is shared by PXP, EPDC and V4L2. So the patch creates
a new header file pxp_device.h to hold these definitions.
Fancy Fang [Tue, 17 Dec 2013 08:58:26 +0000 (16:58 +0800)]
ENGR00292398 PXP: refine two spin locks usage in PXP dma driver
This patch provides the following refinements:
1. For pxp channel lock, use spin_lock() instead of spin_lock_irqsave().
Since this lock is not used in any ISR. Moreover, this can increase the
driver's concurrency with no local irq disabled.
2. Narrow down the pxp lock's locking range in pxp_issue_pending().
Since this lock is also used in PXP ISR, so its hold time should be as
few as possible to reduce the time when local irq disabled.
Peter Chen [Thu, 12 Dec 2013 06:33:02 +0000 (14:33 +0800)]
ENGR00291876 usb: phy-mxs: add delay before set phyctrl.clkgate
There is a request from IC engineer that if we doesn't
set phypwd as 0xffffffff, we need to delay about five
32Khz cycles before set phypwd, otherwise, the wakeup
signal may can't wake up controller.
Liu Ying [Wed, 18 Dec 2013 02:03:22 +0000 (10:03 +0800)]
ENGR00291103 IPUv3 common:Don't initialize PRP_VF for MEM_VDI_MEM
Since the channel MEM_VDI_MEM doesn't use the PRP_VF task, this
patch removes the code to initialize the PRP_VF task for the
channel MEM_VDI_MEM. This change may fix the issue caused by
the unnesessary PRP_VF task output resolution limitation check.
The issue can be reproduced by the following unit test case:
mxc_vpu_test.out -D "-f 2 -y 2 -v m -i
1080i_shields1088i2997_shields_ter_4x300_15fps_track1.h264"
Fancy Fang [Tue, 17 Dec 2013 07:30:58 +0000 (15:30 +0800)]
ENGR00292369 PXP: remove unnecessary head list empty check
The head list empty check in function pxpdma_dostart_work()
is meaningless, since this function only can be called when
there is some pxp task in the head list, that is to say head
list is not empty.
Fancy Fang [Mon, 16 Dec 2013 02:55:04 +0000 (10:55 +0800)]
ENGR00292121 PXP: remove __u32 definition in pxp_dma.h
Remove the __u32 macro definition in pxp_dma.h. But include
<linux/types.h> in pxp_dma.h to make sure user application
which include pxp_dma.h to be compiled with no error.
Fancy Fang [Wed, 11 Dec 2013 10:48:44 +0000 (18:48 +0800)]
ENGR00291731 PXP: move pxp_irq_info definition from PXP dma to PXP device
struct pxp_irq_info is only used by PXP device driver, so it is unreasonable
to define it in pxp_dma.h which will be included by EPDC, V4L2 PXP and PXP
device driver.
Fancy Fang [Wed, 11 Dec 2013 10:21:10 +0000 (18:21 +0800)]
ENGR00291729 PXP: remove a mutex lock from pxp channel
This mutex lock is no longer necessary in PXP dma driver. After
the commit "ENGR00291400 PXP: Organize PXP task queue to be FIFO",
protection fields can be protected by the spin lock in PXP channel
now.
Fancy Fang [Wed, 11 Dec 2013 06:22:35 +0000 (14:22 +0800)]
ENGR00291658 PXP: allow PXP device users to submit multiple tasks before start PXP
After the commit "ffcad666548417ef21937e0a755d85ab922313a9" pushed,
adding this support in PXP device driver is also necessary. This
change allows users to submit more than one PXP tasks followd by
only one wait for finished ioctl. It means that users can wait for
more than one tasks done by calling one PXP_IOC_WAIT4CMPLT ioctl.
Fancy Fang [Mon, 9 Dec 2013 10:36:39 +0000 (18:36 +0800)]
ENGR00291400 PXP: Organize PXP task queue to be FIFO
The requested PXP tasks were handled based on channel unit. All the
tasks in one channel were handled one by one, and the tasks in another
channel only can get chance after all the tasks in previous channel
were finished. So this may allow some channel occupies PXP hardware
exclusively all the time, and other channels may never get PXP services.
So this change makes the PXP task queue to be a FIFO to avoid this kind
of unfair usage for PXP.
Liu Ying [Tue, 10 Dec 2013 09:28:09 +0000 (17:28 +0800)]
ENGR00291111 mxc vout:Restore when new config fails
Users may call VIDIOC_S_CTRL and VIDIOC_S_CROP ioctrls
to change rotation and cropping settings when streaming.
The driver should restore the original settings if new
configuration fails, otherwise, it might break the
present pipeline.
This patch fixes the issue which can be reproduced by
this test case with a 1080P HDMI primary display:
gplay Mpeg4_SP1_480x260_24_1200_aac_48_128_2_terminator3.mp4
Type 't' to set rotation to 90.
Fancy Fang [Wed, 4 Dec 2013 07:32:20 +0000 (15:32 +0800)]
ENGR00290664 PXP: allocate DMA TX descriptors on demand instead of in PXP initialization
In previous PXP driver, the number of tx descriptors allocated
for each channel is a constant 16 and they can only be allocated
during PXP initialization. But since the driver allows users to
queue more than one PXP tasks for each channel before issuing
pending tasks, so in this case the descriptors may be not enough
for some cases.
Fancy Fang [Wed, 4 Dec 2013 02:13:26 +0000 (10:13 +0800)]
ENGR00290613 PXP: add asynchronous multi instances support for PXP
Move PXP registers setting from pxp_issue_pending() to a seperate
kernel thread. This change will avoid the multi instances hang issues
solved in previous commits. And also the pxp users won't be blocked
when it call dma_async_issue_pending() function.
The downsizing ratio overflow check should cover every stripe
in the split mode. We need to do the overflow check correctly
by taking the width/height 8-pixel alignment requirement into
consideration since the alignment would be done when every
stripe is checked in it's own ipu task.
This patch takes a workaround for the issue which can be
reproduced by this unit test case:
Liu Ying [Wed, 4 Dec 2013 03:48:27 +0000 (11:48 +0800)]
ENGR00290635-2 IPUv3 stripe:Fix a build warning
This patch fixes the following build warning by
initializing some local variables:
drivers/mxc/ipu3/ipu_calc_stripes_sizes.c: In function ‘ipu_calc_stripes_sizes’:
drivers/mxc/ipu3/ipu_calc_stripes_sizes.c:393:3: warning: ‘difwr’ may be used uninitialized in this function [-Wuninitialized]
drivers/mxc/ipu3/ipu_calc_stripes_sizes.c:393:3: warning: ‘onw’ may be used uninitialized in this function [-Wuninitialized]
drivers/mxc/ipu3/ipu_calc_stripes_sizes.c:393:3: warning: ‘inw’ may be used uninitialized in this function [-Wuninitialized]
Liu Ying [Wed, 4 Dec 2013 03:26:12 +0000 (11:26 +0800)]
ENGR00290635-1 mxc vout:Fix a build warning
This patch fixes the following build warning by allocating
a block of virtual memory to cache an instance of the structure
mxc_vout_output instead of using the stack frame.
drivers/media/platform/mxc/output/mxc_vout.c: In function ‘mxc_vidioc_s_crop’:
drivers/media/platform/mxc/output/mxc_vout.c:1529:1: warning: the frame size of 1040 bytes is larger than 1024 bytes [-Wframe-larger-than=]
Liu Ying [Thu, 21 Nov 2013 08:39:08 +0000 (16:39 +0800)]
ENGR00290361-1 IPUv3 IC:Add check for a IDMAC errata
The IPUv3 IDMAC has a bug to read 32bpp pixels from a
graphics plane whose alpha component is at the most
significant 8 bits. The bug only impacts on cases in which
the relevant separate alpha channel is enabled.
This patch adds check for the errata so that the bad
cases won't be triggered.
Sandor Yu [Mon, 2 Dec 2013 07:40:46 +0000 (15:40 +0800)]
ENGR00290337 ipuv3: Setup pixel clock tree after ipu reset
When the ipu pixel clocks are initialized, the default pixel clock rate
will be calucated according to the present ipu register setting which
is likely set by a bootloader.
But these registers will be reset by the ipu reset function.
If the default pixel clock rate is the same to what is requested later,
the clk_set_rate function will treat this case as pixel clock unchanged.
Move the pixel clock setup function after the ipu reset function to
resolve this issue
Peter Chen [Tue, 26 Nov 2013 05:33:21 +0000 (13:33 +0800)]
ENGR00289645 usb: chipidea: udc: don't do hardware access if gadget has stopped
After _gadget_stop_activity is executed, we can consider the hardware
operation for gadget has finished, and the udc can be stopped and enter
low power mode. So, any later hardware operations (from usb_ep_ops APIs
or usb_gadget_ops APIs) should be considered invalid, any deinitializatons
has been covered at _gadget_stop_activity.
I meet this problem when I plug out usb cable from PC (using g_mass_storage),
my callstack like: vbus interrupt->.vbus_session->composite_disconnect
->pm_runtime_put_sync(&_gadget->dev), the composite_disconnect will
call fsg_disable, but fsg_disable calls usb_ep_disable using async way,
there are register accesses for usb_ep_disable. So sometimes, I get system
hang due to visit register without clock, sometimes not.
The Linux Kernel USB maintainer Alan Stern suggests this kinds of solution.
See: http://marc.info/?l=linux-usb&m=138541769810983&w=2.
Fancy Fang [Wed, 27 Nov 2013 08:41:38 +0000 (16:41 +0800)]
ENGR00289859 PXP: fix that multi users may access PXP hardware simultaneously
After the patch 6320ada11093ef0a4ded9065d6ae284a9129f7d6, there still exists
some cases that more than one user would set PXP hardware registers before the
previous task done. Now use another mutex lock to make sure that registers
settings can only happen when PXP hardware is idle.
Robby Cai [Tue, 26 Nov 2013 07:20:28 +0000 (15:20 +0800)]
ENGR00289648 mx6sl: v4l2 output: Add UYVY format as input format for v4l2
This feature is easy for gstreamer to pipeline v4lsrc and v4lsink, since
camera output format can be set as UYVY in v4l2 capture driver, and PxP
will do the CSC from UYVY to RGB565 in v4l2 output driver for LCD display.
Liu Ying [Mon, 25 Nov 2013 10:34:40 +0000 (18:34 +0800)]
ENGR00289553 IPU dev:correct downsize overflow check in rot case
In rotation cases, the width and height of IPUv3 IC scaling block's
output should align with the width and height of IPUv3 IC rotation
block. And, users only tell the IPUv3 device driver about the parameters
of scaling block's input and rotation block's output. So, we need to
swap the width and height of rotation block in cache before we do
downsize(a functionality of the scaling block) overflow check.
This patch fixes the issue which can be reproduced by this unit test case:
/unit_tests/mxc_v4l2_output.out -iw 128 -ih 128 -ow 176 -oh 10 -r 90
Oliver Brown [Fri, 22 Nov 2013 16:30:15 +0000 (10:30 -0600)]
ENGR00289436 - [V4L2 Capture] Build warning on mxc_v4l2_capture.c
Need to remove the following warning:
warning: array subscript is above array bounds
Summary of changes:
Moved MXC_SENSOR_NUM definition to mxc_v4l2_capture.h.
all_sensors[] now uses MXC_SENSOR_NUM in definition.
MXC_SENSOR_NUM is now used for bounds checking the array.
Signed-off-by: Oliver Brown <oliver.brown@freescale.com>
Oliver Brown [Mon, 18 Nov 2013 20:52:27 +0000 (14:52 -0600)]
ENGR00274166 - Split mode has artifacts
- Need to use different multiple and index parameters for vertical
and horizontal stripes
- Use correct multiple and index based upon pixel format
- Allow input crop and size to be larger than width by upto 16 pixels
Signed-off-by: Oliver Brown <oliver.brown@freescale.com>
Oliver Brown [Tue, 19 Nov 2013 15:49:53 +0000 (09:49 -0600)]
ENGR00272541 IPUv3 IC: Split Downsizing overflow for size greater than 1024
For downscaling, it is possible that downscaler output is greater
than 1024. Added a function, calc_split_resize_coeffs, based upon
_calc_resize_coeffs to calculate resizing and downscaling coefficients.
In ipu_ic.c, checks for the range of *_resize_ratio are no longer needed.
Non split cases will always have *_resize_ratio of zero.
In ipu_device, additional checks are needed to check for an error from
ipu_calc_stripes_sizes if calc_split_resize_coeffs fails.
Signed-off-by: Oliver Brown <oliver.brown@freescale.com>
The max timeout counter for uSDHC is SDCLK x (1 << 28), not as standard
controller defined as TMCLK x (1 <<27).
Add SDHCI_QUIRK2_NOSTD_TIMEOUT_COUNTER quirk to handle it.
ENGR00258885 flexcan: fix errata ERR005829 that MB may fail to be sent
This is an issue from IC errata ERR005829 which is described as follows:
----------------------------------------------------------
FlexCAN does not transmit a message that is enabled to be transmitted
in a specific moment during the arbitration process. The following
conditions are necessary to have the issue.
- Only one MB is configured to be transmitted
- The write which enables the MB to be transmitted (write on Control status
word) happens during a specific clock during the arbitration process.
After this arbitration process occurs, the bus goes to Idle state and no
new message is received on bus.
For example:
1) MB13 is deactivated on RxIntermission (write 0x0 on CODE field from Control
Status word) - First write on CODE
2) Reconfigure the ID and data fields
3) Enable the MB13 to be transmitted on BusIdle (write 0xC on Code
field) - Second write on code
4) CAN bus keeps in Idle state
5) No write on Control status from any MB happens.
During the second write on code (step 3), the write must happen one clock
before the current MB13 is to be scanned by arbitration process.
In this case, it does not detect the new code (0xC) and no new arbitration is
scheduled.
The suggested workaround which is implemented in this patch is:
The workaround consists of executing two extra steps:
6. Reserve the first valid mailbox as an inactive mailbox (CODE=0b1000).
If RX FIFO is disabled, this mailbox must be MB0. Otherwise, the first
valid mailbox can be found by using table "RX FIFO filters" on FlexCAN3 chapter.
7. Write twice INACTIVE code (0b1000) into the first valid mailbox.
Note: The first mailbox cannot be used for reception or transmission process.
-------------------------------------------------------------
Note: Although the currently flexcan driver does not have the step 1 to run,
it's also possible to meet this issue in theory because we can not predict
when the arbitration is scheduled.
With a modified can-utils/canfdttest tool simulating Pingpong test, we were
able to reproduce this issue after running a about one day.
After applying this patch, we ran six days and did not see the issue happen
again on two mx6q sabrelite boards.
Note: with a few minors change for new kernel and change errata id from
ERR005641 to ERR005829 which is the open one in freescale website.
Fancy Fang [Thu, 21 Nov 2013 11:44:45 +0000 (19:44 +0800)]
ENGR00289237 PXP: fix a multiple instances hang issue
In pxp_issue_pending(), the wait for pxp done processes will be woken up
together in PXP ISR. So there will be some situations that one process will
set PXP hardware registers after another process's setting but before the
first PXP task done. So the PXP hardware may be corrupted and hang maybe
happen.
Peter Chen [Thu, 21 Nov 2013 08:45:18 +0000 (16:45 +0800)]
ENGR00288578-8 usb: phy-mxs: do not set PWD.RXPWD1PT1 for low speed connection
At very rare cases, the SoF will not send out after resume with
low speed connection. The workaround is do not power down
PWD.RXPWD1PT1 bit during the suspend.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Peter Chen [Tue, 19 Nov 2013 02:38:55 +0000 (10:38 +0800)]
ENGR00288522 power: imx6-usb-charger: fix build error when build as module
It is a library, so it can't be built as a module, besides,
it uses anatop register, it should depends on imx6 soc series.
Below is the build error message it fixes:
CC [M] drivers/power/imx6_usb_charger.o
/home/b29397/work/projects/linux-2.6-imx/drivers/power/imx6_usb_charger.c:173:5: error: redefinition of 'imx6_usb_vbus_connect'
/home/b29397/work/projects/linux-2.6-imx/include/linux/power/imx6_usb_charger.h:70:5: note: previous definition of 'imx6_usb_vbus_connect' was here
/home/b29397/work/projects/linux-2.6-imx/drivers/power/imx6_usb_charger.c:200:5: error: redefinition of 'imx6_usb_charger_detect_post'
/home/b29397/work/projects/linux-2.6-imx/include/linux/power/imx6_usb_charger.h:74:5: note: previous definition of 'imx6_usb_charger_detect_post' was here
/home/b29397/work/projects/linux-2.6-imx/drivers/power/imx6_usb_charger.c:235:5: error: redefinition of 'imx6_usb_vbus_disconnect'
/home/b29397/work/projects/linux-2.6-imx/include/linux/power/imx6_usb_charger.h:65:5: note: previous definition of 'imx6_usb_vbus_disconnect' was here
/home/b29397/work/projects/linux-2.6-imx/drivers/power/imx6_usb_charger.c:256:5: error: redefinition of 'imx6_usb_create_charger'
/home/b29397/work/projects/linux-2.6-imx/include/linux/power/imx6_usb_charger.h:59:5: note: previous definition of 'imx6_usb_create_charger' was here
/home/b29397/work/projects/linux-2.6-imx/drivers/power/imx6_usb_charger.c:290:6: error: redefinition of 'imx6_usb_remove_charger'
/home/b29397/work/projects/linux-2.6-imx/include/linux/power/imx6_usb_charger.h:54:6: note: previous definition of 'imx6_usb_remove_charger' was here
make[3]: *** [drivers/power/imx6_usb_charger.o] Error 1
make[2]: *** [drivers/power] Error 2
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Fugang Duan [Thu, 21 Nov 2013 04:58:01 +0000 (12:58 +0800)]
ENGR00277698 net:fec: avoid kernel dump for skb page allocation fail
Fast reproduce steps:
1. set kernel parameter mem=500M, after kernel up, run below steps.
1. mount 10.192.225.224:/nfsroot /media/Videos/224nfsroot -t nfs
-o rw,nolock,addr=10.192.225.224
2. cd /media/Videos/224nfsroot/gst-sanity-test
3. ./linux_recording_sanity_test.sh recording_playback_cmd.txt
kernel dump:
--------------------------------------------------------------
Swap cache stats: add 0, delete 0, find 0/0
Free swap = 0kB
Total swap = 0kB
kswapd0: page allocation failure: order:0, mode:0x20
CPU: 0 PID: 54 Comm: kswapd0 Tainted: G W 3.10.17-16884-gc530ac0 #239
[<80013c4c>] (unwind_backtrace+0x0/0xf8) from [<80011704>] (show_stack+0x10/0x14)
[<80011704>] (show_stack+0x10/0x14) from [<8008bb7c>] (warn_alloc_failed+0xd0/0x114)
[<8008bb7c>] (warn_alloc_failed+0xd0/0x114) from [<8008e860>] (__alloc_pages_nodemask+0x5e0/0x8b8)
[<8008e860>] (__alloc_pages_nodemask+0x5e0/0x8b8) from [<804cceb8>] (__netdev_alloc_frag+0x9c/0x138)
[<804cceb8>] (__netdev_alloc_frag+0x9c/0x138) from [<804cddc4>] (__netdev_alloc_skb+0x40/0xe0)
[<804cddc4>] (__netdev_alloc_skb+0x40/0xe0) from [<8037dc8c>] (fec_enet_rx_napi+0x268/0x7e0)
[<8037dc8c>] (fec_enet_rx_napi+0x268/0x7e0) from [<804d7cf8>] (net_rx_action+0x94/0x160)
[<804d7cf8>] (net_rx_action+0x94/0x160) from [<8002c8fc>] (__do_softirq+0xe8/0x1d0)
[<8002c8fc>] (__do_softirq+0xe8/0x1d0) from [<8002ca8c>] (do_softirq+0x4c/0x58)
[<8002ca8c>] (do_softirq+0x4c/0x58) from [<8002ccf4>] (irq_exit+0x90/0xc8)
[<8002ccf4>] (irq_exit+0x90/0xc8) from [<8000ea88>] (handle_IRQ+0x3c/0x94)
[<8000ea88>] (handle_IRQ+0x3c/0x94) from [<8000855c>] (gic_handle_irq+0x28/0x5c)
[<8000855c>] (gic_handle_irq+0x28/0x5c) from [<8000de00>] (__irq_svc+0x40/0x50)
Exception stack(0xac21be08 to 0xac21be50)
be00: 80ca16f0000000000000bf280000bf2880ca16c8ac449c00
be20: 000006a4000000000000000000000000000003a40000000000000000ac21be50
be40: 800bf9e4805fc0d4600f0013ffffffff
[<8000de00>] (__irq_svc+0x40/0x50) from [<805fc0d4>] (_raw_spin_lock+0x38/0x3c)
[<805fc0d4>] (_raw_spin_lock+0x38/0x3c) from [<800bf9e4>] (put_super+0x18/0x3c)
[<800bf9e4>] (put_super+0x18/0x3c) from [<800c0968>] (prune_super+0x13c/0x17c)
[<800c0968>] (prune_super+0x13c/0x17c) from [<80093ff8>] (shrink_slab+0x88/0x218)
[<80093ff8>] (shrink_slab+0x88/0x218) from [<8009637c>] (kswapd+0x510/0x80c)
[<8009637c>] (kswapd+0x510/0x80c) from [<80042d64>] (kthread+0xa4/0xb0)
[<80042d64>] (kthread+0xa4/0xb0) from [<8000e258>] (ret_from_fork+0x14/0x3c)
--------------------------------------------------------------
Firstly, alloc_page() try to allocate page from pcp high speed cached page or
free_list by calling get_page_from_freelist(). If failed, and then use low
speed allocation mechanism by calling __alloc_pages_slowpath(), which may
allocate from reclaimed pages and kernel dump the memory allocate info.
Still don't find the root cause, this patch avoid the kernel dump
in temporarily.
Fancy Fang [Wed, 20 Nov 2013 02:25:45 +0000 (10:25 +0800)]
ENGR00285283 PXP: make pxp driver compatible for G2D
Use stride to set AS and PS pitch by default, if stride is 0, then use
width to set AS and PS pitch instead. This will make PXP driver both
work for PXP kernel users and G2D applications.
Fancy Fang [Mon, 21 Oct 2013 05:51:21 +0000 (13:51 +0800)]
ENGR00284411-1 PXP: Enhance YUV, alpha blend and rotation
Support YUV formats like: I420, NV12, NV21, UYVY,
YUYV, VYUY, YVYU, NV16, NV61 and YV12.
Support rotation in both stages before and after alpha blending.
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