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9 years agoENGR00332994: ARM: dts: imx6sl: fix gpu power up failed
Robin Gong [Wed, 24 Sep 2014 09:31:53 +0000 (17:31 +0800)]
ENGR00332994: ARM: dts: imx6sl: fix gpu power up failed

In ldo-bypass mode, antop regulator will bypass vddarm and vddsoc
if found these two have been bypassed,and keep internal vddsoc as 0.
That caused vddpu always set 0 because it tracked with vddsoc while enable.
Add 'regulator-allow-bypass' to set anatop_reg->bypass 1 to avoid this
case.

Signed-off-by: Robin Gong <b38343@freescale.com>
9 years agoENGR00279946 dts: imx6qdl-sabreauto: add baseboard sd card slot support
Haibo Chen [Fri, 26 Sep 2014 01:11:41 +0000 (09:11 +0800)]
ENGR00279946 dts: imx6qdl-sabreauto: add baseboard sd card slot support

NOTE since SD Card in main board takes a long route hence with
Drive Speed High 80 OHMS causing error on high speed cards.
Per suggestion DSE 40 OHMS is used.

And the SD1 on sabreauto baseboard is conflict with gpmi nand.
The conflict pins are DAT4~DAT7. Since the SD3 on cpu board
already supports 8 bit bus width, we do not want add an extra
dts file for it, so we disable 8 bit and use 4 bit width for
this issue.

[haibo chen:
    cherry-pick commit e38226f4cbf222ce9377963e20fe5f1d7103a2af
cherry-pick commit 3807ed7ac39ec402f19bb27d2d60ceb3ce5448b2
from imx_3.10.y]
Signed-off-by: Haibo Chen <haibo.chen@freescale.com>
9 years agoENGR00333304 dts: imx6sx: add usdhc into mege_fast wakeup source
Dong Aisheng [Tue, 24 Jun 2014 07:27:35 +0000 (15:27 +0800)]
ENGR00333304 dts: imx6sx: add usdhc into mege_fast wakeup source

The usdhc could also be wakeup source, thus add it into the mege_fast
wakeup source list.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
(cherry picked from commit 66223a235ae1d440f382a99ed71e1392d0f09f8b)

9 years agoENGR00333303 dts: imx6sx-sdb-emmc: add emmc support on uSDHC4
Dong Aisheng [Wed, 16 Apr 2014 08:37:36 +0000 (16:37 +0800)]
ENGR00333303 dts: imx6sx-sdb-emmc: add emmc support on uSDHC4

The eMMC interface is shared with uSDHC4 BOOT card slot and the eMMC chip is
DNP by default. User needs burn the eMMC chip onto the board manually and
do hw rework to enable eMMC signals.
We create a new dts imx6sx-sdb-emmc.dts for easy eMMC test after doing hw rework.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
(cherry picked from commit 4b07536a25db281619ce249a46a71e0bb8a08a6b)

9 years agoENGR00333302 dts: imx6: enable sdio wakeup for corresponding boards
Dong Aisheng [Mon, 13 Jan 2014 09:00:46 +0000 (17:00 +0800)]
ENGR00333302 dts: imx6: enable sdio wakeup for corresponding boards

Enable the sdio wakeup capability for SDIO cards.
Note: we do not enable it for sabresd usdhc4 since it has a solid
eMMC card on it.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
(cherry picked from commit 9ea7e84fe686a5c959aebbbf4a1b81dcb1c3e3fd)

9 years agoENGR00332319 lcdif: imx6sl: disable the pixel rate before call clk_set_rate
Robby Cai [Fri, 19 Sep 2014 10:38:08 +0000 (18:38 +0800)]
ENGR00332319 lcdif: imx6sl: disable the pixel rate before call clk_set_rate

After the following commit is pushed, the lcdif framebuffer driver need
the adjustment.
93a9e3d0b88203cb523dd92e85590683d6a85fdf ENGR00318063-6:
ARM: imx6: add CLK_SET_RATE_GATE flag for PLL clocks

CLK_SET_RATE_GATE flag means "must be gated across rate change".

PLL5 video is the parent clock of the pixel clock, and only used by it.
This patch gates the clock before call clk_set_rate() to meet the requirement.

Signed-off-by: Robby Cai <r63905@freescale.com>
9 years agoENGR00333251 dts: imx6dl: epdc: fix dtb build error
Robby Cai [Thu, 25 Sep 2014 12:39:36 +0000 (20:39 +0800)]
ENGR00333251 dts: imx6dl: epdc: fix dtb build error

ERROR (phandle_references): Reference to non-existent node or label "reg_sensor"

ERROR: Input tree has errors, aborting (use -f to force output)
make[1]: *** [arch/arm/boot/dts/imx6dl-cubox-i.dtb] Error 2
make[1]: *** Waiting for unfinished jobs....
  DTC     arch/arm/boot/dts/imx6dl-sabresd-enetirq.dtb
...

The label "reg_sensor" is defined in imx6qdl-sabresd.dts, not in
imx6dl.dtsi. The patch moves the epdc parts to imx6dl-sabresd.dts,
which also sounds better since EPDC module is available not on i.mx6q
but i.mx6dl.

Signed-off-by: Robby Cai <r63905@freescale.com>
9 years agoENGR00333114 ARM: IMX6DL: EPDC: enable epdc module for imx6dl platform
Fancy Fang [Thu, 25 Sep 2014 05:17:19 +0000 (13:17 +0800)]
ENGR00333114 ARM: IMX6DL: EPDC: enable epdc module for imx6dl platform

Complete dts entry for epdc module to enable it
on imx6dl platform.

Signed-off-by: Fancy Fang <chen.fang@freescale.com>
9 years agoENGR00333136 dts: imx6: enable keep power capability for corresponding boards
Dong Aisheng [Mon, 13 Jan 2014 08:20:55 +0000 (16:20 +0800)]
ENGR00333136 dts: imx6: enable keep power capability for corresponding boards

All i.MX6 SabreAuto/SabreSD/EVK has the ability to keep card power
during suspend. So add this capability for them.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
(cherry picked from commit 3f18df4746eb33e934c55de23d6496bb4adad33b)

9 years agoENGR00333129 dts: imx6qdl-sabreauto: use external vmmc for sd3 optionally
Dong Aisheng [Fri, 10 Jan 2014 13:31:21 +0000 (21:31 +0800)]
ENGR00333129 dts: imx6qdl-sabreauto: use external vmmc for sd3 optionally

SD3.0 cards require power cycle the card during suspend/resume,
or the card re-enumeration after resume will fail to be identified
as UHS card since the card is already working on 1.8v mode and refuse
to ack the S18R request, thus, it will then work on normal high speed
mode instead.

We have to use external vmmc regulator to power cycle the card during
suspend/resume to reset card signal voltage to 3.3v frist for the later
1.8v voltage switch.

However, due to the sabreauto board limitation, we can not use external
regulator to powere off card by default since the card power is shared
with card detect pullup. Disabling the vmmc regulator will also shutdown
the cd pullup which causes incorrect illusion of card exist.
(e.g. plug out the card, mmc core wll think the card is exist since cd pin
is low but it never can find the card)
HW rework removing R695 and enable PAD internal pullup is needed to
fix this isssue.

User can manually open the mask of vmmc in dts to enable using external
regulator if your board has done the rework as said above.
Or by default we still do not power off card during suspend.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
(cherry picked from commit 2fd1bf9320bce1c22f2406c74277b7422653511e)

9 years agoENGR00333079 ARM: IMX6DL: PXP: enable pxp module for imx6dl platform
Fancy Fang [Thu, 25 Sep 2014 02:33:53 +0000 (10:33 +0800)]
ENGR00333079 ARM: IMX6DL: PXP: enable pxp module for imx6dl platform

Complete the dts entry for PXP to enable it on
imx6dl platform by default.

Signed-off-by: Fancy Fang <chen.fang@freescale.com>
9 years agoENGR00333049 ARM: dts: add dts file for ecspi on imx6q sabreauto
Allen Xu [Wed, 24 Sep 2014 20:01:57 +0000 (15:01 -0500)]
ENGR00333049 ARM: dts: add dts file for ecspi on imx6q sabreauto

add new dts file to support ecspi on imx6q sabreauto board.

Signed-off-by: Allen Xu <b45815@freescale.com>
9 years agoENGR00333048 ARM: dts: add new dts for gpmi and weim on imx6q sabreauto
Allen Xu [Wed, 24 Sep 2014 20:00:18 +0000 (15:00 -0500)]
ENGR00333048 ARM: dts: add new dts for gpmi and weim on imx6q sabreauto

new dts file to support gpmi/weim on imx6q sabreauto board.

Signed-off-by: Allen Xu <b45815@freescale.com>
9 years agoENGR00333047 ARM: dts: add new dts for ecspi on imx6dl sabreauto
Allen Xu [Wed, 24 Sep 2014 19:57:27 +0000 (14:57 -0500)]
ENGR00333047 ARM: dts: add new dts for ecspi on imx6dl sabreauto

new dts file to support ecspi on imx6dl sabreauto board.

Signed-off-by: Allen Xu <b45815@freescale.com>
9 years agoENGR00333046 ARM: dts: add new dts for gpmi and weim on imx6dl sabreauto
Allen Xu [Wed, 24 Sep 2014 19:54:11 +0000 (14:54 -0500)]
ENGR00333046 ARM: dts: add new dts for gpmi and weim on imx6dl sabreauto

dts file to support gpmi/weim on imx6dl sabreauto board.

Signed-off-by: Allen Xu <b45815@freescale.com>
9 years agoENGR00332198 ARM: dts: add new dts imx6sx-17x17-arm2-ecspi.dts
Allen Xu [Thu, 18 Sep 2014 20:59:33 +0000 (15:59 -0500)]
ENGR00332198 ARM: dts: add new dts imx6sx-17x17-arm2-ecspi.dts

Add a new dts file for ecspi test on imx6sx 17x17 arm2 board.

Signed-off-by: Allen Xu <b45815@freescale.com>
9 years agoENGR00332937-2 ARM: dts: imx6qdl-sabresd: add no-1-8-v property for usdhc
Haibo Chen [Wed, 24 Sep 2014 05:01:40 +0000 (13:01 +0800)]
ENGR00332937-2 ARM: dts: imx6qdl-sabresd: add no-1-8-v property for usdhc

The sabresd board does not have external 1.8v/3.3v signal voltage
switch support for usdhc.

Signed-off-by: Haibo Chen <haibo.chen@freescale.com>
9 years agoENGR00332931 ARM: dts: imx6qdl-sabresd: add usdhc4 support
Haibo Chen [Wed, 24 Sep 2014 04:35:42 +0000 (12:35 +0800)]
ENGR00332931 ARM: dts: imx6qdl-sabresd: add usdhc4 support

Add usdhc4 in dts for i.MX6q-sabresd and i.MX6dl-sabresd boards.

Signed-off-by: Haibo Chen <haibo.chen@freescale.com>
9 years agoENGR00319936-1 mmc: sdhci-esdhc-imx: do not enable wakeup by default
Dong Aisheng [Tue, 24 Jun 2014 09:25:03 +0000 (17:25 +0800)]
ENGR00319936-1 mmc: sdhci-esdhc-imx: do not enable wakeup by default

After adding mega fast support, the default enabled usdhc wakeup will block
M/F to gate off power domain.
To avoid this issue, we only claim wakeup capability and reply on user to enable
it via sysfs according to real needs.
The drawback of such change is that for SDIO WiFi Wakeup On Wireless feature,
User has to enable both uSDHC and WiFi WoW wakeup mannually to make
WoW work well.

BTW, due to the wakeup feature is controller itself, so we do not need to reply
on WiFi PM flags to enable it.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
(cherry picked from commit 58f91ff6f6719fef44f5122ae1d8a5df7e0061d5)

9 years agoENGR00332937-1 mmc: sdhci-esdhc-imx: add imx6sx support
Dong Aisheng [Thu, 6 Mar 2014 08:04:19 +0000 (16:04 +0800)]
ENGR00332937-1 mmc: sdhci-esdhc-imx: add imx6sx support

The imx6sx usdhc is derived from imx6sl, the difference is minor.
imx6sx have the errata ESDHC_FLAG_ERR004536 fixed.
So introduce a new compatible string for imx6sx to distinguish them.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
(cherry picked from commit 775f880758c59297dba3c54dd2499f5d165daaa9)

9 years agoENGR00295564 mmc: sdhci-esdhc-imx: no need busfreq for imx6qdl
Dong Aisheng [Fri, 17 Jan 2014 02:23:22 +0000 (10:23 +0800)]
ENGR00295564 mmc: sdhci-esdhc-imx: no need busfreq for imx6qdl

The usdhc of i.MX6Q/DL can work well under low power mode without
request high bus freq. So we do not need request bus freq for i.MX6Q/DL.
It can save power for i.MX6D/DL due to it saves a lot busfreq switch
cost as well as the CPU time runing on high bus freq after switch
during low power mode.

A new flag ESDHC_FLAG_BUSFREQ is added to indicated this requirement.
Currently only i.MX6SL is using it.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
(cherry picked from commit 3b954ce55b56dfce195d65b84913ff3c0fcb9f82)

9 years agoENGR00295184-7 mmc: sdhci: do not enable card cd wakeup for gpio case
Dong Aisheng [Mon, 13 Jan 2014 10:27:58 +0000 (18:27 +0800)]
ENGR00295184-7 mmc: sdhci: do not enable card cd wakeup for gpio case

Do not need to enable the controller card cd interrupt wakeup
if using GPIO as card detect since it's meaningless.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
(cherry picked from commit e66bb4978fe4b4fb96e81a1a083c16f84f5aa710)

9 years agoENGR00295184-5 mmc: sdhci-esdhc-imx: add wakeup feature for sdio irq
Dong Aisheng [Mon, 13 Jan 2014 08:47:31 +0000 (16:47 +0800)]
ENGR00295184-5 mmc: sdhci-esdhc-imx: add wakeup feature for sdio irq

Enable wakeup for SDIO IRQ when the host is able to keep power
during suspend.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
(cherry picked from commit 19a1ec6ca25b2fc639fc75a25dd8a1fd452f8578)

9 years agoENGR00295184-3 mmc: sdhci-esdhc-imx: add keep power feature during suspend
Dong Aisheng [Mon, 13 Jan 2014 08:26:19 +0000 (16:26 +0800)]
ENGR00295184-3 mmc: sdhci-esdhc-imx: add keep power feature during suspend

IMX boards can keep power for cards during suspend.
User can enable it from device tree.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
(cherry picked from commit c493df82295e0384f81c21cf126412280d81411d)

9 years agoENGR00295184-1 mmc: sdhci: do not enable card detect interrupt for gpio cd type
Dong Aisheng [Tue, 31 Dec 2013 08:22:44 +0000 (16:22 +0800)]
ENGR00295184-1 mmc: sdhci: do not enable card detect interrupt for gpio cd type

Except SDHCI_QUIRK_BROKEN_CARD_DETECTION and MMC_CAP_NONREMOVABLE,
we also do not need to handle controller native card detect interrupt
for gpio as card detect case.
If we wrong enabled the card detect interrupt for gpio case,
it will cause a lot of unexpected card detect interrupts during data transfer
which should not happen.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
(cherry picked from commit 2bf47f78bee173798e6d6f360b12defd945c936c)

9 years agoENGR00292140 mmc: sdhci: fix possible sleep in atomic in sdio_irq enable function
Dong Aisheng [Mon, 16 Dec 2013 06:42:14 +0000 (14:42 +0800)]
ENGR00292140 mmc: sdhci: fix possible sleep in atomic in sdio_irq enable function

The sdhci_runtime_pm_get API is able to sleep, so should not call it in
sdhci_enable_sdio_irq_nolock which is executed with spin_lock_irqsave in
sdhci_enable_sdio_irq.
Move it out of spin lock to fix this issue.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
(cherry picked from commit 2aa0640de623c8f4ef908210da30aeece30dbd91)

9 years agoENGR00289406-2 mmc: sdhci-esdhc-imx: add SDHCI_QUIRK2_NOSTD_TIMEOUT_COUNTER
Dong Aisheng [Fri, 22 Nov 2013 12:39:15 +0000 (20:39 +0800)]
ENGR00289406-2 mmc: sdhci-esdhc-imx: add SDHCI_QUIRK2_NOSTD_TIMEOUT_COUNTER

The max timeout counter for uSDHC is SDCLK x (1 << 28), not as standard
controller defined as TMCLK x (1 <<27).
Add SDHCI_QUIRK2_NOSTD_TIMEOUT_COUNTER quirk to handle it.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
(cherry picked from commit 93d508770f5e6c12febff13b8d6fad9b0d9c6a12)

9 years agoENGR00289406-1 mmc: sdhci: add quirk for get max timeout counter
Dong Aisheng [Fri, 22 Nov 2013 12:34:38 +0000 (20:34 +0800)]
ENGR00289406-1 mmc: sdhci: add quirk for get max timeout counter

The max timeout counter of some SoCs like i.MX6 uSDHC may not be standard,
add SDHCI_QUIRK2_NOSTD_TIMEOUT_COUNTER quirk to get the correct max timeout
counter from platform specific code.
Then we can calculate the correct max_discard_to value.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
(cherry picked from commit 0469c7c4c683547f7923fb54882f681ad6d23ca8)

9 years agoENGR00289279 mmc: sdhci: get runtime pm when sdio irq is enabled
Dong Aisheng [Fri, 15 Nov 2013 09:54:36 +0000 (17:54 +0800)]
ENGR00289279 mmc: sdhci: get runtime pm when sdio irq is enabled

SDIO cards may need clock to send the card interrupt to host.
Thus, we get runtime pm when sdio irq is enabled to prevent the clock
resource is released and put it when sdio irq is disabled.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
(cherry picked from commit 3e8a2074a9bf37e9267f78e409898afd4b0d837a)

9 years agoENGR00288842 mmc: sdhci-esdhc-imx: add ADMA Length Mismatch errata fix
Dong Aisheng [Tue, 19 Nov 2013 10:10:27 +0000 (18:10 +0800)]
ENGR00288842 mmc: sdhci-esdhc-imx: add ADMA Length Mismatch errata fix

The uSDHC has an ADMA Length Mismatch errata ERR004536 which may cause ADMA
work abnormally. The errata has already been fixed for i.MX6Q TO1.2
and i.MX6DL TO1.1 by enable the bit 7 in 0x6c register.
Unfortunately this fix is not included in i.MX6SL.
So we disable ADMA for i.MX6SL and use SDMA instead.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
(cherry picked from commit 885c943ca13d2975651a1d0732dc8866457c85e9)

9 years agoENGR00287331-2 sdhci-esdhc-imx: use bus freq in runtime pm
Dong Aisheng [Mon, 11 Nov 2013 06:53:58 +0000 (14:53 +0800)]
ENGR00287331-2 sdhci-esdhc-imx: use bus freq in runtime pm

Request BUS_FREQ_HIGH when bus is busy and then release BUS_FREQ_HIGH
when bus becomes idle.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
(cherry picked from commit 64994f7115573c9ede53b51536b2c15f7cf0112a)

9 years agoENGR00240226-07 mmc: add delay after CMD6 befoer sending CMD13 for sandisk
Ryan QIAN [Wed, 16 Jan 2013 02:23:28 +0000 (10:23 +0800)]
ENGR00240226-07 mmc: add delay after CMD6 befoer sending CMD13 for sandisk

- Some sandisk emmc cards need certain delay befor sending cmd13 after
cmd6. Original CR: ENGR174296 (commit: fd031f9)

Acked-by: Aisheng Dong <b29396@freescale.com>
Signed-off-by: Ryan QIAN <b32804@freescale.com>
(cherry picked from commit f942bf1db36355d46f38792601594949f3f2c71b)

9 years agonet: fec: fix code identation
Nimrod Andy [Fri, 19 Sep 2014 06:26:03 +0000 (14:26 +0800)]
net: fec: fix code identation

There have extra identation before .skb_copy_to_linear_data_offset(),
this patch just remove the identation.

Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
9 years agoENGR00305648-1 ASoC: imx-sgtl5000: Support non-ssi cpu-dai
Nicolin Chen [Tue, 25 Mar 2014 12:56:18 +0000 (20:56 +0800)]
ENGR00305648-1 ASoC: imx-sgtl5000: Support non-ssi cpu-dai

The current imx-sgtl5000 driver always attaches the cpu-dai to ssi while
in fact it could be attached to other cpu-dais like SAI. Thus this patch
use a general code to support another cpu-dai. And meanwhile update the
devicetree for i.MX6 Series.

Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
(cherry picked from commit cb5dfaf44d2fdbce4329c2e4762e8450c8cd3b3c)

9 years agoENGR00321941 ASoC: fsl_spdif: fix that can't get the Rx Sample Rate
Shengjiu Wang [Mon, 7 Jul 2014 11:03:21 +0000 (19:03 +0800)]
ENGR00321941 ASoC: fsl_spdif: fix that can't get the Rx Sample Rate

The SRPC register should be volatile, LOCK bit is set by the hardware.

Signed-off-by: Shengjiu Wang <b02247@freescale.com>
(cherry picked from commit 35ac9096cbe158962e779fd9bc64aeb74abbc745)

9 years agoENGR00320241 ASoC: fsl_spdif: Complete the volatile register list
Nicolin Chen [Tue, 24 Jun 2014 06:44:18 +0000 (14:44 +0800)]
ENGR00320241 ASoC: fsl_spdif: Complete the volatile register list

Not only SIS but also other read-only or write-only reigsters should be marked
as volatile register so as not to let regcache cache them. So this patch just
adds those missing registers.

Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
(cherry picked from commit 56ad235ba23274fc05422ad4b13153d1c56801c4)

9 years agoENGR00318773-10 ASoC: imx-audmux: Add driver suspend and resume to support MEGA Fast
Nicolin Chen [Thu, 15 May 2014 10:53:25 +0000 (18:53 +0800)]
ENGR00318773-10 ASoC: imx-audmux: Add driver suspend and resume to support MEGA Fast

For i.MX6 SoloX, there is a mode of the SoC to shutdown all power source of
modules during system suspend and resume procedure. Thus, AUDMUX needs to
save all the values of registers before the system suspend and restore them
after the system resume.

Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
(cherry picked from commit 3f3781143ba2800f7e3e46dbecc0c7a76d22a146)

9 years agoENGR00318773-9 ASoC: fsl_ssi: Add driver suspend and resume to support MEGA Fast
Nicolin Chen [Thu, 15 May 2014 10:51:56 +0000 (18:51 +0800)]
ENGR00318773-9 ASoC: fsl_ssi: Add driver suspend and resume to support MEGA Fast

For i.MX6 SoloX, there is a mode of the SoC to shutdown all power source of
modules during system suspend and resume procedure. Thus, SSI needs to save
all the values of registers before the system suspend and restore them after
the system resume.

Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
(cherry picked from commit 34c50abd9df28580b367070bc20b8bca6cd7655c)

9 years agoENGR00318773-8 ASoC: fsl_spdif: Add driver suspend and resume to support MEGA Fast
Nicolin Chen [Wed, 14 May 2014 10:54:27 +0000 (18:54 +0800)]
ENGR00318773-8 ASoC: fsl_spdif: Add driver suspend and resume to support MEGA Fast

For i.MX6 SoloX, there is a mode of the SoC to shutdown all power source of
modules during system suspend and resume procedure. Thus, SPDIF needs to save
all the values of registers before the system suspend and restore them after
the system resume.

Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
(cherry picked from commit fd7d2c1a137c1b9d7adb58aaf06b90938172b964)

9 years agoENGR00318773-7 ASoC: fsl_esai: Add driver suspend and resume to support MEGA Fast
Nicolin Chen [Mon, 12 May 2014 12:00:48 +0000 (20:00 +0800)]
ENGR00318773-7 ASoC: fsl_esai: Add driver suspend and resume to support MEGA Fast

For i.MX6 SoloX, there is a mode of the SoC to shutdown all power source of
modules during system suspend and resume procedure. Thus, ESAI needs to save
all the values of registers before the system suspend and restore them after
the system resume.

Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
(cherry picked from commit fc69de0b0cc1d9a85ad7f7363da6dec02945964a)

9 years agoENGR00318773-6 ASoC: fsl_sai: Add driver suspend and resume to support MEGA Fast
Nicolin Chen [Mon, 12 May 2014 05:47:52 +0000 (13:47 +0800)]
ENGR00318773-6 ASoC: fsl_sai: Add driver suspend and resume to support MEGA Fast

For i.MX6 SoloX, there is a mode of the SoC to shutdown all power source of
modules during system suspend and resume procedure. Thus, SAI needs to save
all the values of registers before the system suspend and restore them after
the system resume.

Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
(cherry picked from commit 88efde0cec71d7d70948eeaf1d22ab52b8bc8f2d)

9 years agoENGR00307835-4 ASoC: fsl: implement ASRC P2P xrun handler
Shengjiu Wang [Thu, 10 Apr 2014 02:11:00 +0000 (10:11 +0800)]
ENGR00307835-4 ASoC: fsl: implement ASRC P2P xrun handler

When ASRC P2P is working, it will check the xrun status of cpu dai
in the back end bistream. then will do Whole route stop and restart.

Signed-off-by: Shengjiu Wang <b02247@freescale.com>
(cherry picked from commit 28d18f23fe7577f613ad8cfb4699bba26178304b)

9 years agoENGR00307835-3 ASoC: fsl: implement the ESAI xrun handler.
Shengjiu Wang [Mon, 14 Apr 2014 07:19:54 +0000 (15:19 +0800)]
ENGR00307835-3 ASoC: fsl: implement the ESAI xrun handler.

When esai xrun happened, there is possibility of channel swap. So ESAI
need to be reset.

Signed-off-by: Shengjiu Wang <b02247@freescale.com>
(cherry picked from commit 440fbeee5bba4d4356a392ff35fe262774c48ea1)

9 years agoENGR00307835-2 ASoC: dmaengine: Add two function for dmaengine_pcm
Shengjiu Wang [Mon, 14 Apr 2014 06:58:05 +0000 (14:58 +0800)]
ENGR00307835-2 ASoC: dmaengine: Add two function for dmaengine_pcm

Add check_xrun and device_reset for dmaengine_pcm

Signed-off-by: Shengjiu Wang <b02247@freescale.com>
(cherry picked from commit 405588f31e432e5c6634a0817e4d804ead87882b)

9 years agoENGR00283079-1 ASoC: fsl: Implement different DMA buffer sizes
Nicolin Chen [Thu, 17 Oct 2013 10:24:29 +0000 (18:24 +0800)]
ENGR00283079-1 ASoC: fsl: Implement different DMA buffer sizes

Each CPU DAI driver has its own defined DMA buffer size, so this patch just
drops the original one that uses a fixed size for all drivers and implements
a different DMA buffer size to each driver.

Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <b42378@freescale.com>
(cherry picked from commit d2589c6bcdfbcac420999e15d36ecd48a7df2742)

9 years agoENGR00274585-9 ASoC: change error message to debug message
Shengjiu Wang [Fri, 9 Aug 2013 06:45:51 +0000 (14:45 +0800)]
ENGR00274585-9 ASoC: change error message to debug message

This error message is not actual error, which is a warning. When using
FE/BE, if there is widget which is used by playback and capture route, then
this message will be printed.

Signed-off-by: Shengjiu Wang <b02247@freescale.com>
(cherry picked from commit ad60b0e03d058b57f2fd9538e1158da8eefcea1f)

9 years agoENGR00274585-6 ASoC: fsl: update format and buffer size in the pcm dma
Shengjiu Wang [Mon, 12 Aug 2013 06:17:13 +0000 (14:17 +0800)]
ENGR00274585-6 ASoC: fsl: update format and buffer size in the pcm dma

1. add 24bit format support.
2. enlarge the buffer size for ESAI.

Signed-off-by: Shengjiu Wang <b02247@freescale.com>
(cherry picked from commit a20054a079076fa62c2e4a24218697894a387e4c)

9 years agoENGR00320849-1 ASoC: cs4xx8: fix the setting of Functional mode
Shengjiu Wang [Wed, 2 Jul 2014 09:24:45 +0000 (17:24 +0800)]
ENGR00320849-1 ASoC: cs4xx8: fix the setting of Functional mode

Failed case:
arecord -Dhw:0,1 -f S16_LE -r 96000 -c 2 -traw | aplay -Dhw:0,0 -f
S16_LE -r 96000 -c 2 -traw.
There is no sound when use this case.The reason is that the setting
of Functional mode is not correct.

Signed-off-by: Shengjiu Wang <b02247@freescale.com>
(cherry picked from commit be1ef3bb8da5c263345ebdad4a7c218a095d0f48)

9 years agoENGR00320678 ASoC: cs42xx8: Revert the DAPM routes to the old one
Nicolin Chen [Tue, 1 Jul 2014 09:59:39 +0000 (17:59 +0800)]
ENGR00320678 ASoC: cs42xx8: Revert the DAPM routes to the old one

The upstream version of DAPM routes results record noise issue due to its
inappropriate power-up sequence. So we provisionally revert this change
to the old stable one, and figure out why the sequence has problem later.

Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
(cherry picked from commit 3cda4b6d88aa7b40ac22652df92fa449063bc35a)

9 years agoregmap: cache: Handle stride > 1 in sync_block_raw_flush
Dylan Reid [Fri, 24 Jan 2014 23:40:39 +0000 (15:40 -0800)]
regmap: cache: Handle stride > 1 in sync_block_raw_flush

regcache_sync_block_raw_flush takes the address of the base register
and the address of one past the last register to write to.  "count" is
the number of registers in the range, not the number of bytes, it
should be (end addr - start addr) / stride. Without accounting for
strides greater than one, registers past the end might be synced or
the writeable_reg callback at the beginning of _regmap_raw_write will
fail and nothing will be written.

Signed-off-by: Dylan Reid <dgreid@chromium.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
(cherry picked from commit 78ba73eecd2256790926859849801c0446766c0a)
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
9 years agoASoC: pcm: Fix incorrect condition check for case SNDRV_PCM_TRIGGER_SUSPEND
Nicolin Chen [Mon, 12 May 2014 12:12:05 +0000 (20:12 +0800)]
ASoC: pcm: Fix incorrect condition check for case SNDRV_PCM_TRIGGER_SUSPEND

The regular state before we execute SNDRV_PCM_TRIGGER_SUSPEND should be
SNDRV_PCM_TRIGGER_START, not SNDRV_PCM_TRIGGER_STOP. Thus fix it.

Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
(cherry picked from commit 868a6ca84ee7e547ae01a5e04e232e4a392c50b8)

9 years agoASoC: cs42xx8: Add SND_SOC_DAIFMT_DSP_A support
Shengjiu Wang [Tue, 29 Jul 2014 10:39:37 +0000 (18:39 +0800)]
ASoC: cs42xx8: Add SND_SOC_DAIFMT_DSP_A support

According to the spec, the definition of TDM and ONELINE_24 for
CS42XX8_INTF_DAC and CS42XX8_INTF_ADC is wrong. correct them and enable
SND_SOC_DAIFMT_DSP_A support.

Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Acked-by: Brian Austin <brian.austin@cirrus.com>
Acked-by: Nicolin Chen <nicoleotsuka@gmail.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
(cherry picked from commit 689dc643859953651ffb7111fdbcff2eb0f02841)

9 years agoASoC: cs42xx8: Make of match table static
Lars-Peter Clausen [Thu, 19 Jun 2014 07:40:28 +0000 (09:40 +0200)]
ASoC: cs42xx8: Make of match table static

The cs42xx8_of_match table is not used outside of the driver, hence it can and
should be made static.

Fixes the following warning from sparse:
sound/soc/codecs/cs42xx8.c:425:27: warning: symbol 'cs42xx8_of_match' was
not declared. Should it be static?

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Brian Austin <brian.austin@cirrus.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
(cherry picked from commit afb7bb45bb904da3704aad47adc4615a81f515c5)

9 years agoASoC: fsl_esai: refine esai for TDM support
Shengjiu Wang [Fri, 8 Aug 2014 06:47:21 +0000 (14:47 +0800)]
ASoC: fsl_esai: refine esai for TDM support

Original driver didn't store the number of slots, just fix the slot number
to 2, use this default number to calculate bclk and pins for TX/RX.
In this patch, add one parameter for slots, and update the calculation of
bclk and pins of TX/RX. Then driver will be compatible with slots > 2 in
TDM mode.

Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Acked-by: Nicolin Chen <nicoleotsuka@gmail.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
(cherry picked from commit de0d712a6dd1eed097dc6aa4f97ee461949414fe)

9 years agoENGR00307592 ASoC: fsl_asrc: Add delay after enabling ASRC p2p
Nicolin Chen [Wed, 9 Apr 2014 03:24:51 +0000 (11:24 +0800)]
ENGR00307592 ASoC: fsl_asrc: Add delay after enabling ASRC p2p

When using ASRC p2p as a for-end with other back-end modules like ESAI,
it'd be safer to add 1ms delay, less might be futile for extreme cases,
after enabling ASRC so as to keep ASRC output FIFO with enough data to
content the DMA burstsize of back-ends and accordingly prevent underrun
that might happen to them.

Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
(cherry picked from commit c68c1874c07c30a3483eed70fb2abe82e19d1d20)

9 years agoENGR00332688: ARM: dts: imx6qdl: refine spdif support in devicetree
Shengjiu Wang [Mon, 22 Sep 2014 08:54:45 +0000 (16:54 +0800)]
ENGR00332688: ARM: dts: imx6qdl: refine spdif support in devicetree

Add sysclk and spba clock, and assigned-clocks

Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
9 years agoENGR00332936 ARM: IMX6SL-EVK: EPDC: add four epdc firmware files
Fancy Fang [Wed, 24 Sep 2014 05:44:40 +0000 (13:44 +0800)]
ENGR00332936 ARM: IMX6SL-EVK: EPDC: add four epdc firmware files

Add the firmware files for EPDC driver.

Signed-off-by: Fancy Fang <chen.fang@freescale.com>
9 years agoENGR01330740-4 ARM: IMX6SL-EVK: update epdc/pxp driver to latest version
Fancy Fang [Fri, 19 Sep 2014 05:50:44 +0000 (13:50 +0800)]
ENGR01330740-4 ARM: IMX6SL-EVK: update epdc/pxp driver to latest version

Update the EPDC and PXP driver to the latest version
in imx-3.10.y branch.

Signed-off-by: Fancy Fang <chen.fang@freescale.com>
9 years agoENGR01330740-3 ARM: IMX6SL-EVK: correct some clock settings for epdc and lcdif
Fancy Fang [Tue, 9 Sep 2014 09:13:42 +0000 (17:13 +0800)]
ENGR01330740-3 ARM: IMX6SL-EVK: correct some clock settings for epdc and lcdif

1. split 'csi_lcdif_sels' into 'csi_core_sels' and 'lcdif_axi_sels'.
2. add 'CLK_SET_RATE_PARENT' flag to clocks 'IMX6SL_CLK_LCDIF_PIX_SEL'
   and 'IMX6SL_CLK_EPDC_PIX_SEL'.
3. configure LCDIF's clocks 'IMX6SL_CLK_LCDIF_AXI_SEL' and
   'IMX6SL_CLK_LCDIF_AXI'.
4. disable eink's auto update mode.

Signed-off-by: Fancy Fang <chen.fang@freescale.com>
9 years agoENGR01330740-2 ARM: IMX6SL-EVK: EPDC: add epdc module support to 3.14 kernel
Fancy Fang [Tue, 9 Sep 2014 04:42:22 +0000 (12:42 +0800)]
ENGR01330740-2 ARM: IMX6SL-EVK: EPDC: add epdc module support to 3.14 kernel

1. Add epdc related properties to dts file.
2. Set the epdc related clocks correctly.
3. Add epdc firmware compiling support.

Signed-off-by: Fancy Fang <chen.fang@freescale.com>
9 years agoENGR00330740-1 ARM: IMX6SL-EVK: MAX17135: add hwmon, mfd and regulator drivers for...
Fancy Fang [Fri, 5 Sep 2014 06:12:25 +0000 (14:12 +0800)]
ENGR00330740-1 ARM: IMX6SL-EVK: MAX17135: add hwmon, mfd and regulator drivers for this pmic

Add PMIC 'MAX17135' module drivers to 3.14 kernel. These are necessary
to supply power for E-ink panel display functions.

Signed-off-by: Fancy Fang <chen.fang@freescale.com>
9 years agoENGR00332313 ARM: IMX6SL-EVK: disable i2c3 by default
Fancy Fang [Fri, 19 Sep 2014 09:02:04 +0000 (17:02 +0800)]
ENGR00332313 ARM: IMX6SL-EVK: disable i2c3 by default

Disable I2C3 by default, since the pins are conflicted
with EPDC's pins.

Signed-off-by: Fancy Fang <chen.fang@freescale.com>
9 years agoENGR00331799-8: ASoC: fsl_spdif: add pm runtime for spdif
Shengjiu Wang [Tue, 3 Sep 2013 10:01:52 +0000 (18:01 +0800)]
ENGR00331799-8: ASoC: fsl_spdif: add pm runtime for spdif

Add pm runtime for spdif.

Signed-off-by: Shengjiu Wang <b02247@freescale.com>
9 years agoENGR00331799-7: ASoC: fsl_ssi: pm_runtime for ssi
Shengjiu Wang [Fri, 19 Sep 2014 06:09:46 +0000 (14:09 +0800)]
ENGR00331799-7: ASoC: fsl_ssi: pm_runtime for ssi

ADD pm runtime for ssi.

Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
9 years agoENGR00331799-6: ASoC: fsl_spdif: add spba clk support
Shengjiu Wang [Wed, 17 Sep 2014 08:42:51 +0000 (16:42 +0800)]
ENGR00331799-6: ASoC: fsl_spdif: add spba clk support

spdif need to enable the spba clock, when sdma is using share peripheral
script. If don't enable it, may cause the read/write wrong data from/to
registers.

Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
9 years agoENGR00331799-5: ASoC: fsl_esai: add spba clock support
Shengjiu Wang [Wed, 17 Sep 2014 08:42:32 +0000 (16:42 +0800)]
ENGR00331799-5: ASoC: fsl_esai: add spba clock support

esai need to enable the spba clock, when sdma is using share peripheral
script. If don't enable it, may cause the read/write wrong data from/to
register.

Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
9 years agoENGR00331799-4: ASoC: fsl_asrc: add spba clock support
Shengjiu Wang [Wed, 17 Sep 2014 08:42:09 +0000 (16:42 +0800)]
ENGR00331799-4: ASoC: fsl_asrc: add spba clock support

asrc need to enable the spba clock, when sdma is using share peripheral
script. If don't enable it, may cause the read/write wrong data from/to
register.

Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
9 years agoENGR00331799-3: ARM: dts: imx6sx: update dts for asrc
Shengjiu Wang [Wed, 17 Sep 2014 08:41:39 +0000 (16:41 +0800)]
ENGR00331799-3: ARM: dts: imx6sx: update dts for asrc

As we use the upstreamed asrc driver in imx_3.14, the device tree need
to be updated.

Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
9 years agoENGR00331799-2 ASoC: fsl_spdif: don't change the root clock rate of spdif in driver
Shengjiu Wang [Tue, 16 Sep 2014 11:18:49 +0000 (19:18 +0800)]
ENGR00331799-2 ASoC: fsl_spdif: don't change the root clock rate of spdif in driver

The spdif root clock may be used by other module or defined with
CLK_SET_RATE_GATE, so we can't change the clock rate in driver.
In this patch remove the clk_set_rate and clk_round_rate to protect the
clock.

Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
9 years agoENGR00331799-1 ASoC: fsl_ssi: refine ipg clock usage in this module
Shengjiu Wang [Thu, 4 Sep 2014 09:28:04 +0000 (17:28 +0800)]
ENGR00331799-1 ASoC: fsl_ssi: refine ipg clock usage in this module

Check if ipg clock is in clock-names property, then we can move the
ipg clock enable and disable operation to startup and shutdown, that
is only enable ipg clock when ssi is working and keep clock is disabled
when ssi is in idle.
But when the checking is failed, remain the clock control as before.

Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
9 years agonet: fec: Workaround for imx6sx enet tx hang when enable three queues
Fugang Duan [Tue, 16 Sep 2014 21:18:54 +0000 (05:18 +0800)]
net: fec: Workaround for imx6sx enet tx hang when enable three queues

When enable three queues on imx6sx enet, and then do tx performance
test with iperf tool, after some time running, tx hang.

Found that:
If uDMA is running, software set TDAR may cause tx hang.
If uDMA is in idle, software set TDAR don't cause tx hang.

There is a TDAR race condition for mutliQ when the software sets TDAR
and the UDMA clears TDAR simultaneously or in a small window (2-4 cycles).
This will cause the udma_tx and udma_tx_arbiter state machines to hang.
The issue exist at i.MX6SX enet IP.

So, the Workaround is checking TDAR status four time, if TDAR cleared by
hardware and then write TDAR, otherwise don't set TDAR.

The patch is only one Workaround for the issue ERR007885.

Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Frank Li <Frank.Li@freescale.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
9 years agonet:fec: increase DMA queue number
Fugang Duan [Tue, 16 Sep 2014 21:18:53 +0000 (05:18 +0800)]
net:fec: increase DMA queue number

when enable interrupt coalesce, 8 BD is not enough.

Signed-off-by: Frank Li <Frank.Li@freescale.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
9 years agonet: fec: add interrupt coalescence feature support
Fugang Duan [Tue, 16 Sep 2014 21:18:52 +0000 (05:18 +0800)]
net: fec: add interrupt coalescence feature support

i.MX6 SX support interrupt coalescence feature
By default, init the interrupt coalescing frame count threshold and
timer threshold.

Supply the ethtool interfaces as below for user tuning to improve
enet performance:
rx_max_coalesced_frames
rx_coalesce_usecs
tx_max_coalesced_frames
tx_coalesce_usecs

Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Frank Li <Frank.Li@freescale.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
9 years agonet: fec: refine error handle of parser queue number from DT
Frank Li [Tue, 16 Sep 2014 21:18:51 +0000 (05:18 +0800)]
net: fec: refine error handle of parser queue number from DT

check tx and rx queue seperately.
fix typo, "Invalidate" and "fail".
change pr_err to pr_warn.

Signed-off-by: Frank Li <Frank.Li@freescale.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
9 years agoENGR00332050-2 imx_v7_defconfig: enable ADC driver by default
Luwei Zhou [Thu, 18 Sep 2014 07:33:38 +0000 (15:33 +0800)]
ENGR00332050-2 imx_v7_defconfig: enable ADC driver by default

Enable adc driver in default config.

Signed-off-by: Luwei Zhou <b45643@freescale.com>
9 years agoENGR00332050-1 ARM: dts: i.mx6sx: Add ADC device tree support on i.MX6SX-SDB.
Luwei Zhou [Thu, 18 Sep 2014 07:29:34 +0000 (15:29 +0800)]
ENGR00332050-1 ARM: dts: i.mx6sx: Add ADC device tree support on i.MX6SX-SDB.

Add ADC dts support on i.MX6SX-SDB platform.

Signed-off-by: Luwei Zhou <b45643@freescale.com>
9 years agocrypto: testmgr - avoid DMA mapping from text, rodata, stack
Horia Geanta [Wed, 23 Jul 2014 08:59:38 +0000 (11:59 +0300)]
crypto: testmgr - avoid DMA mapping from text, rodata, stack

With DMA_API_DEBUG set, following warnings are emitted
(tested on CAAM accelerator):
DMA-API: device driver maps memory from kernel text or rodata
DMA-API: device driver maps memory from stack
and the culprits are:
-key in __test_aead and __test_hash
-result in __test_hash

MAX_KEYLEN is changed to accommodate maximum key length from
existing test vectors in crypto/testmgr.h (131 bytes) and rounded.

Signed-off-by: Horia Geanta <horia.geanta@freescale.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
(cherry picked from commit 29b77e5dd88e1b920e3e65681f0e7b961ebbdeb8)

9 years agocrypto: testmgr - Fix DMA-API warning
Tadeusz Struk [Mon, 19 May 2014 16:51:33 +0000 (09:51 -0700)]
crypto: testmgr - Fix DMA-API warning

With DMA-API debug enabled testmgr triggers a "DMA-API: device driver maps memory from stack" warning, when tested on a crypto HW accelerator.

Signed-off-by: Tadeusz Struk <tadeusz.struk@intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
(cherry picked from commit 9bac019dad8098a77cce555d929f678e22111783)

9 years agoENGR00327300 ARM: dts: imx6qdl-sabresd: enable wdog2 instead of wdog1 in ldo-bypass...
Robin Gong [Thu, 14 Aug 2014 05:40:22 +0000 (13:40 +0800)]
ENGR00327300 ARM: dts: imx6qdl-sabresd: enable wdog2 instead of wdog1 in ldo-bypass board.

As we use WDOG_B pin of wdog2 to reset extenal pmic in ldo-bypass mode, so we need
use WDOG2 as the default watchdog device in kernel.

Signed-off-by: Robin Gong <b38343@freescale.com>
(cherry picked from commit 50dad2a0ba9809da6fe446526f0acb65b5eaed25)

9 years agoENGR00279402-1 ARM: dts: imx6: add wdog reset source seclect in dts
Robin Gong [Thu, 12 Sep 2013 08:22:26 +0000 (16:22 +0800)]
ENGR00279402-1 ARM: dts: imx6: add wdog reset source seclect in dts

Some boards use another WDOG reset source to reboot system in ldo-bypass mode.
We need add the property in board dts file so that we can easily know the
WDOG reset source currently.

For Sabresd, WDOG1 for ldo-enable mode(WDOG event), WDOG2 for ldo-bypass mode
(reset external pmic to trigger POR event).
For sl-evk board, there is no WDOG pin connected with external pmic as Sabresd
, because mx6sl boot at 400Mhz. Then both ldo-enable and ldo-bypass mode use
the common WDOG1 as reset source.

Signed-off-by: Robin Gong <b38343@freescale.com>
(cherry picked from commit d960bbe78009d306f80957321622aaad0628ac4b)

9 years agoENGR00287983-2 imx restart: add another WDOG2 reset support for ldo-bypass
Robin Gong [Thu, 14 Nov 2013 05:58:21 +0000 (13:58 +0800)]
ENGR00287983-2 imx restart: add another WDOG2 reset support for ldo-bypass

For ldo-bypass mode on i.MX6Q/DL sabresd board, we will use another WDOG2 to
reset external pmic to trigger POR event, rather than WDOG1 to trigger WDOG
event in ldo-enable mode. We need to consider it in common mxc_restart().
On i.MX6SL sabresd board we use WDOG1 to trigger WDOG event both ldo-bypass and
ldo-enable mode.

Signed-off-by: Robin Gong <b38343@freescale.com>
(cherry picked from commit ee07b144e1adff13d262e7f353f5804e3c2d3e06)

9 years agoENGR00332011: ARM: dts: imx6qdl-sabreauto: enable gpio-key
Robin Gong [Thu, 18 Sep 2014 04:04:31 +0000 (12:04 +0800)]
ENGR00332011: ARM: dts: imx6qdl-sabreauto: enable gpio-key

enable gpio-key on imx6qdl-sabreauto board.

Signed-off-by: Robin Gong <b38343@freescale.com>
9 years agoARM: dts: imx6sl: add keypad support for i.mx6sl-evk board.
Anson Huang [Tue, 14 Jan 2014 09:30:28 +0000 (17:30 +0800)]
ARM: dts: imx6sl: add keypad support for i.mx6sl-evk board.

i.MX6SL EVK board has a 3*3 keypad matrix to support 8 keypads,
enable them, the keymap is as below:

SW6:  MATRIX_KEY(0x0, 0x0, KEY_UP)         /* ROW0, COL0 */
SW7:  MATRIX_KEY(0x0, 0x1, KEY_DOWN)       /* ROW0, COL1 */
SW8:  MATRIX_KEY(0x0, 0x2, KEY_ENTER)      /* ROW0, COL2 */
SW9:  MATRIX_KEY(0x1, 0x0, KEY_HOME)       /* ROW1, COL0 */
SW10: MATRIX_KEY(0x1, 0x1, KEY_RIGHT)      /* ROW1, COL1 */
SW11: MATRIX_KEY(0x1, 0x2, KEY_LEFT)       /* ROW1, COL2 */
SW12: MATRIX_KEY(0x2, 0x0, KEY_VOLUMEDOWN) /* ROW2, COL0 */
SW13: MATRIX_KEY(0x2, 0x1, KEY_VOLUMEUP)   /* ROW2, COL1 */

Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
(cherry picked from commit 4291b6455aa7bf6620cff9e8ef2b1389b8c8d4e0)

9 years agoENGR00318936-2 input: keyboard: imx: remove usless release interrupt enabled code
Robin Gong [Wed, 18 Jun 2014 06:14:09 +0000 (14:14 +0800)]
ENGR00318936-2 input: keyboard: imx: remove usless release interrupt enabled code

Remove useless code for release interrupt enabled, because we check status by
timer rather than release interrupt. Remove the code which may disable depress
interrupt. Also make sure enable depress interrupt in suspend function.

Signed-off-by: Robin Gong <b38343@freescale.com>
(cherry picked from commit 806ed5b9769efff2c9d8c66ed19315b48ec6fd57)

9 years agoENGR00318936-1 input: keyboard: imx: add pm_stay_awake and pm_relax
Robin Gong [Tue, 10 Jun 2014 03:56:49 +0000 (11:56 +0800)]
ENGR00318936-1 input: keyboard: imx: add pm_stay_awake and pm_relax

There is a small window after system suspend but timer scan function
didn't finish timely, in this case,  system enter suspend without kpp
interrupt enabled and failed to resume back if key depressed.We add
pm_stay_awake and pm_relax to make sure system suspend flow abort in
this case.

Signed-off-by: Robin Gong <b38343@freescale.com>
(cherry picked from commit 3868f06af8f39673f270643ada63dd88e2f5699e)

9 years agoENGR00243120 rtc:snvs: support power off system by SNVS
Robin Gong [Mon, 4 Feb 2013 08:20:05 +0000 (16:20 +0800)]
ENGR00243120 rtc:snvs: support power off system by SNVS

Enable the function by SNVS which located in snvs-rtc driver

Signed-off-by: Robin Gong <b38343@freescale.com>
(cherry picked from commit 79e3dc7b9f29213179ad6904ee0abc63d3ba5301)

9 years agoENGR00331116 ARM: dts: i.mx6sl-evk: Add mma8450 sensor dts support on i.MX6SL-EVK...
Luwei Zhou [Thu, 18 Sep 2014 05:15:43 +0000 (13:15 +0800)]
ENGR00331116 ARM: dts: i.mx6sl-evk: Add mma8450 sensor dts support on i.MX6SL-EVK platform.

Support MMA8450 sensor on i.MX6SL-EVK

Signed-off-by: Luwei Zhou <b45643@freescale.com>
9 years agoENGR00331509-3 imx_v7_defconfig: enable isl29023 by default
Luwei Zhou [Wed, 17 Sep 2014 05:38:56 +0000 (13:38 +0800)]
ENGR00331509-3 imx_v7_defconfig: enable isl29023 by default

Enable isl29023 driver in default config.

Signed-off-by: Luwei Zhou <b45643@freescale.com>
9 years agoENGR00331509-2 ARM: dts: i.mx6q/dl/sx: Add isl29023 device tree support.
Luwei Zhou [Wed, 17 Sep 2014 05:03:03 +0000 (13:03 +0800)]
ENGR00331509-2 ARM: dts: i.mx6q/dl/sx: Add isl29023 device tree support.

Add isl29023 sensor device tree support on i.MX6Q/DL/SX platform.

Signed-off-by: Luwei Zhou <b45643@freescale.com>
9 years agoENGR00331509-1 input: misc: isl29023: Add isl29023 driver support on i.MX6Q/DL/SX...
Luwei Zhou [Wed, 17 Sep 2014 02:50:08 +0000 (10:50 +0800)]
ENGR00331509-1 input: misc: isl29023: Add isl29023 driver support on i.MX6Q/DL/SX platform.

Add isl29023 driver support for i.MX6Q/DL/SX platform. The code derives from 3.10.y branch.

Signed-off-by: Luwei Zhou <b45643@freescale.com>
9 years agoENGR00331790 ARM: dts: add new dts imx6sx-17x17-arm2-gpmi-weim.dts
Allen Xu [Fri, 12 Sep 2014 17:38:24 +0000 (12:38 -0500)]
ENGR00331790 ARM: dts: add new dts imx6sx-17x17-arm2-gpmi-weim.dts

For NAND and WEIM verification on 3.14 Kernel.

Signed-off-by: Allen Xu <b45815@freescale.com>
9 years agoENGR00331085-10: ARM: imx_v7_defconfig: build in audio modules
Shengjiu Wang [Wed, 3 Sep 2014 09:06:18 +0000 (17:06 +0800)]
ENGR00331085-10: ARM: imx_v7_defconfig: build in audio modules

Build in audio modules: FM, IMX_CS42888, IMX_HDMI.

Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
9 years agoENGR00331085-9: ARM: dts: imx6sx-sdb: Support spdif out in sx-sdb board
Shengjiu Wang [Fri, 27 Jun 2014 06:02:28 +0000 (14:02 +0800)]
ENGR00331085-9: ARM: dts: imx6sx-sdb: Support spdif out in sx-sdb board

Add device tree for spdif in sx-sdb board.

Signed-off-by: Shengjiu Wang <b02247@freescale.com>
9 years agoENGR00331085-8: ARM: dts: imx6sx: add sai support for imx6sx-sdb board
Shengjiu Wang [Mon, 15 Sep 2014 11:40:20 +0000 (19:40 +0800)]
ENGR00331085-8: ARM: dts: imx6sx: add sai support for imx6sx-sdb board

SAI has pin conflicts with other moudles on all current boards of Solo X
and two sdma event conflicts with UART5.

Thus this patch adds new dtbs for SAI cases that occupy the pins and the
event IDs of SDMA.

Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
9 years agoENGR00331085-7: ARM: dts: imx6sx: Add SSI<->WM8962 audio support for imx6sx-sdb
Shengjiu Wang [Tue, 16 Sep 2014 06:14:52 +0000 (14:14 +0800)]
ENGR00331085-7: ARM: dts: imx6sx: Add SSI<->WM8962 audio support for imx6sx-sdb

Append audio nodes to the devicetree to add audio support for imx6sx-sdb with
Wolfson WM8962 CODEC.

Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
9 years agoENGR00331085-6: ARM: dts: imx6sl-evk: Add spdif support for imx6sl-evk
Shengjiu Wang [Tue, 16 Sep 2014 06:11:21 +0000 (14:11 +0800)]
ENGR00331085-6: ARM: dts: imx6sl-evk: Add spdif support for imx6sl-evk

Complete spdif devicetree binding for imx6sl, also add its support
for imx6sl-evk board.

Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
9 years agoENGR00331085-5: ARM: dts: imx6sl-evk: Add WM8962 support for imx6sl-evk
Shengjiu Wang [Tue, 16 Sep 2014 06:08:11 +0000 (14:08 +0800)]
ENGR00331085-5: ARM: dts: imx6sl-evk: Add WM8962 support for imx6sl-evk

Add WM8962 support for imx6sl-evk:
 * Add pinctrl group for audmux on evk board
 * Add WM8962-related devictree binding for evk board
 * Add clock route for ssi.

Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
9 years agoENGR00331085-4: ARM: dts: imx6qdl: Add si4763 support for imx6qdl-sabreauto
Shengjiu Wang [Thu, 11 Sep 2014 02:57:18 +0000 (10:57 +0800)]
ENGR00331085-4: ARM: dts: imx6qdl: Add si4763 support for imx6qdl-sabreauto

Add missing devicetree nodes and binding for the support.

Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
9 years agoENGR00331085-3: ARM: dts: imx6qdl: enable hdmi audio
Shengjiu Wang [Wed, 3 Sep 2014 07:59:34 +0000 (15:59 +0800)]
ENGR00331085-3: ARM: dts: imx6qdl: enable hdmi audio

The HDMI audio's DMA type is changed to 24. So need to update the dts.

Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
9 years agoENGR00331085-2: ARM: dts: imx6qdl: enable asrc support
Shengjiu Wang [Wed, 3 Sep 2014 07:48:34 +0000 (15:48 +0800)]
ENGR00331085-2: ARM: dts: imx6qdl: enable asrc support

Enable asrc support and enable asrc p2p for sound-cs42888.

Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>