Wolfgang Denk [Wed, 19 Aug 2009 09:42:56 +0000 (11:42 +0200)]
tools/mkimage: fix compiler warnings, use "const"
This fixes some compiler warnings:
tools/default_image.c:141: warning: initialization from incompatible pointer type
tools/fit_image.c:202: warning: initialization from incompatible pointer type
and changes to code to use "const" attributes in a few places where
it's appropriate.
tools: mkimage: split code into core, default and FIT image specific
This is a first step towards reorganizing the mkimage code to make it
easier to add support for additional images types. Current mkimage
code is specific to generating uImage and FIT image files, but the
same framework can be used to generate other image types like
Kirkwood boot images (kwbimage-TBD). For this, the mkimage code gets
reworked:
Here is the brief plan for the same:-
a) Split mkimage code into core and image specific support
b) Implement callback functions for image specific code
c) Move image type specific code to respective C files
Currently there are two types of file generation/list
supported (i.e uImage, FIT), the code is abstracted from
mkimage.c/.h and put in default_image.c and fit_image.c;
all code in these file is static except init function call
d) mkimage_register API is added to add new image type support
All above is addressed in this patch
e) Add kwbimage type support to this new framework (TBD)
This will be implemented in a following commit.
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Edit commit message, fix coding style and typos. Signed-off-by: Wolfgang Denk <wd@denx.de>
ppc4xx: Allow overwriting pci target registers for all 4xx boards
This patch adds the CONFIG_PCI_4xx_PTM_OVERWRITE option and replaces
the ugly 'if defined(BOARD1) || ... || defined(BOARDn)' construct
in 4xx pci code.
When CONFIG_PCI_4xx_PTM_OVERWRITE is defined the default ptm register
setup can be overwritten through environment variables ptm1la, ptm1ms,
ptm2la and ptm2ms to do application specific pci target BAR configuration.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu> Signed-off-by: Stefan Roese <sr@denx.de>
amcc-common.h: Use filenames from environment variables for update procedure.
Using a separate "u-boot" environment variable allows to easily
specify different filenames for the update procedure. This is also in
line with many other board configurations defining an "update" script.
Signed-off-by: Detlev Zundel <dzu@denx.de> Acked-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
Kumar Gala [Wed, 9 Sep 2009 16:40:41 +0000 (11:40 -0500)]
ppc/85xx: Introduce RESET_VECTOR_ADDRESS to handle non-standard link address
Some board ports place TEXT_BASE at a location that would cause the
RESET_VECTOR_ADDRESS not to be at 0xfffffffc when we link. By default
we assume RESET_VECTOR_ADDRESS will be 0xfffffffc if the board doesn't
explicitly set it.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Wolfgang Denk <wd@denx.de>
Kumar Gala [Tue, 8 Sep 2009 18:46:46 +0000 (13:46 -0500)]
ppc/85xx: Clean up do_reset
There is no reason to do a run time check for e500 v1 based cores to
determine if we have the GUTs RSTCR facility. Only the first generation
of PQ3 parts (MPC8540/41/55/60) do not have it. So checking to see if
we are e500 v2 would miss future parts (like e500mc).
Just change this to be ifdef'd based on CONFIG_MPC85{40,41,55,60}.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
ppc/85xx/86xx: Device tree fixup for number of cores
Fixing the number of cores in the device tree based on the actual number of
cores on the system. With this same device tree image can be used for dual
core and single core members of otherwise exactly same SOC.
For example:
* P2020RDB and P2010RDB
* P1020RDB and P1011RDB
* MPC8641D and MPC8641
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Wed, 2 Sep 2009 14:03:08 +0000 (09:03 -0500)]
ppc/8xxx: Refactor code to determine if PCI is enabled & agent/host
Refactor the code into a simple bitmask lookup table that determines if
a given PCI controller is enabled and if its in host/root-complex or
agent/end-point mode.
Each processor in the PQ3/MPC86xx family specified different encodings
for the cfg_host_agt[] and cfg_IO_ports[] boot strapping signals.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Wed, 2 Sep 2009 14:00:50 +0000 (09:00 -0500)]
ppc/85xx: Cleanup makefile and related optional files
Cleaned up cpu/mpc85xx/Makefile to use CONFIG_* for those obvious cases
we have like PCI, CPM2, QE. Also reworked it to use one line per file
for everything and sorted in alphabetical order.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Timur Tabi [Fri, 4 Sep 2009 22:05:24 +0000 (17:05 -0500)]
fsl: add register read-back to set_law()
After programming a new LAW, we should read-back the LAWAR register so that
we sync the writes. Otherwise, code that attempts to use the new LAW-mapped
memory might fail right away.
Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Thu, 3 Sep 2009 13:41:31 +0000 (08:41 -0500)]
ppc/85xx: Fix bug in setup_mp code
Its possible that we try and copy the boot page code out of flash into a
DDR location that doesn't have a TLB cover it. For example, if we have
3G of DDR we typically only map the first 2G. In the cases of 4G+ this
wasn't an issue since the reset page TLB mapping covered the last page
of memory which we wanted to copy to.
We now change the physical address of the reset page TLB to map to the
true physical location of the boot page code, copy and than set the
TLB back to its 1:1 mapping of the reset page.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Fri, 14 Aug 2009 18:37:54 +0000 (13:37 -0500)]
85xx: Add support for setting IVORs to fixed offset defaults
In future Book-E implementations IVORs will most likely go away and be
replaced with fixed offsets. The IVPR will continue to exist to allow
for relocation of the interrupt vectors.
This code adds support to setup the IVORs as their fixed offset values
per the ISA 2.06 spec when we transition from u-boot to another OS
either via 'bootm' or a cpu release.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Wed, 2 Sep 2009 03:01:54 +0000 (22:01 -0500)]
ppc/8xxx: Remove ddr_pd_cntl register since it doesn't exist
The ddr_pd_cntl isn't defined in any reference manual and thus we wil
remove especially since we set it to 0, which would most likely be its
POR value.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Anton Vorontsov [Tue, 1 Sep 2009 22:17:24 +0000 (02:17 +0400)]
fsl: sys_eeprom: Fix 'may be used uninitialized' warning
The warning is bogus, so silence it by initializing the 'ret' variable.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Acked-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Enable eSDHC Clock based on generic CONFIG_FSL_ESDHC define instead of a
platform define. This will enable all the 85xx platforms to use sdhc_clk
based on CONFIG_FSL_ESDHC.
Timur Tabi [Fri, 4 Sep 2009 21:28:35 +0000 (16:28 -0500)]
fsl_i2c: increase I2C timeout values and make them configurable
The value of I2C_TIMEOUT in fsl_i2c.c has several problems. First, it is
defined as CONFIG_HZ/4, but it is used as a count of microseconds, so it makes
no sense to derive it from a clock rate. Second, the current value (250) is
too low for some boards, so it needs to be increased. Third, the timeout
necessary for multiple-master arbitration is larger than the timeout for basic
read/write operations, so we shouldn't have a single constant for both timeouts.
Finally, it would be nice if we could override these values on a per-board
basis.
Signed-off-by: Timur Tabi <timur@freescale.com> Acked-by: Wolfgang Denk <wd@denx.de> Tested-by: Peter Tyser <ptyser@xes-inc.com> Acked-by: Peter Tyser <ptyser@xes-inc.com>
Eric Millbrandt [Thu, 3 Sep 2009 13:09:44 +0000 (08:09 -0500)]
Reset i2c slave devices during init on mpc5xxx cpus
Reset any i2c devices that may have been interrupted during a system reset.
Normally this would be accomplished by clocking the line until SCL and SDA
are released and then sending a start condtiion (From an Atmel datasheet).
There is no direct access to the i2c pins so instead create start commands
through the i2c interface. Send a start command then delay for the SDA Hold
time, repeat this by disabling/enabling the bus a total of 9 times.
Signed-off-by: Eric Millbrandt <emillbrandt@dekaresearch.com>
Mike Frysinger [Fri, 4 Sep 2009 03:12:47 +0000 (23:12 -0400)]
push LOAD_ADDR out to arch mk files
Rather than maintain/extend the current ifeq($(ARCH)) mess that exists in
the standalone Makefile, push the setting up of LOAD_ADDR out to the arch
config.mk (and rename to STANDALONE_LOAD_ADDR in the process). This keeps
the common code clean and lets the arch do whatever crazy crap it wants in
its own area.
Wolfgang Denk [Wed, 2 Sep 2009 12:57:27 +0000 (14:57 +0200)]
License cleanup: remove unintended "All Rights Reserved" notices.
Some files included my old standerd file header which had a "All
Rights Reserved" part. As this has never been my intention, I remove
these lines to make the files compatible with GPL v.2 and later.
Wolfgang Denk [Wed, 2 Sep 2009 08:21:20 +0000 (10:21 +0200)]
cmd_mtdparts.c: fix compiler warning in debug code
Fix warning messages:
cmd_mtdparts.c:1429: warning: format '%08lx' expects type 'long
unsigned int', but argument 6 has type 'u32'
cmd_mtdparts.c:1429: warning: format '%08lx' expects type 'long
unsigned int', but argument 7 has type 'u32'
Kumar Gala [Thu, 27 Aug 2009 13:23:55 +0000 (08:23 -0500)]
Add ability for arch code to make changes before we boot
Added a arch_preboot_os() function that cpu specific code can implement to
allow for various modifications to the state of the machine right before
we boot. This can be useful to setup register state to a specific
configuration.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Graeme Russ [Sun, 23 Aug 2009 02:59:54 +0000 (12:59 +1000)]
Fixup sc520_spunk board
Primary intent is to resolve build errors for this board which has been
neglected for a very long time. I do not have one of these boards, so I
cannot test functionality
Graeme Russ [Sun, 23 Aug 2009 02:59:53 +0000 (12:59 +1000)]
Misc ds1722 fixups
This patch is based on a patch submitted by Jean-Christophe PLAGNIOL-VILLARD
on 18th May 2008 as part of a general i386 / sc520 fixup which was never
applied
Graeme Russ [Sun, 23 Aug 2009 02:59:52 +0000 (12:59 +1000)]
Misc ti_pci1410a fixups
Removed do_pinit() - now declared in cmd_pcmcia.c
Added #define CONFIG_CMD_PCMCIA around pcmcia_off() in line with other
PCMCIA drivers
signed/unsigned type fixups
Added semi-colon after default: label as required by newer gcc
The only board that appears to use this driver is the sc520_spunk which
is very old and very likely very broken anyway. I do not have one to test
whether this patch breaks anything functionaly, I have can only check
that it compiles without warning or error
Graeme Russ [Sun, 23 Aug 2009 02:59:51 +0000 (12:59 +1000)]
Misc SATA fixups
Cast first parameter to sata_cpy()
In /drivers/block/ata_piix.h, ata_id_has_lba48(), ata_id_has_lba(),
ata_id_has_dma(), ata_id_u32(), ata_id_u64() are all defined in
include/libata.h which is included in ata.h which is included by all files
which include ata_piix.h (only ata_piix.c) so these definitions are
supurflous to (and conlict with) this in libata.h. Interestingly, my
compiler complains about ata_id_u64 already being defined, but not
ata_id_u32
ata_dump_id() is defined in include/libata.h and should not be static
(maybe should even use ata_dump_id() in libata.c
Change call to pci_find_class() to pci_find_devices(). This is based on a
patch submitted on 1st March 2007 (Patch that fixes the compilation errors
for sc520_cdp board) by mushtaq_k
This patch requires that PCI_VIDEO_VENDOR_ID and PCI_VIDEO_DEVICE_ID be
specified in the board config file. Dummy values have been added for the
SC520 CDP board to enable compilation, but since I do not have one of these,
I do know what the values should be
Graeme Russ [Sun, 23 Aug 2009 02:59:49 +0000 (12:59 +1000)]
Fix sc520 timer interrupt generation
The current implementation has the timer being started before the interrupt
handler is installed. It the interrupt occurs before the handler is
installed, the timer interrupt is never reset and the timer stops
Graeme Russ [Sun, 23 Aug 2009 02:59:48 +0000 (12:59 +1000)]
Fix environment configuration for eNET board
The current configuration of the Environment has the redundant copy of the
environment in the Boot Flash - This was never the intent. The Environment
should instead be in the first two sectors of the first Strata Flash
Graeme Russ [Sun, 23 Aug 2009 02:59:46 +0000 (12:59 +1000)]
i386: Change inline asm global symbols to local
gcc 4.3.2 optimiser creates multiple copies of inline asm (who knows why)
Remove use of global names for labels to prevent 'symbol already defined'
errors
Mike Frysinger [Thu, 23 Jul 2009 20:37:03 +0000 (16:37 -0400)]
atmel_df_pow2: standalone to convert dataflashes to pow2
Atmel DataFlashes by default operate with pages that are slightly bigger
than normal binary sizes (i.e. many are 1056 byte pages rather than 1024
bytes). However, they also have a "power of 2" mode where the pages show
up with the normal binary size. The latter mode is required in order to
boot with a Blackfin processor, so many people wish to convert their
DataFlashes on their development systems to this mode. This standalone
application does just that.
Mike Frysinger [Wed, 2 Sep 2009 08:21:16 +0000 (04:21 -0400)]
Blackfin: enable 64bit printf for nand
Since the NAND code now uses 64bit code, make sure we enable support for
ADI Blackfin boards in printf to avoid the warning:
nand_util.c:45:2: warning: #warning Please define CONFIG_SYS_64BIT_VSPRINTF for correct output!
Mike Frysinger [Tue, 25 Aug 2009 00:48:04 +0000 (20:48 -0400)]
Blackfin: use scratch pad for exception stack
If the memory layout pushes the stack out of the default DCPLB coverage,
the exception handler may trigger a double fault by trying to push onto
the uncovered stack. So handle the exception stack similar to the kernel
by using the top of the scratch pad SRAM.
Robin Getz [Mon, 17 Aug 2009 15:23:02 +0000 (15:23 +0000)]
Blackfin: change global data register from P5 to P3
Since the Blackfin ABI favors higher scratch registers by default, use the
last scratch register (P3) for global data rather than the first (P5).
This allows the compiler's register allocator to use higher number scratch
P registers, which in turn better matches the Blackfin instruction set,
which reduces the size of U-Boot by more than 1024 bytes...
Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
TI DaVinci: DM646x: Initial Support for DM646x SOC
DM646x is an SOC from TI which has both an ARM and a DSP.
There are multiple variants of the SOC mainly dealing with different
core speeds.
This patch adds the initial framework for the DM646x SOC.
TI DaVinci: DM6446: Fix Compilation error in NAND mode
The Default mode that is built for the Davinci DVEVM happens
to be the NOR mode.
When we want to build for the NAND mode, we get a compilation
error. This is overcome by defining the CONFIG_MTD_DEVICE
flag in the NAND mode.
The image built for NAND mode was successfully tested on the
DaVinci DM6446 EVM.
Tom Rix [Thu, 10 Sep 2009 19:27:57 +0000 (15:27 -0400)]
OMAP3 Move cache routine to cache.S
v7_flush_dcache_all, because it depends on omap ROM code is not
generic. Rename the function to 'invalidate_dcache' and move it
to the omap cpu directory.
Collect the other omap cache routines l2_cache_enable and
l2_cache_disable with invalide_dcache into cache.S. This
means removing the old cache.c file that contained l2_cache_enable
and l2_cache_disable.
The conversion from cache.c to cache.S was done most through
disassembling the uboot binary. The only significant change was
to change the comparision for the return of get_cpu_rev from
cmp r0, #0
beq earlier_than_label
Which was lost information to
cmp r0, #CPU_3XX_ES20
blt earlier_than_label
The paths through the enable routine were verified by
adding an infinite loop and seeing the hang. Then
removing the infinite loop and seeing it continue.
The disable routine is similar enough that it was not
tested with this method.
Run tested by cold booting from nand on beagle and zoom1.
Compile tested on MAKEALL arm.
This patch removes the asm/sizes.h header file from being
included in the DaVinci SOC configs.
References to SZ_xx have been replaced by appropriate
bit shifted values.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com> Acked-by: Wolfgang Denk <wd@denx.de>
Albin Tonnerre [Thu, 20 Aug 2009 14:04:49 +0000 (16:04 +0200)]
Support for the Calao TNY-A9260/TNY-A9G20 boards
The Calao TNY-A9260 and TNY-9G20 are boards manufactured and sold by
Calao Systems <http://www.calao-systems.com>. Their components are very
similar to the AT91SAM9260EK board, so their configuration is based on
the configuration of this board. There are however some differences:
different clocks, no LCD, no ethernet. They also can use SPI EEPROM to
store the environment.
arm: Kirkwood: add SYSRSTn Duration Counter Support
This feature can be used to trigger special command "sysrstcmd" using
reset key long press event and environment variable "sysrstdelay" is set
(useful for reset to factory or manufacturing mode execution)
Kirkwood SoC implements a hardware-based SYSRSTn duration counter.
When SYSRSTn is asserted low, a SYSRSTn duration counter is running.
The counter value is stored in the SYSRSTn Length Counter Register
The counter is based on the 25-MHz reference clock (40ns)
It is a 29-bit counter, yielding a maximum counting duration of
2^29/25 MHz (21.4 seconds). When the counter reach its maximum value,
it remains at this value until counter reset is triggered by setting
bit 31 of KW_REG_SYSRST_CNT
Implementation:
Upon long reset assertion (> ${sysrstdelay} in secs) sysrstcmd will be
executed if pre-defined in environment variables.
This feature will be disabled if "sysrstdelay" variable is unset.
for-ex.
setenv sysrst_cmd "echo starting factory reset;
nand erase 0xa0000 0x20000;
echo finish ed sysrst command;"
will erase particular nand sector if triggered by this event
Albin Tonnerre [Mon, 24 Aug 2009 16:03:26 +0000 (18:03 +0200)]
Add support for the Calao SBC35-A9G20 board
The Calao SBC35-A9G20 board is manufactured and sold by Calao Systems
<http://www.calao-systems.com>. It is built around an AT91SAM9G20 ARM SoC
running at 400MHz. It features an Ethernet port, an SPI RTC backed by an onboard
battery , an SD/MMC slot, a CompactFlash slot, 64Mo of SDRAM, 256Mo of NAND
flash, two USB host ports, and an USB device port. More informations can be
found at <http://www.calao-systems.com/articles.php?lng=en&pg=5936>
Ilya Yanok [Mon, 10 Aug 2009 22:32:09 +0000 (02:32 +0400)]
imx27lite: add support for imx27lite board from LogicPD
This patch adds support for i.MX27-LITEKIT development board from
LogicPD. This board uses i.MX27 SoC and has 2MB NOR flash, 64MB NAND
flash, FEC ethernet controller integrated into i.MX27.
Signed-off-by: Ilya Yanok <yanok@emcraft.com> Acked-by: Wolfgang Denk <wd@denx.de>
David Brownell [Sun, 30 Aug 2009 18:05:29 +0000 (11:05 -0700)]
bugfix CONFIG_SYS_CONSOLE_INFO_QUIET
The "console: unify printing current devices" patch goofed:
CONFIG_SYS_CONSOLE_INFO_QUIET is supposed to *REMOVE* boot
time noise, not add it. Said patch changed the #ifndefs
to #ifdef; this one restores them to the proper sense.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Timur Tabi [Fri, 28 Aug 2009 21:56:45 +0000 (16:56 -0500)]
fsl: simplify the "mac id" command, improve boot-time informational message
The "mac id" command took a 4-character parameter as the identifier string.
However, for any given board, only one kind of identifier is acceptable, so it
makes no sense to ask the user to type it in. Instead, if the user enters
"mac id", the identifier (and also the version, if it's NXID) will
automatically be set to the correct value.
Improve the message that is displayed when EEPROM is read during boot. It now
displays "EEPROM:" and then either an error message or the EEPROM identifier
if successful.
If the identifier in EEPROM is valid, then always reject a bad CRC, even if the
CRC field has not been initialized.
Don't force the MAC address count to MAX_NUM_PORTS or less. Forcing the value
to be changed resulting in an in-memory copy that does not match what's in
hardware, even though the user did not request that change.
Finally, always update the CRC value in the in-memory copy after any field
is changed, so that the CRC is always correct.
Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Poonam Aggrwal [Fri, 21 Aug 2009 01:59:42 +0000 (07:29 +0530)]
driver/fsl_pci: Add fsl_pci_init_port function to initialize a PCI controller
fsl_pci_init_port can be called from board specific PCI initialization
routines to setup the PCI (or PCIe) controller. This will reduce code
redundancy in most of the 85xx/86xx FSL board ports that setup PCI.
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Timur Tabi [Thu, 20 Aug 2009 22:41:11 +0000 (17:41 -0500)]
85xx: Improve MPIC initialization
The MPIC initialization code for Freescale e500 CPUs was not using I/O
accessors, and it was not issuing a read-back to the MPIC after setting
mixed mode. This may be the cause of a spurious interrupt on some systems.
Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
projects / karo-tx-uboot.git / log