Olof Johansson [Tue, 11 Jun 2013 07:31:14 +0000 (00:31 -0700)]
Merge tag 'renesas-soc-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
From Simon Horman:
Renesas ARM-based SoC updates for v3.11
* Increased clock coverage for r8a7740, r8a73a4, r8a7778 and r8a7790
* Use fixed clock ratio for r8a7778
* Always use shmobile_setup_delay for sh73a0
* Add add CPUFreq support for sh73a0
* Check kick bit before changing rate on sh73a0
* Do not overwrite all div4 clock operations on sh73a0
* Cleanup SH_FIXED_RATIO_CLK and SH_FIXED_RATIO_CLK macros
* sh73a0: Use DEFINE_RES_MEM*() everywhere
* r8a7740: Make private clock arrays static
* r8a7778: Correct model number
The last four changes listed above are cleanups. I have included them
in this series as all bar the last one are dependencies of non-cleanup
patches.
* tag 'renesas-soc-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (27 commits)
ARM: shmobile: sh73a0: div4 clocks must check the kick bit before changing rate
ARM: shmobile: sh73a0: do not overwrite all div4 clock operations
ARM: shmobile: sh73a0: Always use shmobile_setup_delay()
ARM: shmobile: sh73a0: add CPUFreq support
ARM: shmobile: sh73a0: add support for adjusting CPU frequency
ARM: shmobile: r8a7790: add TPU PWM support
ARM: shmobile: r8a7790: Make private clock arrays static
ARM: shmobile: r8a7790: add div6 clocks
ARM: shmobile: r8a7790: add div4 clocks
ARM: shmobile: r8a7790: add main clock
ARM: shmobile: r8a7778: Register SDHI device
ARM: shmobile: r8a7778: add SDHI clock support
ARM: shmobile: r8a7778: use fixed ratio clock
ARM: shmobile: r8a7779: Add PCIe clocks
ARM: shmobile: r8a73a4: add div6 clocks
ARM: shmobile: r8a73a4: add div4 clocks
ARM: shmobile: r8a73a4: add pll clocks
ARM: shmobile: r8a73a4: add main clock
ARM: shmobile: r8a7740: add TPU PWM support
ARM: shmobile: r8a7740: Add I2C DT clock names
...
Olof Johansson [Tue, 11 Jun 2013 07:21:46 +0000 (00:21 -0700)]
Merge tag 'renesas-pinmux-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
From Simon Horman:
Renesas ARM based SoC pinmux and GPIO update for v3.11
SH-PFC:
* Entries for INTC external IRQs
* Remove dependency on GPIOLIB
* PFC support for r8a7790 SoC
* Pinmux support for r8a7778 SoC
* Increase pin group and function coverage for sh7372, r8a7740,
r8a7778, r8a7779 and r8a7790 SoCs
* Use pinctrl mapping on mackerel, ap4evb, armadillo800eva,
bonito, bockw, lager boards
* Use RCAR_GP_PIN macro in marzen board
* Remove unused GPIOs for sh7372, sh73a0, r8a7740 and r8a7790 SoCs
* Add bias (pull-up/down) pinconf support for r8a7740 SoC
* Add VCCQ support for sh73a0
GPIO car:
* Add RCAR_GP_PIN macro
* Add support for IRQ_TYPE_EDGE_BOTH
* Make the platform data gpio_base field signed
The GPIO changes have been included as the RCAR_GP_PIN and
IRQ_TYPE_EDGE_BOTH changes are depended on by SH-PFC changes.
* tag 'renesas-pinmux-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (132 commits)
ARM: shmobile: marzen: Use RCAR_GP_PIN macro
ARM: shmobile: lager: Initialize pinmux
ARM: shmobile: bockw: add pinctrl support
ARM: shmobile: kzm9g: tidyup FSI pinctrl
ARM: shmobile: r8a7740 pinmux platform device cleanup
ARM: shmobile: r8a7790: Configure R-Car GPIO for IRQ_TYPE_EDGE_BOTH
pinctrl: sh-pfc: r8a7779: Fix missing MOD_SEL2 entry
Revert "ARM: shmobile: Disallow PINCTRL without GPIOLIB"
pinctrl: r8a7790: add pinmux data for MMCIF and SDHI interfaces
sh-pfc: r8a7778: add MMCIF pin groups
sh-pfc: r8a7778: add HSPI pin groups
sh-pfc: r8a7778: add I2C pin groups
pinctrl: sh-pfc: fix a typo in pfc-r8a7790
pinctrl: sh-pfc: fix r8a7790 Function Select register tables
sh-pfc: r8a7778: fixup IRQ1A settings
sh-pfc: r8a7779: add Ether pin groups
sh-pfc: r8a7778: add Ether pin groups
sh-pfc: r8a7778: add VIN pin groups
sh-pfc: sh73a0: Remove function GPIOs
sh-pfc: r8a7790: Add TPU pin groups and functions
...
Haojian Zhuang [Fri, 7 Jun 2013 03:17:07 +0000 (11:17 +0800)]
ARM: prima2: fix incorrect panic usage
In prima2, some functions of checking DT is registered in initcall
level. If it doesn't match the compatible name of sirf, kernel
will panic. It blocks the usage of multiplatform on other verndor.
The error message is in below.
Knic - not syncing: unable to find compatible pwrc node in dtb
CPU: 0 PID: 1 Comm: swapper/0 Not tainted 3.10.0-rc3-00006-gd7f26ea-dirty #86
[<c0013adc>] (unwind_backtrace+0x0/0xf8) from [<c0011430>] (show_stack+0x10/0x1)
[<c0011430>] (show_stack+0x10/0x14) from [<c026f724>] (panic+0x90/0x1e8)
[<c026f724>] (panic+0x90/0x1e8) from [<c03267fc>] (sirfsoc_of_pwrc_init+0x24/0x)
[<c03267fc>] (sirfsoc_of_pwrc_init+0x24/0x58) from [<c0320864>] (do_one_initcal)
[<c0320864>] (do_one_initcall+0x90/0x150) from [<c0320a20>] (kernel_init_freeab)
[<c0320a20>] (kernel_init_freeable+0xfc/0x1c4) from [<c026b9e8>] (kernel_init+0)
[<c026b9e8>] (kernel_init+0x8/0xe4) from [<c000e158>] (ret_from_fork+0x14/0x3c)
Signen-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Tue, 11 Jun 2013 05:13:52 +0000 (22:13 -0700)]
Merge tag 'renesas-dt-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
From Simon Horman:
Renesas ARM-based SoC DT updates for v3.11
* Armadillo800eva reference DT - bring up armadillo800eva baord
using DT as much as possible
* Remove unused GIC dtsi entries for r8a7790 and r8a73a4
* Add AS3711 and CPUFreq DT bindings for kzm9g-reference
* Add irqpin DT support for marzen-reference
* tag 'renesas-dt-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: marzen-reference: add irqpin support in DT
ARM: shmobile: kzm9g-reference: add AS3711 and CPUFreq DT bindings
ARM: shmobile: armadillo800eva: Reference DT implementation
ARM: shmobile: Remove unused r8a7790 GIC CPU interface DT bits
ARM: shmobile: Remove unused r8a73a4 GIC CPU interface DT bits
ARM: shmobile: r8a7740: Prepare for reference DT setup
ARM: shmobile: r8a7740: Add OF support to initialze the GIC
* tag 'renesas-defconfig-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: kzm9g: enable AS3711 PMIC in defconfig
ARM: shmobile: bockw: enable USB in defconfig
ARM: shmobile: bockw: enable CONFIG_PM_RUNTIME in defconfig
ARM: shmobile: bockw: enable I2C in defconfig
ARM: shmobile: bockw: enable SDHI on defconfig
ARM: shmobile: armadillo800eva: Fix maximum number of SCIF
Olof Johansson [Tue, 11 Jun 2013 04:42:48 +0000 (21:42 -0700)]
Merge branch 'next/dt' into for-next
* next/dt:
ARM: Kirkwood add cpus definition needed by cpufreq driver to dtsi
ARM: kirkwood: add i2c-gpio controller for km_kirkwood
ARM: kirkwood: refactor dtsi to largest common nodes
Signed-off-by: Olof Johansson <olof@lixom.net>
Conflicts:
arch/arm/boot/dts/kirkwood-6281.dtsi
Olof Johansson [Tue, 11 Jun 2013 04:39:37 +0000 (21:39 -0700)]
Merge tag 'dt-3.11-4' of git://git.infradead.org/users/jcooper/linux into next/dt
From Jason Cooper:
mvebu dt changes for v3.11 (round 4)
- kirkwood
- reshuffle nodes from kirkwood.dtsi to -6281.dtsi, etc
- add i2c-gpio for km_kirkwood
- add cpu node so pending cpufreq driver will init
* tag 'dt-3.11-4' of git://git.infradead.org/users/jcooper/linux:
ARM: Kirkwood add cpus definition needed by cpufreq driver to dtsi
ARM: kirkwood: add i2c-gpio controller for km_kirkwood
ARM: kirkwood: refactor dtsi to largest common nodes
Arnd Bergmann [Mon, 10 Jun 2013 14:48:36 +0000 (16:48 +0200)]
ARM: dts: add missing cpu #address-cell values
A recent series has added CPU numbers to a lot of dts files,
but unfortunately in a few cases the #address-cells
and #size-cells values are missing, which causes build warnings.
This adds the missing ones for sunxi and sama5 that I found
through build testing.
Signed-off-by: Arnd Bergmann <arnd@arndb.de> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Olof Johansson [Sun, 9 Jun 2013 05:31:06 +0000 (22:31 -0700)]
Merge branch 'next/fixes-non-critical' into for-next
* next/fixes-non-critical:
arm: prima2: use of_platform_populate instead of of_platform_bus_probe
ARM: prima2: fix a checkpatch issue
ARM: prima2: Replace include linux/module.h with linux/export.h
Olof Johansson [Sun, 9 Jun 2013 05:30:28 +0000 (22:30 -0700)]
Merge tag 'sirf-arm-soc-v3.10-fixes' of git://gitorious.org/sirfprima2-kernel/sirfprima2-kernel into next/fixes-non-critical
From Barry Song, SiRF fixes for v3.10 (that we're punting to 3.11):
- Replace include linux/module.h with linux/export.h
- fix a checkpatch issue
- use of_platform_populate instead of of_platform_bus_probe
* tag 'sirf-arm-soc-v3.10-fixes' of git://gitorious.org/sirfprima2-kernel/sirfprima2-kernel:
arm: prima2: use of_platform_populate instead of of_platform_bus_probe
ARM: prima2: fix a checkpatch issue
ARM: prima2: Replace include linux/module.h with linux/export.h
+ Linux 3.10-rc4
Olof Johansson [Sat, 8 Jun 2013 01:20:26 +0000 (18:20 -0700)]
Merge branch 'fixes' into for-next
* fixes:
ARM: exynos: add debug_ll_io_init() call in exynos_init_io()
ARM: EXYNOS: uncompress - print debug messages if DEBUG_LL is defined
ARM: shmobile: sh73a0: Update CMT clockevent rating to 80
sh-pfc: r8a7779: Don't group USB OVC and PENC pins
ARM: mxs: icoll: Fix interrupts gpio bank 0
ARM: imx: clk-imx6q: AXI clock select index is incorrect
ARM: dts: imx: fix clocks for cspi
ARM i.MX6q: fix for ldb_di_sels
Olof Johansson [Sat, 8 Jun 2013 01:19:30 +0000 (18:19 -0700)]
Merge tag 'mxs-fixes-3.10' of git://git.linaro.org/people/shawnguo/linux-2.6 into fixes
From Shawn Guo, mxs fixes for 3.10:
- Since the time we move to MULTI_IRQ_HANDLER, the 0x7f polling for no
interrupt in icoll_handle_irq() becomes insane, because 0x7f is an
valid interrupt number, the irq of gpio bank 0. That unnecessary
polling results in the driver not detecting when irq 0x7f is active
which makes the machine effectively dead lock. The fix removes the
interrupt poll loop and allows usage of gpio0 interrupt without an
infinite loop.
* tag 'mxs-fixes-3.10' of git://git.linaro.org/people/shawnguo/linux-2.6:
ARM: mxs: icoll: Fix interrupts gpio bank 0
Olof Johansson [Sat, 8 Jun 2013 01:18:08 +0000 (18:18 -0700)]
Merge tag 'imx-fixes-3.10-2' of git://git.linaro.org/people/shawnguo/linux-2.6 into fixes
From Shawn Guo, imx fixes for 3.10, take 2:
- One device tree fix for all spi node to have per clock added.
The clock is needed by spi driver to calculate bit rate divisor.
The spi node in the current device trees either does not have the
clock or is defined as dummy clock, in which case the driver probe
will fail or spi will run at a wrong bit rate.
- Two imx6q clock fixes, which correct axi_sels and ldb_di_sels.
* tag 'imx-fixes-3.10-2' of git://git.linaro.org/people/shawnguo/linux-2.6:
ARM: imx: clk-imx6q: AXI clock select index is incorrect
ARM: dts: imx: fix clocks for cspi
ARM i.MX6q: fix for ldb_di_sels
Doug Anderson [Wed, 5 Jun 2013 20:56:33 +0000 (13:56 -0700)]
ARM: exynos: add debug_ll_io_init() call in exynos_init_io()
If the early MMU mapping of the UART happens to get booted out of the
TLB between the start of paging_init() and when we finally re-add the
UART at the very end of s3c_init_cpu(), we'll get a hang at bootup if
we've got early_printk enabled. Avoid this hang by calling
debug_ll_io_init() early.
Without this patch, you can reliably reproduce a hang when early
printk is enabled by adding flush_tlb_all() at the start of
exynos_init_io(). After this patch the hang goes away.
Signed-off-by: Doug Anderson <dianders@chromium.org> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Sat, 8 Jun 2013 01:10:42 +0000 (18:10 -0700)]
Merge tag 'renesas-fixes-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into fixes
From Simon Horman, Renesas ARM based SoC fixes for v3.10:
- Correction to USB OVC and PENC pin groupings on r8a7779 SoC.
This avoids conflicts when the USB_OVCn pins are used by another function.
This has been observed to be a problem in v3.10-rc1.
- Update CMT clock rating for sh73a0 SoC to resolve boot failure
on kzm9g-reference. This resolves a regression between v3.9 and v3.10-rc1.
* tag 'renesas-fixes-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: sh73a0: Update CMT clockevent rating to 80
sh-pfc: r8a7779: Don't group USB OVC and PENC pins
Tushar Behera [Tue, 4 Jun 2013 04:19:10 +0000 (09:49 +0530)]
ARM: EXYNOS: uncompress - print debug messages if DEBUG_LL is defined
Printing low-level debug messages make an assumption that the specified
UART port has been preconfigured by the bootloader. Incorrectly
specified UART port results in system getting stalled while printing the
message "Uncompressing Linux... done, booting the kernel"
This UART port number is specified through S3C_LOWLEVEL_UART_PORT. Since
the UART port might different for different board, it is not possible to
specify it correctly for every board that use a common defconfig file.
Calling this print subroutine only when DEBUG_LL fixes the problem. By
disabling DEBUG_LL in default config file, we would be able to boot
multiple boards with different default UART ports.
With this current approach, we miss the print "Uncompressing Linux...
done, booting the kernel." when DEBUG_LL is not defined.
Signed-off-by: Tushar Behera <tushar.behera@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Sat, 8 Jun 2013 00:51:39 +0000 (17:51 -0700)]
Merge tag 'vt8500/dts-3.11' of git://github.com/linux-wmt/linux-vtwm into next/dt
From Tony Prisk, vt8500 devicetree updates for 3.11.
* tag 'vt8500/dts-3.11' of git://github.com/linux-wmt/linux-vtwm:
dts: vt8500: Correct reference clock on WM8850 SoCs
dts: vt8500: Add ARM, AHB, APB and DDR clock nodes to SoC files
dts: vt8500: Populate missing PLL nodes
dts: clk: vt8500: Update SoC dtsi to use WM8850 PLL clocks
dts: vt8500: Update serial nodes and disable by default in SoC files
dts: vt8500: Add devicetree support for WM8750 SoC and APC8750 board
dts: vt8500: Fix invalid/missing cpu nodes for soc files.
Tony Lindgren [Fri, 7 Jun 2013 22:06:18 +0000 (15:06 -0700)]
Merge tag 'omap-fixes-b-for-3.10-rc' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v3.10/fixes
More OMAP hwmod and clock fixes for v3.10-rc. Fixes the AM33xx UART2.
Also fixes some CCF-related breakage on OMAP36xx/37xx, affecting DSS
at the very least.
ARM: shmobile: sh73a0: div4 clocks must check the kick bit before changing rate
According to the datasheet, it is not allowed to change div4 clock rates
if an earlier rate change operation is still in progress, as indicated by
a set kick bit.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
ARM: shmobile: sh73a0: do not overwrite all div4 clock operations
An earlier commit "ARM: shmobile: sh73a0: add support for adjusting CPU
frequency" intended to replace some clock operations only for the Z-clock,
instead it replaced them for all div4 clocks, since all div4 clocks share
the same copy of clock operations. Fix this by using a separate clock
operations structure for Z-clock.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Wed, 22 May 2013 06:04:14 +0000 (15:04 +0900)]
ARM: shmobile: sh73a0: Always use shmobile_setup_delay()
Break out the function sh73a0_init_delay() that now
gets called both for the C version of the code and
the DT -reference boards. This way we handle both
cases in the same way.
Allows us to boot with TWD only in the kernel configuration
for C board code. TWD is not yet enabled in the case of
DT -reference - this due to a dependency on CCF.
Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch enables the use of the generic cpufreq-cpu0 driver on sh73a0.
Providing a regulator, a list of OPPs in DT, combined with a virtual
cpufreq-cpu0 platform device and a clock, attached to it is everything,
the cpufreq-cpu0 driver needs. The first sh73a0 platform, implementing
such CPUFreq support is kzm9g-reference.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
ARM: shmobile: sh73a0: add support for adjusting CPU frequency
On SH73A0 the output of PLL0 is supplied to two dividers, feeding clock to
the CPU core and SGX. Lower CPU frequencies allow the use of lower supply
voltages and thus reduce power consumption.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
ARM: shmobile: r8a7790: Make private clock arrays static
Both clock-r8a7740.c and clock-r8a7790.c define a div4_clks array as
non-static. Compiling support for both SoCs thus result in a symbol
redefinition. Fix it by defining the arrays as static.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Almost all clock needs main clock which is basis clock on r8a7790.
This patch adds it, and, set its parent/ratio via MD pin.
It is based on v0.05 datasheet
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
R-Car M1 has many clocks, and it is possible to
read/use clock ratio of these clocks from FRQMRx.
But, these ratio are fixed value and
these are decided by MD pin status.
This patch reads MD pin status,
and used fixed ratio clock for other clocks.
It was tesed on bock-w board.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
ARM: omap3: clock: fix wrong container_of in clock36xx.c
omap36xx_pwrdn_clk_enable_with_hsdiv_restore expects the parent hw of
the clock to be a clk_hw_omap. However, looking at cclock3xxx_data.c,
all concerned clock have parent defined as clk_divider. Fix the
function to use clk_divider. Tested with 3.9 on dm3730.
Signed-off-by: Jean-Philippe François <jp.francois@cynove.com> Cc: NeilBrown <neilb@suse.de> Cc: Mike Turquette <mturquette@linaro.org> Signed-off-by: Paul Walmsley <paul@pwsan.com>
Simon Horman [Tue, 23 Apr 2013 02:27:15 +0000 (02:27 +0000)]
ARM: shmobile: sh73a0: Use DEFINE_RES_MEM*() everywhere
Convert code to use DEFINE_RES_MEM*() macros.
These macros were already used in this file,
this change makes their usage consistent throughout the file.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
ARM: shmobile: r8a7740: Make private clock arrays static
Both clock-r8a7740.c and clock-r8a7790.c define a div4_clks array as
non-static. Compiling support for both SoCs thus result in a symbol
redefinition. Fix it by defining the arrays as static.
To avoid further similar issues, also define the main_clks as static.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Bastian Hecht [Wed, 8 May 2013 13:20:04 +0000 (15:20 +0200)]
irqchip: Add irqchip_init dummy function
We add an empty irqchip_init dummy function for cases in which
CONFIG_IRQCHIP is not used. In these cases irqchip.c is not compiled,
but a funtion call may still be present in architecture code, that in
runtime doesn't get hit.
E.g. this is needed in the arch/arm/mach-shmobile/intc-r8a7740.c
interrupt setup code where OF use and non OF us is both handled in one
file.
Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
[horms+renesas@verge.net.au: Make non-CONFIG_IRQCHIP version static inline
and remove trailing ';'.] Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Simon Horman [Mon, 13 May 2013 08:53:52 +0000 (17:53 +0900)]
ARM: shmobile: r8a7790: Configure R-Car GPIO for IRQ_TYPE_EDGE_BOTH
"gpio-rcar: Support IRQ_TYPE_EDGE_BOTH" adds support to the R-Car GPIO
driver for IRQ_TYPE_EDGE_BOTH. As hardware support for this feature is
not universal for all SoCs a flag, has_both_edge_trigger, has been
added to the platform data of the driver to allow this feature to be
enabled.
As the r8a7790 SoC hardware supports this feature enable it.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The list of functions selected by the MOD_SEL2 register was missing
an entry. This caused all entries after this to modify the MOD_SEL2
register incorrectly.
This bug showed up when selecting i2c2_c pins on the Renesas Hurricane board.
This bug has been present since pinmux support was added for the
r8a7779 SoC by 881023d28b465eb457067dc8bbca0f24d8b34279 ("sh-pfc: Add
r8a7779 pinmux support") in v3.8-rc4.
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add VIN DATA[0:8]/CLK/HSYNC/VSYNC pin groups to R8A7778 PFC driver.
While at it, add SH_PFC_MUX8() macro for 8-bit data busses.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
[Sergei: updated the copyrights, added SH_PFC_MUX8() macro for 8-bit data bus,
made use of SH_PFC_*() macros to define the pin groups.] Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The sh73a0 has an internal power gate on the VCCQ power supply for the
SDHI0 device that is controlled (for some strange reason) by a bit in a
PFC register. This feature should be exposed as a regulator.
As the same register is also used for pin control purposes there is no
way to achieve atomic read/write sequences with a separate regulator
driver. We thus need to implement the regulator here.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
projects / karo-tx-linux.git / log