drm/pci: add missing variable initialization

Fixed build warning as below:

drivers/gpu/drm/drm_pci.c: In function 'drm_pcie_get_speed_cap_mask':
drivers/gpu/drm/drm_pci.c:496:9: warning: 'lnkcap' may be used uninitialized in this function [-Wuninitialized]
drivers/gpu/drm/drm_pci.c:497:10: warning: 'lnkcap2' may be used uninitialized in this function [-Wuninitialized]

Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/nouveau/device: Remove duplicate inclusion of core/device.h

core/device.h was included twice.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau: remove duplicate inclusion of nouveau_ttm.h

nouveau_ttm.h was included twice.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo: trigger engine context unload before zeroing context pointer

Fixes a PCE0 page fault noticed on NVD9 during module unload.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau: prevent log mangling

On 3.7-rc6, add missing newline to to prevent the following kernel log
line getting appended to the current one after switching the integrated
GPU and suspending the discrete GPU.

Signed-off-by: Daniel J Blueman <daniel@quora.org>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau: unpin various bo's before destroying

These objects leak VRAM - but only on module unload.

Signed-off-by: Marcin Slusarz <marcin.slusarz@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau: unpin pushbuffer bo before destroying it

Fixes GART leak (as accounted by nouveau_drm.gem.gart_available).

Signed-off-by: Marcin Slusarz <marcin.slusarz@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau: remove misleading comment from nouveau_prime_new

Copy/pasted from nouveau_gem_new.

Signed-off-by: Marcin Slusarz <marcin.slusarz@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau: raise reporting levels of some messages

Signed-off-by: Marcin Slusarz <marcin.slusarz@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/core: fix the assumption that NVDEV_XXXX is always under 32

It fixes a bug that would have been introduced when adding more
sudevs/engines.

Signed-off-by: Martin Peres <martin.peres@labri.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/ppp: remove nouveau_ppp base class

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

nve0/ppp: enable support via nvc0's implementation

NVIDIA also appear to use the same class on Fermi/Kepler for PPP.

Will allow use of the engine if firmware (nvXX_fuc086) provided.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

nvc0/ppp: initial implementation of engine

Will allow use of the engine if firmware (nvXX_fuc086) provided.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

nvc0/vp: initial implementation of engine

Will allow use of the engine if firmware (nvXX_fuc085) provided.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

nvc0/bsp: initial implementation of engine

Will allow use of the engine if firmware (nvXX_fuc084) provided.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/vdec: remove nouveau_{bsp,vp} base classes, use nouveau_engine directly

Later chipsets use falcon anyway, and I can't currently see a good need
for a shared base class.

PPP will get the same treatment once Maarten's patches are merged.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nve0/fifo: allow for future binding of ppp contexts

No support for the class yet, but will be pulled in with Maarten's Fermi
vdec patches.  The Kepler PPP class is identical.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nve0/vp: implement initial support for engine

Will allow use of the engine if firmware (nvXX_fuc085) provided.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nve0/bsp: implement initial support for engine

Will allow use of the engine if firmware (nvXX_fuc084) provided.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nve0: allow specification of channel engine type in abi16 call

Previously, if either vram/gart handles were specified as ~0, the ioctl
call would fail.  In order to hack engine selection into the ioctl for
kepler, we now define (fb_ctxdma_handle == ~0) to mean "engine mask is
in tt_ctxdma_handle".

This approach also allows new userspace to detect lack of support for
non-PGRAPH channels on older kernels.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/core: implement shortcut for simple engctx construction

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nvc0/copy: share interrupt handler with nva3

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nv50/fb: implement trap handler as subdev interrupt handler

nv50_fb_trap() will now be called automagically by the mc intr handler,
rather than each engine's handler having to check for traps manually.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mc: allow calling of multiple handlers for a give intr bit

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/copy: remove nouveau_copy base class

nva3/nvc0 are using falcon, nve0 is now using engine directly.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nvc0/copy: use nouveau_falcon base class

Reviewed-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nva3/copy: use nouveau_falcon base class

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nv98/crypt: use nouveau_falcon base class

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau: initial falcon (fuc) engine base class implementation

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau: convert to dev_pm_ops

This is a precursor to dynamic power management support for nouveau,

we need to use pm ops for that, so first convert the driver to using pm ops
interfaces.

Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau: Add interface to detect optimus and v1 support

This is required to decide if we can auto-powerdown and how to implement it.

Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/disp: add support for 10bpc over DisplayPort

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau: rename nvd0_display to nv50_display to reflect reality since merge

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nv50-nvc0: switch to common disp impl, removing previous version

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nvd0/disp: implement support for colour vibrance control

Ported from original nv50 commit by Christoph, with added support for the
setting on later chipsets.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nvd0/disp: remove fetching of capabilities report

Unused, and caused a race with evo_sync().  Will revisit using it properly
later on.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nvd0/disp: enable support for older display classes

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nvd0/disp: support creation of fb dma objects on older chipsets

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nvd0/disp: implement support for older DISP_SYNC classes

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nvd0/disp: implement sor support for older display classes

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nvd0/disp: implement dac support for older display classes

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nvd0/disp: start implementing support for older display classes

Currently unused, but checkpointing the merged head handling routines.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/dp: remove last bits of VBIOS parsing from DRM code

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/dp: move core link training calls to common code

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau: remove (now obsolete) BIT U table parsing from DRM code

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nv50/disp: move remaining interrupt handling into core

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nvd0/disp: calculate U script id in supervisor interrupt

This is like we do on nv50:nvd9 already.  There's been no problems seen
yet with using this *seemingly* scratch register to store the value, but
we won't be able to do this anymore once nv50's code is merged.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nv84/disp: move hdmi control into core

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nva3/disp: move hda codec handling to core

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nv50/disp: move dp link training helpers into core

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nv50/disp: call into core for dac load detection

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nv50/disp: call into core to handle dac/sor power state changes

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nv50/disp: allocate display from driver core

EVO channels still handled "manually", this won't be ported here, and
will instead be held off until nv50_display/nvd0_display are merged.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/bios: implement some dcb output entry parsing/matching functions

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nvd0/disp: handle DP transfer unit setup from second supervisor interrupt

This is what we've done forever in nv50_display.c, and also allows the
last direct MMIO accesses to be removed from nvd0_display.c.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nvd0/disp: move HDMI control to core

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nvd0/disp: move HDA codec setup to core

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nvd0/disp: call into core to handle dac power state changes

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nvd0/disp: call into core to handle sor power state changes

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nvd0/disp: move link training helpers into core as display methods

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/core: allow representing method ranges in nouveau_omthds

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/core: expose full method calling capabilities with nv_exec

nv_call() just allows mthd+u32 submission, nv_exec() exposes the
mthd+data+size interface which will be used in future commits.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/bios: implement "full" BIT 'd' table (and subtable) parsing in core

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nvd0/disp: move remaining interrupt handling to core

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/core: add some missing subdev/engine disable flags

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/bios: implement BIT 'U' table (and subtable) parsing in core

This will, in the near future, replace what's currently in the DRM
nouveau_bios.c code.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nvd0/disp: allocate display and evo channels from driver core

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau: run mode_config destructor before destroying internal display state

Later changes will depend on being able to pull down CRTCs etc with the
master display state still intact.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/drm/nvd0/disp: display->disp

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nvd0/disp: introduce a nvd0_head as a subclass of nouveau_crtc

This will be used instead of storing a heap of per-head data (such as evo
channels) in nvd0_display in some other way.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nvd0-nve0/disp: initial implementation of evo channel classes

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nv50/disp: allow PCI_US pushbuf binding

drm/nv50/disp: initial implementation of the various channel object classes

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nv50/disp: enable interrupts and setup memory area

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nv50/disp: copy caps to evo

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nv50/disp: create skeleton display/channel object classes

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nvd0/dmaobj: initial bind() method implementation

Currently unused, and rudimentary.  Lots to figure out here still, but
this is sufficient for what disp will need.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nvc0/dmaobj: implement initial bind() method

Currently unused.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nv50/dmaobj: extend class to allow gpu-specific attributes to be defined

disp is going to need to be able to create more specific dma objects
than was previously possible.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nvd0/dmaobj: duplicate fermi class, will diverge real soon now

The hardware dmaobj format completely changed in GF119, so these will
need a separate implementation.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nvc0/dmaobj: stub bind function for now so we can call unconditionally

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/dmaobj: move parent class check to bind() method

Otherwise when nvc0- gains a bind() method (disp needs it), the fifo
engine will attempt to create a dma object for the push buffer, which
is unnecessary on fermi.

The only sane place to put these checks is in the bind method itself,
and have it unconditionally called from wherever it might be needed.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/dmaobj: merge everything except ctor and bind together

Simplifies things a little, and currently no reason to need
chipset-specific dmaobj constructors.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau: pass address to object accessor functions as u64

Will be required by future work.  Make the API change now to catch any
(but hopefully none) unexpected fallout.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gpio: place upper limit on using old-school tvdac bios data

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau: remove newline-only NV_DEBUG calls

This used to output the function name, now doesn't, so just looks
stupid.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nv50: decode PGRAPH status registers on TLB flush fail

SIgned-off-by: Marcin Slusarz <marcin.slusarz@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/clk: fix crystal frequency retrieval on nv25

Signed-off-by: Viktor Novotný <noviktor@seznam.cz>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau: remove unused variable from nouveau_bios_shadow_of

drivers/gpu/drm/nouveau/core/subdev/bios/base.c: warning: unused variable 'i'

Reported-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Marcin Slusarz <marcin.slusarz@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nv40/fb: use an actual compressed zeta format

SPLIT is apparently just that, and only splits Z and S components.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nv30/fb: enable z compression

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nv40/fb: enable z compression

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nv20/fb: fixup compression tag allocation size

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nv30-nv40/graph: poke zcomp regs from tile_prog hook

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nv30-nv40/fb: call zcomp setup hook from tiling setup

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fb: create tag heap from common code for all relevant chipsets

A nv2x bug wrt hardcoded tag counts is now also fixed as a side-effect.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nv30/fb: start bashing zcomp registers with 'disabled' (for now)

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau: replace some open-coded mm_initialised checks

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fb: read TILE_BASE after writing it to avoid a hardware race

Apparently needed for turbocache nv4x chips at least, we'll just do it
everywhere...

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nv40/fb: start bashing zcomp registers on relevant chipsets

Always bashing "disabled" for now, actual compressing coming up...

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>