Arnd Bergmann [Fri, 15 May 2015 15:27:55 +0000 (17:27 +0200)]
Merge tag 'mvebu-dt-4.2' of git://git.infradead.org/linux-mvebu into next/dt
Merge "mvebu dt changes for v4.2 (part #1)" from Gregory CLEMENT:
- A series adding support for the Compulab CM-A510
- Add alias for mdio on Armada 38x
* tag 'mvebu-dt-4.2' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: add alias for mdio on Armada 38x
ARM: dts: dove: Add Compulab SBC-A510 to Makefile
ARM: dts: dove: Add proper support for Compulab CM-A510/SBC-A510
ARM: dts: dove: Remove Compulab CM-A510 from Makefile
ARM: dts: dove: Add internal i2c multiplexer node
Arnd Bergmann [Fri, 15 May 2015 15:26:31 +0000 (17:26 +0200)]
Merge tag 'sti-dt-for-v4.2-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mcoquelin/sti into next/dt
Merge "STi DT updates for v4.2, round 2." from Maxime Coquelin:
Highlights:
-----------
- Add USB3 support to STiH410 & STiH418
- Add PWM support to STiH416 & STiH407 family
- Add restart support to STiH416 & STiH407 family
- Add PMU support to STiH416 & STiH407 family
- Reorder includes in STiH407 DT files
* tag 'sti-dt-for-v4.2-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mcoquelin/sti:
ARM: STi: DT: STih407: Re-order #include <*.dtsi> files
ARM: STi: Ensure requested STi's SysCfg Controlled IRQs are enabled at boot
ARM: STi: STiH407: Enable PMU IRQs
ARM: STi: STiH407: Enable Cortex-A9 PMU support
ARM: STi: STiH416: Enable PMU IRQs
ARM: STi: STiH416: Enable Cortex-A9 PMU support
ARM: STi: STiH416: Add Restart support for STiH416
ARM: STi: STiH407: Add Restart support for STiH407
ARM: STi: STiH416-b2020e: Enable PWM on the B2020 Rev-E
ARM: STi: STiH416: Add DT nodes for PWM
ARM: STi: STiH416: Add Pinctrl settings for PWM
ARM: STi: STiH407: Add DT nodes for for PWM
ARM: DT: STi: STiH418: Enable USB3 port on stih418-b2199.
ARM: DT: STi: STiH418: Add miphy28lp optional oscillator clock properties
ARM: DT: STi: stihxxx-b2120: Enable USB3 port on stih407-b2120 and stih410-b2120
ARM: DT: STi: STiH407: Add dwc3 usb3 DT node.
ARM: DT: STi: STiH407: Update picophyreset for the usb3 controllers usb2 phy
Arnd Bergmann [Fri, 15 May 2015 15:23:29 +0000 (17:23 +0200)]
Merge tag 'rpi-dt-for-armsoc-v4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/rpi/linux-rpi into next/dt
Merge "RaspberryPi Device Tree changes due for v4.2" from Lee Jones:
* tag 'rpi-dt-for-armsoc-v4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/rpi/linux-rpi:
ARM: bcm2835: dt: Use 0x4 prefix for DMA bus addresses to SDRAM.
ARM: bcm2835: dt: Add the mailbox to the device tree
ARM: bcm2835: dt: Fix i2c0 node name
ARM: bcm2835: dt: Use pinctrl header
ARM: bcm2835: dt: Add header file for pinctrl constants
ARM: bcm2835: dt: Add root properties for Raspberry Pi
ARM: bcm2835: dt: Add vendor prefix for Raspberry Pi
Linus Walleij [Thu, 14 May 2015 09:22:34 +0000 (11:22 +0200)]
ARM: ux500: add SCU and WD to device tree
The Ux500 like other Cortex-A9 SoC's has a Snoop Control
Unit (SCU) and a Watchdog in the same address range as
the local timers. Add these to the SoC device tree.
Arnd Bergmann [Fri, 15 May 2015 15:21:10 +0000 (17:21 +0200)]
Merge tag 'renesas-dt-for-v4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Merge "Renesas ARM Based SoC DT Updates for v4.2" from Simon Horman:
* Enable DMA for HSUSB on r8a7790 and r8a7791 SoCs
* Configure the HOME key as wake-up source on kzm9g board
* Use generic names for device nodes on SH Mobile SoCs and boards
* Add "nor-jedec" compatible value to SH Mobile boards
* Add IRQC clock to r8a73a4, r8a779* SoCs
* Remove MSIOF address from r8a7790 and r8a7791 SoCs
* tag 'renesas-dt-for-v4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (31 commits)
ARM: shmobile: r8a7791: Enable DMA for HSUSB
ARM: shmobile: r8a7791: add USB-DMAC device nodes
ARM: shmobile: r8a7790: Enable DMA for HSUSB
ARM: shmobile: r8a7790: add USB-DMAC device nodes
ARM: shmobile: kzm9g dts: Configure the HOME key as wake-up source
ARM: shmobile: koelsch dts: Use generic names for device nodes
ARM: shmobile: lager dts: Use generic names for device nodes
ARM: shmobile: bockw dts: Use generic names for device nodes
ARM: shmobile: koelsch dts: Add "nor-jedec" compatible value
ARM: shmobile: bockw dts: Add "nor-jedec" compatible value
ARM: shmobile: lager dts: Add "nor-jedec" compatible value
ARM: shmobile: bockw-reference dts: Add "nor-jedec" compatible value
ARM: shmobile: henninger dts: Add "nor-jedec" compatible value
ARM: shmobile: armadillo800eva dts: Use generic names for device nodes
ARM: shmobile: marzen dts: Use generic names for device nodes
ARM: shmobile: kzm9d dts: Use generic names for device nodes
ARM: shmobile: ape6evm dts: Use generic names for device nodes
ARM: shmobile: sh73a0 dtsi: Use generic names for device nodes
ARM: shmobile: r8a7791 dtsi: Use generic names for device nodes
ARM: shmobile: r8a7790 dtsi: Use generic names for device nodes
...
Arnd Bergmann [Fri, 15 May 2015 15:17:24 +0000 (17:17 +0200)]
Merge tag 'arm-soc/for-4.2/dts' of http://github.com/broadcom/stblinux into next/dt
Merge "Device Tree changes" from Florian Fainelli:
New devices:
- Felix adds support for the Buffalo WXR-1900DHP and adds the USB led on Buffalo
WZR-1750DHP
- Rafal adds support for the SmartRG SR400ac, Asus RT-AC68U and RT-AC56U
New peripheral support:
- Brian adds Device Tree nodes for the Broadcom NAND controller found on
BCM7xxx, BCM63138 and Cygnus SoCs
- Brian adds Device Tree nodes for the SATA AHCI and PHY controller found on
BCM7xxx
- I add the Device Tree nodes and bindings documents for bringing-up secondary
CPUs and timer/syscon-reboot on BCM63138
* tag 'arm-soc/for-4.2/dts' of http://github.com/broadcom/stblinux:
ARM: BCM5301X: Add DT for Asus RT-AC56U
ARM: BCM5301X: Add DT for Asus RT-AC68U
ARM: dts: BCM63xx: Add timer and syscon-reboot nodes
dt-bindings: Add documentation for the BCM63138 timer and syscon-reboot
ARM: dts: brcmstb: add nodes for SATA controller and PHY
ARM: dts: cygnus: Enable NAND support for Cygnus
ARM: bcm63138: add NAND DT support
ARM: bcm7445: add NAND to DTS
ARM: BCM5301X: Add DT for SmartRG SR400ac
ARM: BCM5301X: Add DT for Buffalo WXR-1900DHP
ARM: BCM5301X: Add USB LED for Buffalo WZR-1750DHP
ARM: dts: BCM63xx: Add SMP nodes and required properties
Documentation: DT: Document SMP DT nodes and properties for BCM63138
ARM: dts: BCM63xx: Add PMB busses nodes
Documentation: DT: Add Broadcom BCM63138 PMB binding
This patch fixes a regression where serial is enabled by the first
(board) DTSI, then disabled by the second (SoC) file. To enable
serial and keep it enabled, we need to include the file which enables
it last.
Reported-by: LAVA [via Peter Griffin <peter.griffin@linaro.org>] Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Eric Anholt [Tue, 5 May 2015 20:10:11 +0000 (13:10 -0700)]
ARM: bcm2835: dt: Use 0x4 prefix for DMA bus addresses to SDRAM.
There exists a tiny MMU, configurable only by the VC (running the
closed firmware), which maps from the ARM's physical addresses to bus
addresses. These bus addresses determine the caching behavior in the
VC's L1/L2 (note: separate from the ARM's L1/L2) according to the top
2 bits. The bits in the bus address mean:
From the VideoCore processor:
0x0... L1 and L2 cache allocating and coherent
0x4... L1 non-allocating, but coherent. L2 allocating and coherent
0x8... L1 non-allocating, but coherent. L2 non-allocating, but coherent
0xc... SDRAM alias. Cache is bypassed. Not L1 or L2 allocating or coherent
From the GPU peripherals (note: all peripherals bypass the L1
cache. The ARM will see this view once through the VC MMU):
0x0... Do not use
0x4... L1 non-allocating, and incoherent. L2 allocating and coherent.
0x8... L1 non-allocating, and incoherent. L2 non-allocating, but coherent
0xc... SDRAM alias. Cache is bypassed. Not L1 or L2 allocating or coherent
The 2835 firmware always configures the MMU to turn ARM physical
addresses with 0x0 top bits to 0x4, meaning present in L2 but
incoherent with L1. However, any bus addresses we were generating in
the kernel to be passed to a device had 0x0 bits. That would be a
reserved (possibly totally incoherent) value if sent to a GPU
peripheral like USB, or L1 allocating if sent to the VC (like a
firmware property request). By setting dma-ranges, all of the devices
below it get a dev->dma_pfn_offset, so that dma_alloc_coherent() and
friends return addresses with 0x4 bits and avoid cache incoherency.
This matches the behavior in the downstream 2708 kernel (see
BUS_OFFSET in arch/arm/mach-bcm2708/include/mach/memory.h).
Signed-off-by: Eric Anholt <eric@anholt.net> Tested-by: Noralf Trønnes <noralf@tronnes.org> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
Eric Anholt [Tue, 5 May 2015 20:27:46 +0000 (13:27 -0700)]
ARM: bcm2835: dt: Add the mailbox to the device tree
Signed-off-by: Eric Anholt <eric@anholt.net> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
Baruch Siach [Wed, 18 Mar 2015 09:00:22 +0000 (11:00 +0200)]
ARM: bcm2835: dt: Fix i2c0 node name
Device tree node names should contain the node's reg property address value.
The i2c0 node was apparently forgotten in commit 25b2f1bd0b7e0 (ARM: bcm2835:
node name unit address cleanup).
Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Lee Jones <lee.jones@linaro.org>
Stefan Wahren [Thu, 29 Jan 2015 18:10:50 +0000 (18:10 +0000)]
ARM: bcm2835: dt: Use pinctrl header
This patch converts all bcm2835 dts and dtsi files to use the pinctrl
header file.
Reviewed-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
Stefan Wahren [Thu, 29 Jan 2015 18:10:49 +0000 (18:10 +0000)]
ARM: bcm2835: dt: Add header file for pinctrl constants
This new header file defines pincontrol constants to use
from bcm2835 DTS files for pincontrol properties option.
Reviewed-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
Stefan Wahren [Thu, 29 Jan 2015 18:10:48 +0000 (18:10 +0000)]
ARM: bcm2835: dt: Add root properties for Raspberry Pi
This patch adds root compatible properties for the following boards:
- Raspberry Pi Model A
- Raspberry Pi Model A+
- Raspberry Pi Model B
- Raspberry Pi Model B (no P5)
- Raspberry Pi Model B rev2
- Raspberry Pi Model B+
- Raspberry Pi Compute Module
Reviewed-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
Stefan Wahren [Thu, 29 Jan 2015 18:10:47 +0000 (18:10 +0000)]
ARM: bcm2835: dt: Add vendor prefix for Raspberry Pi
Since the prefix is already in use, we need to add it in the
vendor list.
Reviewed-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
ARM: dts: BCM63xx: Add SMP nodes and required properties
Update bcm63138.dtsi with the following:
- enable-method for both CPU nodes
- brcm,bcm63138-bootlut node
- resets properties to point to the correct PMB controller to release
the secondary CPU from reset
Add a Device Tree binding for the Broadcom BCM63138 Processor Monitor
Bus, which is an internal bus used to access different power and reset
signals within a BCM63138 System-on-a-Chip.
Arnd Bergmann [Wed, 13 May 2015 16:02:49 +0000 (18:02 +0200)]
Merge tag 'tegra-for-4.2-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt
Merge "ARM: tegra: Devicetree changes for v4.2-rc1" from Thierry Reding:
Contains a couple of fixes and additions to device tree files. The most
notable change is a fix for a misapplied patch that was only exposed by
a recent change in the regulator subsystem that caused USB to break on
Tegra124 recently.
Other than that there are a more or less random assortment of additions
to enable various features on a couple of boards.
* tag 'tegra-for-4.2-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Fix hda2codec_2x clock and reset names
ARM: tegra: Add Tegra30 HDA support
ARM: tegra: Cardhu device-tree comment spelling fix
ARM: tegra: venice2: Set min-/max-microvolt for VDD_LED supply
ARM: tegra: venice2: Mark eMMC as non-removable
ARM: tegra: jetson-tk1: Enable HDA support
ARM: tegra: Add missing HDMI +5V regulator
ARM: tegra: cardhu: Add power and volume keys
ARM: tegra: Correct which USB controller has the UTMI pad registers
Arnd Bergmann [Wed, 13 May 2015 15:41:54 +0000 (17:41 +0200)]
Merge tag 'v4.2-rockchip-dts1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
Merge "ARM: rockchip: dts changes for 4.2" from Heiko Stuebner:
Some misc improvements defining additional supply regulators, enabling
the Cortex-A12 HW PMU on the rk3288 and the tsadc on some more rk3288
boards, as well as some usb properties and marking the radxarock pmic
as system-power-controller.
* tag 'v4.2-rockchip-dts1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: add system-power-controller to act8846 on radxarock
ARM: dts: rockchip: add properties for dwc2 usb otg controller
ARM: dts: rockchip: enable tsadc on rk3288 boards
ARM: dts: rockchip: add act8846 supplies on rk3288-firefly
ARM: dts: rockchip: Specify VMMC and VQMMC on rk3288-evb
ARM: dts: rockchip: Enable Cortex-A12 HW PMU events on rk3288
The ST sensors on the Ux500 boards were not utilizing the IRQs
for data ready sample triggers. Enable this by assigning the
right GPIO lines and interrupt lines (when the GPIO lines are
used for IRQs) to the accelerometer, gyro and magnetometer
sensors.
The magnetometer found on the Ux500 TVK and Snowball boards
is a LSM303DLH not a LSM303DLM, small differences but still
different. Put in the right compatible strings and things start
working smoothly.
This registers all the CoreSight blocks on the DB8500 SoC:
each core has a PTM (v1.0, r1p0-00rel0) connected, both connected
to a funnel (DK-TM908-r0p1-00rel0) which in turn connects to a
replicator (DM-TM909-r0p1-00rel0). The replicator has two outputs,
port 0 to a TPIU interface and port 1 to an ETB
(DK-TM907-r0p3-00rel0). The CoreSight blocks are all clocked by
the APEATCLK from the PRCMU and their AHB interconnect is clocked
from a separate clock called APETRACECLK.
The SoC also has a CTI/CTM block which can be added later as we
have upstream support in the CoreSight subsystem.
Lee Jones [Tue, 12 May 2015 12:51:00 +0000 (14:51 +0200)]
ARM: STi: Ensure requested STi's SysCfg Controlled IRQs are enabled at boot
This driver is used to enable System Configuration Register controlled
External, CTI (Core Sight), PMU (Performance Management), and PL310 L2
Cache IRQs prior to use.
Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Lee Jones [Tue, 12 May 2015 12:51:00 +0000 (14:51 +0200)]
ARM: STi: STiH407: Enable PMU IRQs
This driver is used to enable System Configuration Register controlled
External, CTI (Core Sight), PMU (Performance Management), and PL310 L2
Cache IRQs prior to use.
Here we are enabling PMU IRQs on both channels.
Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Lee Jones [Tue, 12 May 2015 12:51:00 +0000 (14:51 +0200)]
ARM: STi: STiH416: Enable PMU IRQs
This driver is used to enable System Configuration Register controlled
External, CTI (Core Sight), PMU (Performance Management), and PL310 L2
Cache IRQs prior to use.
Here we are enabling PMU IRQs on both channels.
Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Lee Jones [Tue, 12 May 2015 12:51:00 +0000 (14:51 +0200)]
ARM: STi: STiH416-b2020e: Enable PWM on the B2020 Rev-E
All the infrastructure is now in place for ST's PWM controller. This
patch takes the final step and enables the IP on the 2020 Rev-E
development platform.
Signed-off-by: Ajit Pal Singh <ajitpal.singh@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Lee Jones [Tue, 12 May 2015 12:51:00 +0000 (14:51 +0200)]
ARM: STi: STiH416: Add DT nodes for PWM
Supply top level nodes for the STiH416 based development boards.
The Pinctrl configuration has already been applied, so the only
missing piece of the DT puzzle is for a board's DTB to enable
the nodes.
Signed-off-by: Ajit Pal Singh <ajitpal.singh@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Lee Jones [Tue, 12 May 2015 12:51:00 +0000 (14:51 +0200)]
ARM: STi: STiH416: Add Pinctrl settings for PWM
Supply the Pinctrl configuration to enable PWM{0,1} lines on STiH416
based development boards.
Signed-off-by: Ajit Pal Singh <ajitpal.singh@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Lee Jones [Tue, 12 May 2015 12:51:00 +0000 (14:51 +0200)]
ARM: STi: STiH407: Add DT nodes for for PWM
Supply top level nodes for the STiH407 based development boards.
The Pinctrl configuration has already been applied, so the only
missing piece of the DT puzzle is for a board's DTB to enable
the nodes.
Signed-off-by: Ajit Pal Singh <ajitpal.singh@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Robert Jarzmik [Sun, 12 Oct 2014 20:11:08 +0000 (22:11 +0200)]
ARM: dts: pxa: add pxa-timer to pxa27x and pxa3xx
Each pxa has an embedded OS Timers IP. The kernel cannot work without a
valid clocksource, and this adds the OS Timers to the pxa device-tree
description.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Robert Jarzmik [Sat, 7 Feb 2015 12:13:24 +0000 (13:13 +0100)]
ARM: dts: pxa: add clocks
Add clocks to the IPs already described in the pxa device-tree
files. There are more clocks in the clock tree than IPs described in the
current pxa device-tree.
This patch ensures that :
- the current description is correct
- the clocks are actually claimed, so that clock framework doesn't
disable them automatically (unused clocks shutdown)
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Robert Jarzmik [Sat, 7 Feb 2015 12:26:09 +0000 (13:26 +0100)]
ARM: dts: pxa: add pwri2c to pxa device-tree
pxa27x variant has 2 I2C busses on the SoC :
- the casual I2C
- the power I2C, normally driving power regulators, and capable of
receiving orders on core frequency modifications
Add the missing pwri2c to pxa27x description.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Arnd Bergmann [Tue, 12 May 2015 15:23:34 +0000 (17:23 +0200)]
Merge tag 'sunxi-dt-for-4.2' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/dt
Pull "Allwinner DT additions for 4.1, take 1" from Maxime Ripard:
All the device tree related changes for the 4.1 merge window.
It has a rather big diffstat, because of a lot of mechanical and harmless
changes, as described below.
There is mostly:
- The end of the DT relicensing. All our DT should now be under the dual
X11/GPL license.
- Convertion of all the DT to a label based syntax, instead of
duplicating the tree like was done before.
- Rework of the A10s and A13 DTSI to share the common devices
- A few drivers enablings: A80 USB, the A31 PMIC, A31 and A23 arch
timers, etc
- Fix the checkpatch warnings
- A few new boards : cubieboard4, mele i7, utoo p66, auxtex t004,
pcduino3 nano, gemei G9, mk808c, jesurun q5, orange pi, orange pi mini
* tag 'sunxi-dt-for-4.2' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux: (84 commits)
ARM: sunxi: dt: Split the SPI pinctrl groups
ARM: sunxi: dt: Fix whitespace errors
ARM: sunxi: DT: Fix lines over 80 characters
ARM: sunxi: dt: Remove the FSF address
ARM: sunxi: dts: split IR pins for A10 and A20
ARM: sun7i: dt: Add new MK808C device
ARM: dts: sun6i: Set PLL6 as parent to AHB1 clock in AHB1 clock node
ARM: dts: sunxi: Update ahb clocks for sun5i and sun7i
ARM: dts: sun7i: Add dts file for the Jesurun Q5 top set box
ARM: dts: sun5i: Enable touchscreen on Utoo P66
ARM: dts: sun7i: Add dts file for the Orangepi mini SBC
ARM: dts: sun7i: Add dts file for the Orangepi SBC
ARM: dts: sun7i: Add A20 SRAM and SRAM controller
ARM: dts: sun5i: Add A13 and A10s SRAM and SRAM controller
ARM: dts: sun4i: Add A10 SRAM and SRAM controller
ARM: dts: sun5i: Add broken-hpi property for Utoo-P66 eMMC
ARM: sun8i: dt: Enable A23 SMP support
ARM: dts: sun6i: Add cpu thermal zones to dtsi
ARM: dts: sun6i: Add cpu clock reference and operating points to dtsi
ARM: sunxi: DT: Add stdout-path property
...
Arnd Bergmann [Tue, 12 May 2015 15:22:11 +0000 (17:22 +0200)]
Merge tag 'socfpga_dts_for_v4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into next/dt
Pull "SoCFPGA DTS updates for v4.2" from Dinh Nguyen:
- Add accelerometer to sockit
- Update and clean up support for the Arria10 platform
- Add sdmmc_clk/4 clock node SoCFPGA Cyclone5/Arria5
- Update ethernet nodes with multicast/unicast/fifo-depth properties
- Add clocks for Arria10 platform
* tag 'socfpga_dts_for_v4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
ARM: socfpga: dts: add clocks to the Arria10 platform
ARM: socfpga: dts: Add tx-fifo-depth and rx-fifo-depth properties
ARM: socfpga: dts: Add multicast bins and unicast filter entries
ARM: socfpga: dts: Add a clock node for sdmmc CIU
ARM: socfpga: dts: rename socdk board file to socdk_sdmmc
ARM: socfpga: dts: enable UART1 for the debug uart
ARM: socfpga: dts: disable the sdmmc, and uart nodes in the base arria10
ARM: socfpga: dts: add cpu1-start-addr for Arria 10
ARM: socfpga: dts: Add adxl34x
Arnd Bergmann [Tue, 12 May 2015 14:50:28 +0000 (16:50 +0200)]
Merge tag 'sti-dt-for-v4.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mcoquelin/sti into next/dt
Pull "STi DT updates for v4.2, round 1." from Maxime Coquelin:
Highlights:
-----------
- Add DT nodes for SSC on STiH407 family
- Add DT nodes for SD/MMC on STiH407 & STiH418
- Add DT node for LPC on STiH407
- Add Sata DT nodes for STiH407
- Fix PIO3 & PIO35 pins retiming on STiH407
* tag 'sti-dt-for-v4.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mcoquelin/sti:
ARM: DT: STi: STiH407: Add sata DT nodes.
ARM: STi: DT: STiH407: Fix retime pin mask for PIO5 and PIO35
ARM: STi: DT: STiH407: Add Device Tree node for the LPC
mfd: dt-bindings: Provide human readable defines for LPC mode choosing
ARM: STi: DT: STiH418: Add dt nodes for sdhci and emmc.
ARM: STi: DT: STiH407: Add dt nodes for sdhci and emmc.
ARM: sti: Provide DT nodes for SBC SSC[0..2]
ARM: sti: Provide DT nodes for SSC[0..4]
ARM: socfpga: dts: Add tx-fifo-depth and rx-fifo-depth properties
Add tx-fifo-depth and rx-fifo-depth devicetree properties for socfpga
stmmac. These devicetree properties will be used to configure certain
features of the stmmac on the socfpga.
The CIU(Card Interface Unit) get its clock from the sdmmc_clk_divided clock
which is used to clock the card. The sdmmc_clk_divided clock is the sdmmc_clk
passed through a fixed divider of 4. This patch adds the sdmmc_clk_divided
node and makes the sdmmc_clk it's parent.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
---
v2: renamed ciu_clk to sdmmc_clk_divided
Dinh Nguyen [Tue, 10 Mar 2015 03:57:04 +0000 (22:57 -0500)]
ARM: socfpga: dts: rename socdk board file to socdk_sdmmc
Rename the socfpga_arria10_socdk board file to socfpga_arria10_socdk_sdmmc
as Arria 10 devkit cannot support SDMMC and QSPI at the same time. Thus
we will need to have 2 separate board files, one for SDMMC and one for
QSPI. We also add a new base board dtsi file, socfpga_arria10_socdk.dtsi
so that we use common peripherals for each flavor of the devkits.
Add the sdmmc node to the socfpga_arria10_socdk_sdmmc.dts board file.
ARM: dts: dove: Add proper support for Compulab CM-A510/SBC-A510
Existing dts file for Compulab CM-A510 was very limited due to missing
hardware. Now that we actually found somebody with that board, properly
rework it to provide a CoM/SoM include and a board file for Compulab's
SBC-A510.
Both the CM-A510 SoM and the SBC-A510 can be configured with different
options, so we only enable a minimum set of options. The actual board
configuration will have to be set by either the bootloader or user.
Although functionally not required, repeat even disabled nodes again
to increse their visibility in the dtsi/dts files.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: Gabriel Dobato <dobatog@gmail.com> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
This adds a i2c-mux-pinctrl node to dove.dtsi for the internal i2c
mux found on Dove SoCs. Up to now, we had no board using any of the
two additional i2c busses, so make sure the change does not break
any existing boards.
Therefore, we rename the i2c-controller node label to "i2c" and
enable it by default. Also, the dedicated sub-bus (now "i2c0") is
enabled by default. The two optional sub-busses require additional
external pin-muxing, so disable them by default.
ARM: shmobile: koelsch dts: Add "nor-jedec" compatible value
Spansion s25fl512s is compatible with "nor-jedec". Hence add the
"nor-jedec" compatible value, so the driver can bind against the generic
name, cfr. commit 8ff16cf77ce314c2 ("Documentation: devicetree: m25p80:
add "nor-jedec" binding").
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
ARM: shmobile: bockw dts: Add "nor-jedec" compatible value
Spansion s25fl008k is compatible with "nor-jedec". Hence add the
"nor-jedec" compatible value, so the driver can bind against the generic
name, cfr. commit 8ff16cf77ce314c2 ("Documentation: devicetree: m25p80:
add "nor-jedec" binding").
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
ARM: shmobile: lager dts: Add "nor-jedec" compatible value
Spansion s25fl512s is compatible with "nor-jedec". Hence add the
"nor-jedec" compatible value, so the driver can bind against the generic
name, cfr. commit 8ff16cf77ce314c2 ("Documentation: devicetree: m25p80:
add "nor-jedec" binding").
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
ARM: shmobile: bockw-reference dts: Add "nor-jedec" compatible value
Spansion s25fl008k is compatible with "nor-jedec". Hence add the
"nor-jedec" compatible value, so the driver can bind against the generic
name, cfr. commit 8ff16cf77ce314c2 ("Documentation: devicetree: m25p80:
add "nor-jedec" binding").
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
ARM: shmobile: henninger dts: Add "nor-jedec" compatible value
Spansion s25fl512s is compatible with "nor-jedec". Hence add the
"nor-jedec" compatible value, so the driver can bind against the generic
name, cfr. commit 8ff16cf77ce314c2 ("Documentation: devicetree: m25p80:
add "nor-jedec" binding").
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
projects / karo-tx-linux.git / log