Jani Nikula [Fri, 27 Jan 2017 15:57:06 +0000 (17:57 +0200)]
drm/i915: use variadic macros and arrays to choose port/pipe based registers
This allows the use of more than 3 ports/pipes/whatever without tricks,
even if the register offsets are not evenly spaced.
There's the risk of out of bounds access if we're not careful; currently
that would "just" lead to the wrong register offset being used. It might
be possible to add build bug ons for build time constant indexing.
We already have ports defined up to E, not sure if we might have bugs
related to them and the current _PORT3() macro.
text data bss dec hex filename 1239868 46199 4096 1290163 13afb3 drivers/gpu/drm/i915/i915.ko 1238828 46199 4096 1289123 13aba3 drivers/gpu/drm/i915/i915.ko
Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Tvrtko Ursulin <tursulin@ursulin.net> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Acked-by: Daniel Vetter <daniel@ffwll.ch> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1485532626-20923-1-git-send-email-jani.nikula@intel.com
Mika Kuoppala [Fri, 27 Jan 2017 13:03:09 +0000 (15:03 +0200)]
drm/i915: Create context desc template when context is created
Move the invariant parts of context desc setup from execlist init
to context creation. This is advantageous when we need to
create different templates based on the context parametrization,
ie. for svm capable contexts.
drm/i915/glk: Program pipe gamma and degamma tables
The gamma tables in Geminilake were changed. There is no split-gamma
mode. Instead, there is a dedicated degamma table that is enabled
whenever pipe CSC is enabled.
The dedicated gamma table has 16 bit precision but doesn't support
separate channels. Since that doesn't match the per-channel format of
the degamma LUT property, for now only a linear table is loaded and the
property ignored.
drm/i915/glk: Plane color correction register changes
In Geminilake, the bits for enabling pipe csc, pipe gamma and plane
gamma moved to a new register. So update the plane update functions
to set the right bits.
Pipe CSC is kept disabled though, since enabling that also enables the
dedicated degamma table, and that is not properly programmed yet,
leading to a black screen.
v2: Use plane_id. (Ville)
Remove unnecessary variable. (Ville)
Keep registers in offset order. (Ville)
Don't set plane gamma disable twice. (Ander)
Chris Wilson [Fri, 27 Jan 2017 09:40:08 +0000 (09:40 +0000)]
drm/i915: Support explicit fencing for execbuf
Now that the user can opt-out of implicit fencing, we need to give them
back control over the fencing. We employ sync_file to wrap our
drm_i915_gem_request and provide an fd that userspace can merge with
other sync_file fds and pass back to the kernel to wait upon before
future execution.
Chris Wilson [Fri, 27 Jan 2017 09:40:07 +0000 (09:40 +0000)]
drm/i915: Enable userspace to opt-out of implicit fencing
Userspace is faced with a dilemma. The kernel requires implicit fencing
to manage resource usage (we always must wait for the GPU to finish
before releasing its PTE) and for third parties. However, userspace may
wish to avoid this serialisation if it is either using explicit fencing
between parties and wants more fine-grained access to buffers (e.g. it
may partition the buffer between uses and track fences on ranges rather
than the implicit fences tracking the whole object). It follows that
userspace needs a mechanism to avoid the kernel's serialisation on its
implicit fences before execbuf execution.
The next question is whether this is an object, execbuf or context flag.
Hybrid users (such as using explicit EGL_ANDROID_native_sync fencing on
shared winsys buffers, but implicit fencing on internal surfaces)
require a per-object level flag. Given that this flag need to be only
set once for the lifetime of the object, this reduces the convenience of
having an execbuf or context level flag (and avoids having multiple
pieces of uABI controlling the same feature).
Incorrect use of this flag will result in rendering corruption and GPU
hangs - but will not result in use-after-free or similar resource
tracking issues.
Serious caveat: write ordering is not strictly correct after setting
this flag on a render target on multiple engines. This affects all
subsequent GEM operations (execbuf, set-domain, pread) and shared
dma-buf operations. A fix is possible - but costly (both in terms of
further ABI changes and runtime overhead).
Andrey Ryabinin [Thu, 26 Jan 2017 14:32:11 +0000 (17:32 +0300)]
drm/i915: fix use-after-free in page_flip_completed()
page_flip_completed() dereferences 'work' variable after executing
queue_work(). This is not safe as the 'work' item might be already freed
by queued work:
Paulo Zanoni [Thu, 26 Jan 2017 20:19:07 +0000 (18:19 -0200)]
drm/i915: make i915_stolen_to_physical() return phys_addr_t
The i915_stolen_to_physical() function has 'unsigned long' as its
return type but it returns the 'base' variable, which is of type
'u32'. The only place where this function is called assigns the
returned value to dev_priv->mm.stolen_base, which is of type
'phys_addr_t'. The return value is actually a physical address and
everything else in the stolen memory code seems to be using
phys_addr_t, so fix i915_stolen_to_physical() to use phys_addr_t.
v2: Add missing blank lines after declarations (Chris, checkpatch.pl).
Jani Nikula [Mon, 23 Jan 2017 09:42:59 +0000 (11:42 +0200)]
drm/color: un-inline drm_color_lut_extract()
The function is not that big, but it's also not used for anything
performance critical. Make it a normal function.
As a side effect, this apparently makes sparse smarter about what it's
doing, and gets rid of the warning:
./include/drm/drm_color_mgmt.h:53:28: warning: shift too big (4294967295) for type unsigned long
./include/drm/drm_color_mgmt.h:53:28: warning: cast truncates bits from constant value (8000000000000000 becomes 0)
Paulo Zanoni [Tue, 24 Jan 2017 18:47:22 +0000 (16:47 -0200)]
x86/gpu: GLK uses the same GMS values as SKL
So don't forget to reserve its stolen memory bits.
Cc: Ingo Molnar <mingo@kernel.org> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> Cc: x86@kernel.org Reviewed-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Acked-by: Ingo Molnar <mingo@kernel.org> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1485283642-14401-1-git-send-email-paulo.r.zanoni@intel.com
Chris Wilson [Thu, 26 Jan 2017 10:19:19 +0000 (10:19 +0000)]
drm/i915: Report the failure to write to the punit
The write to the punit may fail, so propagate the error code back to its
callers. Of particular interest are the RPS writes, so add appropriate
user error codes and logging.
v2: Add DEBUG for failed frequency changes during RPS.
Manasi Navare [Tue, 24 Jan 2017 16:21:49 +0000 (08:21 -0800)]
drm/i915: Add support for DP Video pattern compliance tests
The intel_dp_autotest_video_pattern() function gets invoked through the
compliance test handler on a HPD short pulse if the test type is
set to DP_TEST_VIDEO_PATTERN. This performs the DPCD registers
reads to read the requested test pattern, video pattern resolution,
frame rate and bits per color value. The results of this analysis
are handed off to userspace so that the userspace app can set the
video pattern mode appropriately for the test result/response.
When the test is requested with specific BPC value, we read the BPC
value from the DPCD register. If this BPC value in intel_dp structure
has a non-zero value and we're on a display port connector, then we use
the value to calculate the bpp for the pipe. Also in this case if its
a 18bpp video pattern request, then we force the dithering on pipe to be
disabled since it causes CRC mismatches.
The compliance_test_active flag is set at the end of the individual
test handling functions. This is so that the kernel-side operations
can be completed without the risk of interruption from the userspace
app that is polling on that flag.
v5:
* Remove test_result variable
* Populate the compliance test data at the end of the function (Jani Nikula)
v4:
*Return TEST_NAK on read failures and invalid values (Jani Nikula)
* Address CRC mismatch errors
v3:
* Use the updated properly shifted bit definitions (Jani Nikula)
* Force dithering to be disabled on 18bpp compliance
test request (Manasi Navare)
v2:
* Updated the DPCD Register reads based on proper defines in header (Jani Nikula)
* Squahsed the patch that forced the pipe bpp to compliance test bpp (Jani Nikula) Signed-off-by: Manasi Navare <manasi.d.navare@intel.com> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Daniel Vetter <daniel.vetter@intel.com> Cc: Ville Syrjala <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1485274909-17470-1-git-send-email-manasi.d.navare@intel.com
Manasi Navare [Sat, 21 Jan 2017 03:09:29 +0000 (19:09 -0800)]
drm: Add definitions for DP compliance Video pattern tests
v4:
* Remove redundant single bit defs (Jani Nikula)
v3:
* Fix the conventions in bit definitions (Jani Nikula)
v2:
* Add all the other DP Complianec TEST register defs (Jani Nikula) Cc: dri-devel@lists.freedesktop.org Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Daniel Vetter <daniel.vetter@intel.com> Cc: Ville Syrjala <ville.syrjala@linux.intel.com> Signed-off-by: Manasi Navare <manasi.d.navare@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1484968170-12467-4-git-send-email-manasi.d.navare@intel.com
Manasi Navare [Sat, 21 Jan 2017 03:09:28 +0000 (19:09 -0800)]
drm/i915: Fixes to support DP Compliance EDID tests
This patch addresses a few issues from the original patch for
DP Compliance EDID test support submitted by
Todd Previte<todd.previte@gmail.com>
Video Mode requested in the EDID test handler for the EDID Read
test (CTS 4.2.2.3) should be set to PREFERRED as per the CTS spec.
v2:
* Added read debugfs data from test_data.edid if its EDID test (Jani NIkula) Signed-off-by: Manasi Navare <manasi.d.navare@intel.com> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Daniel Vetter <daniel.vetter@intel.com> Cc: Ville Syrjala <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1484968170-12467-3-git-send-email-manasi.d.navare@intel.com
Manasi Navare [Tue, 24 Jan 2017 16:16:34 +0000 (08:16 -0800)]
drm/i915: Add support for DP link training compliance
This patch adds support to handle automated DP compliance
link training test requests. This patch has been tested with
Unigraf DPR-120 DP Compliance device for testing Link
Training Compliance.
After we get a short pulse Compliance test request, test
request values are read and hotplug uevent is sent in order
to trigger another modeset during which the pipe is configured
and link is retrained and enabled for link parameters requested
by the test.
v5:
* Only modify the compliance structure after all validation
is done (Jani Nikula)
* Remove the variable test_result (Jani Nikula)
v4:
* Return TEST_NAK for read failures and invalid
values (Jani Nikula)
* Conver the test link BW to link rate before storing (Jani Nikula)
v3:
* Validate the test link rate and lane count as soon as
the request comes (Jani Nikula)
v2:
* Validate the test lane count before using it in
intel_dp_compute_config (Jani Nikula) Signed-off-by: Manasi Navare <manasi.d.navare@intel.com> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Daniel Vetter <daniel.vetter@intel.com> Cc: Ville Syrjala <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1485274594-17361-1-git-send-email-manasi.d.navare@intel.com
Rodrigo Vivi [Mon, 23 Jan 2017 18:32:37 +0000 (10:32 -0800)]
drm/i915: Introduce IS_GEN9_BC for Skylake and Kabylake.
Along with GLK it was introduced the .is_lp and IS_GEN9_LP.
So, following the same simplification standard we can
put Skylake and Kabylake under the same bucket for most
of the things.
So let's add the IS_GEN9_BC for "Big Core" (non Atom based
platforms).
The i915_drv.c was let out of this patch on purpose
because that is really a decision per platform, just like
other cases where IS_KABYLAKE is different from IS_SKYLAKE.
v2: fix conflict with IS_LP and 3 new cases for this
big core bucket:
- intel_ddi.c: intel_ddi_get_link_dpll
- intel_fbc.c: find_compression_threshold
- i915_gem_gtt.c: gtt_write_workarounds
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com> Cc: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> Cc: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Ander Conselvan de Oliveira <conselvan2@gmail.com> Acked-by: Jani Nikula <jani.nikula@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1485196357-30599-2-git-send-email-rodrigo.vivi@intel.com
Chris Wilson [Mon, 23 Jan 2017 21:29:39 +0000 (21:29 +0000)]
drm/i915: Move atomic state free from out of fence release
Fences are required to support being released from under an atomic context.
The drm_atomic_state struct may take a mutex when being released and so
we cannot drop a reference to the drm_atomic_state from the fence release
path directly, and so we need to defer that unreference to a worker.
Chris Wilson [Tue, 24 Jan 2017 11:00:09 +0000 (11:00 +0000)]
drm/i915: Emit dma-fence (and execlists submit) first from signaler
When introduced, I thought that reducing client latency from the
signaler was the priority. Since its inception the signaler has become
responsible for keeping the execlists full, via the dma-fence. As this
is very important to minimise overall execution time, signal the
dma-fence first and then signal any waiting clients.
Chris Wilson [Tue, 24 Jan 2017 11:00:07 +0000 (11:00 +0000)]
drm/i915: Only attempt to pass the first request to execlists
Only the first request added to the execlist queue can be submitted. If
this request is not the first request on the queue, it means that there
are already higher priority requests waiting upon the tasklet and
kicking it will make no difference.
This is more relevant for a later patch, where we more eagerly try and
kick the tasklet to handle the submission of new requests.
Chris Wilson [Tue, 24 Jan 2017 15:20:21 +0000 (15:20 +0000)]
drm/i915: Only run execlist context-switch handler after an interrupt
Mark when we run the execlist tasklet following the interrupt, so we
don't probe a potentially uninitialised register when submitting the
contexts multiple times before the hardware responds.
v2: Use a shared engine->irq_posted
v3: Always use locked bitops to be sure of atomicity wrt to other bits
in the mask.
Chris Wilson [Tue, 24 Jan 2017 15:18:05 +0000 (15:18 +0000)]
drm/i915: Move breadcrumbs irq_posted up a level to engine
In the next patch, we will use the irq_posted technique for another
engine interrupt, rather than use two members for the atomic updates, we
can use two bits of one instead. First, we need to update the
breadcrumbs to use the new common engine->irq_posted.
v2: Use set_bit() rather than __set_bit() to ensure atomicity with
respect to other bits in the mask
Chris Wilson [Tue, 24 Jan 2017 11:00:03 +0000 (11:00 +0000)]
drm/i915: Only disable execlist preemption for the duration of the request
We need to prevent resubmission of the context immediately following an
initial resubmit (which does a lite-restore preemption). Currently we do
this by disabling all submission whilst the context is still active, but
we can improve this by limiting the restriction to only until we
receive notification from the context-switch interrupt that the
lite-restore preemption is complete.
Jani Nikula [Fri, 20 Jan 2017 17:04:06 +0000 (19:04 +0200)]
drm/i915/dp: do not proceed with autotests if we don't ACK them
There is no point in setting intel_dp->compliance.test_type, and
proceeding with the autotests, if we're about to NAK the request. Some
drive-by cleanups while at it.
v2: look at the ACK bit, as the result may also contain
TEST_EDID_CHECKSUM_WRITE
Chris Wilson [Tue, 24 Jan 2017 11:01:35 +0000 (11:01 +0000)]
drm/i915: Reset the gpu on takeover
The GPU may be in an unknown state following resume and module load. The
previous occupant may have left contexts loaded, or other dangerous
state, which can cause an immediate GPU hang for us. The only save
course of action is to reset the GPU prior to using it - similarly to
how we reset the GPU prior to unload (before a second user may be
affected by our leftover state).
We need to reset the GPU very early in our load/resume sequence so that
any stale HW pointers are revoked prior to any resource allocations we
make (that may conflict).
A reset should only be a couple of milliseconds on a slow device, a cost
we should easily be able to absorb into our initialisation times.
Chris Wilson [Tue, 24 Jan 2017 11:01:34 +0000 (11:01 +0000)]
drm/i915: Split intel_engine allocation and initialisation
In order to reset the GPU early on in the module load sequence, we need
to allocate the basic engine structs (to populate the mmio offsets etc).
Currently, the engine initialisation allocates both the base struct and
also allocate auxiliary objects, which depend upon state setup quite
late in the load sequence. We split off the allocation callback for
later and allow ourselves to allocate the engine structs themselves
early.
v2: Different paint for the unwind following error.
This w/a (WaSetDisablePixMaskCammingAndRhwoInCommonSliceChicken) was only
used for preproduction hw, which is no longer in use. Remove the
workaround to simplify the code.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20170123130601.2281-4-chris@chris-wilson.co.uk Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Chris Wilson [Mon, 23 Jan 2017 13:05:56 +0000 (13:05 +0000)]
drm/i915: Remove disable_lite_restore_wa
This w/a (WaEnableForceRestoreInCtxtDescForVCS) was only used for
preproduction hw, which is no longer in use. Remove the workaround to
simplify the code.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20170123130601.2281-1-chris@chris-wilson.co.uk Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Chris Wilson [Mon, 23 Jan 2017 14:52:45 +0000 (14:52 +0000)]
drm/i915: Pevent copying uninitialised garbage into vma->ggtt_view
Since tweaking i915_vma_compare() we allowed constructors to skip
clearing the ggtt_view believing that we didn't access the unused
members. That, as it turns out, was not entirely true. In particular,
i915_gem_fault() uses
i.e. the ggtt_view.partial for both normal and partial views. If we
allowed garbage into the normal vma->ggtt_view and then try userspace
tried to mmap it, we could explode in an unobvious fashion.
Fixes: 7b92c047bae2 ("drm/i915: Eliminate superfluous i915_ggtt_view_rotated") Fixes: 3bf4d5751943 ("drm/i915: Stop clearing i915_ggtt_view") Reported-by: Matthew Auld <matthew.william.auld@gmail.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Matthew Auld <matthew.william.auld@gmail.com> Link: http://patchwork.freedesktop.org/patch/msgid/20170123145245.3972-1-chris@chris-wilson.co.uk Tested-by: Matthew Auld <matthew.auld@intel.com> Reviewed-by: Matthew Auld <matthew.auld@intel.com>
This reverts commit 527b6abe5fd2d2
(Revert "drm/i915: Use atomic commits for legacy page_flips")
and reapplies commit ee042aa40b66d1.
("drm/i915: Use atomic commits for legacy page_flips")
The reason for the revert was because legacy cursor updates were
forced to wait for pending page flips and rendering after they
were converted to atomic.
Commit f79f26921ee12c6f
(drm/i915: Add a cursor hack to allow converting legacy page flip to atomic, v3)
adds a fastpath to cursor updates, which fixes the stuttering issues.
With these changes I feel confident enough to re-enable cursor updates.
Legacy cursor update won't block in the following cases:
- Moving cursor
- Changing cursor fb
The legacy cursor update will still block in the following cases:
- Showing/hiding cursor.
- Cursor size or scaling changes.
- cursor update while cursor is invisible (could be fixed, if it turns out to be important).
- Cursor tiling changes (Not sure we support tiled cursors.)
- Last update was a modeset.
Cc: Steven Newbury <steve@snewbury.org.uk> Cc: Rafael Ristovski <rafael.ristovski@gmail.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Tested-by: Rafael Ristovski <rafael.ristovski@gmail.com>
Testcase: igt/kms_cursor_legacy Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Chris Wilson [Mon, 23 Jan 2017 11:31:32 +0000 (11:31 +0000)]
drm/i915: Assert that the context-switch completion matches our context
When execlists signals the context completion, it also provides the
context id for the status event. Assert that id matches the one we expect.
v2: The upper dword of the context status is a duplicate of the upper
dword from elsp submission (i.e. includes the group id as well as the
context id). Include this check as well.
v3: Only check against lrc_desc (as this contains the hw_id check)
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: Mika Kuoppala <mika.kuoppala@intel.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20170123113132.18665-2-chris@chris-wilson.co.uk
Chris Wilson [Wed, 18 Jan 2017 12:18:08 +0000 (12:18 +0000)]
drm/i915: Fix W=1 warning for csr_load_work_fn()
drivers/gpu/drm/i915/intel_csr.c: In function ‘csr_load_work_fn’:
drivers/gpu/drm/i915/intel_csr.c:399:6: error: variable ‘ret’ set but not used [-Werror=unused-but-set-variable]
Chris Wilson [Sat, 21 Jan 2017 18:22:33 +0000 (18:22 +0000)]
agp/intel: Move intel_fake_agp_sizes into #ifdef block
Move the intel_fake_agp_sizes array into the same #ifdef block as it is
used to avoid instantiation when not used, and so triggering a compiler
warning
drivers/char/agp/intel-gtt.c:335:42: warning: ‘intel_fake_agp_sizes’
defined but not used [-Wunused-const-variable=]
drm/i915: Fix calculation of rotated x and y offsets for planar formats
Parameters tile_size, tile_width and tile_height were passed in the
wrong order to _intel_adjust_tile_offset() when calculating the rotated
offsets.
This doesn't fix any user visible bug, since for packed formats new
and old offset are the same and the rotated offsets are within a tile
before they are fed to _intel_adjust_tile_offset(). In that case, the
offsets are unchanged. That is not true for planar formats, but those
are currently not supported.
Fixes: 66a2d927cb0e ("drm/i915: Make intel_adjust_tile_offset() work for linear buffers") Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com> Cc: Daniel Vetter <daniel.vetter@intel.com> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: intel-gfx@lists.freedesktop.org Cc: <stable@vger.kernel.org> # v4.9+ Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1484922525-6131-3-git-send-email-ander.conselvan.de.oliveira@intel.com
drm/i915: Don't init hpd polling for vlv and chv from runtime_suspend()
An error in the condition for avoiding the call to intel_hpd_poll_init()
for valleyview and cherryview from intel_runtime_suspend() caused it to
be called unconditionally. Fix it.
Fixes: 19625e85c6ec ("drm/i915: Enable polling when we don't have hpd") Cc: stable@vger.kernel.org Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Lyude <cpaul@redhat.com> Cc: Daniel Vetter <daniel.vetter@intel.com> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: intel-gfx@lists.freedesktop.org Cc: <stable@vger.kernel.org> # v4.9+ Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1484922525-6131-2-git-send-email-ander.conselvan.de.oliveira@intel.com
drm/i915: Don't leak edid in intel_crt_detect_ddc()
In the path where intel_crt_detect_ddc() detects a CRT, if would return
true without freeing the edid.
Fixes: a2bd1f541f19 ("drm/i915: check whether we actually received an edid in detect_ddc") Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Daniel Vetter <daniel.vetter@intel.com> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: intel-gfx@lists.freedesktop.org Cc: <stable@vger.kernel.org> # v3.6+ Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1484922525-6131-1-git-send-email-ander.conselvan.de.oliveira@intel.com
drm/i915: Split insertion/binding of an object into the VM
It is useful to have this trace as it pairs nicely with the vma_unbind
one to track vma activity.
Added inside the i915_vma_bind function (was outside before) to keep a
similar placement as trace_i915_vma_unbind.
Michał Winiarski [Fri, 20 Jan 2017 19:23:47 +0000 (20:23 +0100)]
drm/i915/huc: Assert that HuC vma is placed in GuC accessible range
HuC firmware is mapped at GuC accessible range. Let's add an assert to
verify that.
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com> Cc: Arkadiusz Hiler <arkadiusz.hiler@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Signed-off-by: Michał Winiarski <michal.winiarski@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20170120192348.2049-2-michal.winiarski@intel.com Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Michał Winiarski [Fri, 20 Jan 2017 19:23:46 +0000 (20:23 +0100)]
drm/i915/huc: Avoid attempting to authenticate non-existent fw
HuC authentication is called even if HuC firmware is not present in the
system, leading to NULL ptr dereference on not allocated gem_object.
Let's avoid trying to authenticate HuC if its firmware is not loaded
successfully.
Fixes: dac84a388528 ("drm/i915/huc: Support HuC authentication")
v2: Check inside the auth function, split the assert (Michał)
v3: Oops, hit send before compiling, s/huc_fw/huc->fw
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com> Cc: Arkadiusz Hiler <arkadiusz.hiler@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Signed-off-by: Michał Winiarski <michal.winiarski@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20170120192348.2049-1-michal.winiarski@intel.com Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
drm/i915: Set adjustment to zero on Up/Down interrupts if freq is already max/min
When we reach the user's RPS limits, stop requesting an adjustment. Even
though we will clamp the requested frequency later, we rely on interrupt
masking to disable further adjustments in the same direction. Even
though it is unlikely (one scenario is a bug in the driver, another is
careful manipulation through the uAPI) if we keep exponentially
increasing the adjustment value, it will wrap and cause a negative
adjustment.
Chris Wilson [Thu, 19 Jan 2017 11:37:49 +0000 (11:37 +0000)]
drm/i915: Release temporary load-detect state upon switching
After we call drm_atomic_commit() on the load-detect state, we can free
our local reference. Upon restore, we only apply and free the previous state.
Fixes: 0853695c3ba4 ("drm: Add reference counting to drm_atomic_state") Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: <drm-intel-fixes@lists.freedesktop.org> # v4.10-rc1+ Link: http://patchwork.freedesktop.org/patch/msgid/20170119113749.2517-1-chris@chris-wilson.co.uk Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Chris Wilson [Mon, 16 Jan 2017 15:21:30 +0000 (15:21 +0000)]
drm/i915: Remove i915_vma_create from VMA API
With the introduce of i915_vma_instance() for obtaining the VMA
singleton for a (obj, vm, view) tuple, we can remove the
i915_vma_create() in favour of a single entry point. We do incur a
lookup onto an empty tree, but the i915_vma_create() were being called
infrequently and during initialisation, so the small overhead is
negligible.
v2: Drop the i915_ prefix from the now static vma_create() function
Chris Wilson [Mon, 16 Jan 2017 15:21:28 +0000 (15:21 +0000)]
drm/i915: Rename some warts in the VMA API
Whilst writing testcases to exercise the VMA API, some oddities came to
light, such as i915_gem_obj_lookup_or_create(). Joonas suggested
i915_vma_instance() as a neat replacement, so rename them, move them to
i915_vma.c and add some kerneldoc as a sugary bonus.
Chris Wilson [Mon, 16 Jan 2017 15:21:27 +0000 (15:21 +0000)]
drm/i915: Track pinned vma in intel_plane_state
With atomic plane states we are able to track an allocation right from
preparation, during use and through to the final free after being
swapped out for a new plane. We can couple the VMA we pin for the
framebuffer (and its rotation) to this lifetime and avoid all the clumsy
lookups in between.
v2: Remove residual vma on plane cleanup (Chris)
v3: Add a description for the vma destruction in
intel_plane_destroy_state (Maarten)
Anusha Srivatsa [Wed, 18 Jan 2017 16:05:58 +0000 (08:05 -0800)]
drm/i915/get_params: Add HuC status to getparams
This patch will allow for getparams to return the status of the HuC.
As the HuC has to be validated by the GuC this patch uses the validated
status to show when the HuC is loaded and ready for use. You cannot use
the loaded status as with the GuC as the HuC is verified after it is
loaded and is not usable until it is verified.
v2: removed the forewakes as the registers are already force-woken.
(T.Ursulin)
v3: rebased on top of drm-tip. Removed any reference to intel_huc.h
v4: rebased. Rename I915_PARAM_HAS_HUC to I915_PARAM_HUC_STATUS.
Remove intel_is_huc_valid() since it is used only in one place.
Put the case of I915_PARAM_HAS_HUC() in the right place.
v5: rebased. Add a comment to specify that I915_READ(reg)
does not read garbage value. The register HUC_STATUS2 is force
woken and no rpm is needed.
Anusha Srivatsa [Wed, 18 Jan 2017 16:05:57 +0000 (08:05 -0800)]
drm/i915/huc: Support HuC authentication
The HuC authentication is done by host2guc call. The HuC RSA keys
are sent to GuC for authentication.
v2: rebased on top of drm-tip. Changed name format and upped
version 1.7.
v3: changed wait_for_atomic to wait_for
v4: rebased. Rename intel_huc_auh() to intel_guc_auth_huc()
and place the prototype in intel_guc.h,correct the comments.
v5: rebased. Moved intel_guc_auth_huc from i915_guc_submission.c
to intel_uc.c.Update dev to dev_priv in intel_guc_auth_huc().
Renamed HOST2GUC_ACTION_AUTHENTICATE_HUC TO INTEL_GUC_ACTION_
AUTHENTICATE_HUC
v6: rebased. Add newline on DRM_ERRORs that already dont have one.
v7: rebased. Replace wait_for with intel_wait_for_register() since
the latter employs sleep optimisations for quick responses- as pointed
out by Chris Wilson.
v8: rebased. Cleanup the intel_guc_auth_huc() by removing checks
already performed in earlier functions. Make comments more descriptive.
v9: rebased. Changed the bias for pinning the HuC object. Move
intel_guc_auth_huc() to intel_huc.c. Change DRM_DEBUGs to DRM_ERRORs
in intel_guc_auth_huc(). Add return status to DRM_ERRORs.
v10: Remove message not required for the user..
Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Arkadiusz Hiler <arkadiusz.hiler@intel.com> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> Tested-by: Xiang Haihao <haihao.xiang@intel.com> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com> Signed-off-by: Alex Dai <yu.dai@intel.com> Signed-off-by: Peter Antoine <peter.antoine@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1484755558-1234-5-git-send-email-anusha.srivatsa@intel.com
Anusha Srivatsa [Wed, 18 Jan 2017 16:05:56 +0000 (08:05 -0800)]
drm/i915/huc: Add debugfs for HuC loading status check
Add debugfs entry for HuC loading status check.
v2: rebased on top of drm-tip.
Cc: Michal wajdeczko <michal.wajdeczko@intel.com> Tested-by: Xiang Haihao <haihao.xiang@intel.com> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com> Signed-off-by: Alex Dai <yu.dai@intel.com> Signed-off-by: Peter Antoine <peter.antoine@intel.com> Reviewed-by: Jeff McGee <jeff.mcgee@intel.com> Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1484755558-1234-4-git-send-email-anusha.srivatsa@intel.com
Anusha Srivatsa [Wed, 18 Jan 2017 16:05:53 +0000 (08:05 -0800)]
drm/i915/huc: Add HuC fw loading support
The HuC loading process is similar to GuC. The intel_uc_fw_fetch()
is used for both cases.
HuC loading needs to be before GuC loading. The WOPCM setting must
be done early before loading any of them.
v2: rebased on-top of drm-intel-nightly.
removed if(HAS_GUC()) before the guc call. (D.Gordon)
update huc_version number of format.
v3: rebased to drm-intel-nightly, changed the file name format to
match the one in the huc package.
Changed dev->dev_private to to_i915()
v4: moved function back to where it was.
change wait_for_atomic to wait_for.
v5: rebased. Changed the year in the copyright message to reflect
the right year.Correct the comments,remove the unwanted WARN message,
replace drm_gem_object_unreference() with i915_gem_object_put().Make the
prototypes in intel_huc.h non-extern.
v6: rebased. Update the file construction done by HuC. It is similar to
GuC.Adopted the approach used in-
https://patchwork.freedesktop.org/patch/104355/ <Tvrtko Ursulin>
v7: Change dev to dev_priv in macro definition.
Corrected comments.
v8: rebased on top of drm-tip. Updated functions intel_huc_load(),
intel_huc_init() and intel_uc_fw_fetch() to accept dev_priv instead of
dev. Moved contents of intel_huc.h to intel_uc.h.
v9: change SKL_FW_ to SKL_HUC_FW_. Add intel_ prefix to guc_wopcm_size().
Remove unwanted checks in intel_uc.h. Rename huc_fw in struct intel_huc to
simply fw to avoid redundency.
v10: rebased. Correct comments. Make intel_huc_fini() accept dev_priv
instead of dev like intel_huc_init() and intel_huc_load().Move definition
to i915_guc_reg.h from intel_uc.h. Clean DMA_CTRL bits after HuC DMA
transfer in huc_ucode_xfer() instead of guc_ucode_xfer(). Add suitable
WARNs to give extra info.
v11: rebased. Add proper bias for HuC and make sure there are
asserts on failure by using guc_ggtt_offset_vma(). Introduce
intel_huc.c and remove intel_huc_loader.c since it has functions that
do more than just loading.Correct year in copyright.
v12: remove invalidates that are not required anymore.
Cc: Arkadiusz Hiler <arkadiusz.hiler@intel.com> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> Tested-by: Xiang Haihao <haihao.xiang@intel.com> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com> Signed-off-by: Alex Dai <yu.dai@intel.com> Signed-off-by: Peter Antoine <peter.antoine@intel.com> Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1484755558-1234-1-git-send-email-anusha.srivatsa@intel.com
Clint Taylor [Wed, 18 Jan 2017 21:38:43 +0000 (13:38 -0800)]
drm/i915: prevent crash with .disable_display parameter
The .disable_display parameter was causing a fatal crash when fbdev
was dereferenced during driver init.
V1: protection in i915_drv.c
V2: Moved protection to intel_fbdev.c
Fixes: 43cee314345a ("drm/i915/fbdev: Limit the global async-domain synchronization")
Testcase: igt/drv_module_reload/basic-no-display Cc: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Clint Taylor <clinton.a.taylor@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1484775523-29428-1-git-send-email-clinton.a.taylor@intel.com Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Lukas Wunner <lukas@wunner.de> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: <stable@vger.kernel.org> # v4.8+ Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
drm/i915: Avoid drm_atomic_state_put(NULL) on error paths
The error paths in hsw_trans_edp_pipe_A_crc_wa() and
intel_prepare_reset() would potentially call drm_atomic_state_put with a
NULL state, which would lead to a NULL pointer dereference.
Found by coverity.
v2: Improve the error paths. (Chris)
Fixes: 0853695c3ba4 ("drm: Add reference counting to drm_atomic_state") Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: <drm-intel-fixes@lists.freedesktop.org> # v4.10-rc1+ Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1484742868-9551-1-git-send-email-ander.conselvan.de.oliveira@intel.com Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Chris Wilson [Sun, 15 Jan 2017 12:58:25 +0000 (12:58 +0000)]
drm/i915: Avoid drm_atomic_state_put(NULL) in intel_display_resume
intel_display_resume() may be called without an atomic state to restore,
i.e. dev_priv->modeset_reset_restore state is NULL. One such case is
following a lid open/close event and the forced modeset in
intel_lid_notify().
Reported-by: Stefan Seyfried <stefan.seyfried@googlemail.com> Tested-by: Stefan Seyfried <stefan.seyfried@googlemail.com> Fixes: 0853695c3ba4 ("drm: Add reference counting to drm_atomic_state") Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: <drm-intel-fixes@lists.freedesktop.org> # v4.10-rc1+ Link: http://patchwork.freedesktop.org/patch/msgid/20170115125825.18597-1-chris@chris-wilson.co.uk Reviewed-by: Ander Conselvan de Oliveira <conselvan2@gmail.com>
Chris Wilson [Tue, 17 Jan 2017 15:59:06 +0000 (17:59 +0200)]
drm/i915: Detect a failed GPU reset+recovery
If we can't recover the GPU after the reset, mark it as wedged to cancel
the outstanding tasks and to prevent new users from trying to use the
broken GPU.
v2: Check the same ring is hung again before declaring the reset broken.
v3: use engine_stalled (Mika)
Mika Kuoppala [Tue, 17 Jan 2017 15:59:03 +0000 (17:59 +0200)]
drm/i915: Cleanup request skip decision
Since we now only skip banned contexts, preventing the skip of default
contexts is no longer sensible. For a similar argument as before
'commit 7ec73b7e36d0 ("drm/i915: Only skip requests once a context is banned")'
we end up with an inconsistent API if we only mark future execbufs from
the default ctx as banned but fail to mark those currently executing
as failed.
Chris Wilson [Tue, 17 Jan 2017 15:59:01 +0000 (17:59 +0200)]
drm/i915: Move engine reset preparation to i915_gem_reset_prepare()
Now that we have prepare/finish routines for the GEM reset, move the
disabling of the engine->irq_tasklet into them to reduce repetition. The
device irq enable/disable is split out to ensure it is run first and
last always (even if the GPU reset fails).
Chris Wilson [Mon, 16 Jan 2017 13:06:22 +0000 (13:06 +0000)]
drm/i915/psr: Fix compiler warnings for hsw_psr_disable()
drivers/gpu/drm/i915/intel_psr.c:634 hsw_psr_disable() warn: if statement not indented
drivers/gpu/drm/i915/intel_psr.c:644 hsw_psr_disable() warn: if statement not indented
Fixes: 3fcb0ca1d8db ("drm/i915/psr: fix blank screen issue for psr2") Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Jim Bride <jim.bride@linux.intel.com> Cc: Vathsala Nagaraju <vathsala.nagaraju@intel.com> Cc: Patil Deepti <deepti.patil@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20170116130622.20369-2-chris@chris-wilson.co.uk Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Anusha Srivatsa [Sat, 14 Jan 2017 01:17:05 +0000 (17:17 -0800)]
drm/i915/huc: Unified css_header struct for GuC and HuC
HuC firmware css header has almost exactly same definition as GuC
firmware except for the sw_version. Also, add a new member fw_type
into intel_uc_fw to indicate what kind of fw it is. So, the loader
will pull right sw_version from header.
v2: rebased on-top of drm-intel-nightly
v3: rebased. Rename device_id to guc_branch_client_version,
make guc_sw_version a union. <Jeff Mcgee>. Put UC_FW_TYPE_GUC
and UC_FW_TYPE_HUC into an enum.
v4: rebased on top of drm-tip.Update dev to dev_priv in
intel_uc_fw_fetch.
v5: rebased. Add INTEL_ prefix to an enum. Add fw_type declaration
from patch 1.Combine two different unions for huc and guc version,
reserved etc into one union with two structs.
v6: rebased. Change fw_type to enum.
v7: rebased. Rename the enum fw_type to intel_uc_fw_type.
Cc: Michal Wajdeczko <michal.wajdeczko.@intel.com> Tested-by: Xiang Haihao <haihao.xiang@intel.com> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com> Signed-off-by: Alex Dai <yu.dai@intel.com> Signed-off-by: Peter Antoine <peter.antoine@intel.com> Reviewed-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com> Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1484356631-16139-3-git-send-email-anusha.srivatsa@intel.com
Anusha Srivatsa [Sat, 14 Jan 2017 01:17:04 +0000 (17:17 -0800)]
drm/i915/guc: Make the GuC fw loading helper functions general
Rename some of the GuC fw loading code to make them more general. We
will utilise them for HuC loading as well.
s/intel_guc_fw/intel_uc_fw/g
s/GUC_FIRMWARE/INTEL_UC_FIRMWARE/g
Struct intel_guc_fw is renamed to intel_uc_fw. Prefix of tts members,
such as 'guc' or 'guc_fw' either is renamed to 'uc' or removed for
same purpose.
v2: rebased on top of nightly.
reapplied the search/replace as upstream code as changed.
v3: removed G from messages in shared fw fetch function.
v4: rebased.Updated dev to dev_priv in intel_guc_setup(), guc_fw_getch()
and intel_guc_init().
v5: rebased. Remove uint32_t fw_type to patch 2. Add INTEL_ prefix for
fields in enum intel_uc_fw_status. Remove uc_dev field since its never
used.Rename uc_fw to just fw and guc_fw to fw to avoid redundency.
v6: rebased. Remove sections of code that were commented and no longer
required.
v7: rebased. Remove uc_fw_ prefix from path and obj fields
in intel_uc_fw struct as suggested by Michal.
v8: rebased. Add declaration of intel_guc_wopcm_size() in
this patch instead of patch 3.
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Arkadiusz Hiler <arkadiusz.hiler@intel.com> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com> Signed-off-by: Alex Dai <yu.dai@intel.com> Signed-off-by: Peter Antoine <peter.antoine@intel.com> Reviewed-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com> Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1484356631-16139-2-git-send-email-anusha.srivatsa@intel.com
Michal Wajdeczko [Fri, 13 Jan 2017 17:41:57 +0000 (17:41 +0000)]
drm/i915/guc: Move GuC log related functions into dedicated file
Functions supporting GuC logging capabilities were spread across
many files, with unnecessary exposures and mixed with unrelated
code. Dedicate file will make maintenance of all GuC functions
easier as more functions are coming to support GuC submissions.
Ville Syrjälä [Mon, 7 Nov 2016 20:20:54 +0000 (22:20 +0200)]
drm/i915: Ignore bogus plane coordinates on SKL when the plane is not visible
When the plane is invisible we may have all sorts of bogus stuff
in the coordinates, which we must ignore or else we might fail the
plane update. This started to happen on SKL when I moved the plane
offset computation to happen in the check phase. Previously we
happily ignored it all since we never called the update_plane hook
with an invisible plane.
Cc: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com> Cc: drm-intel-fixes@lists.freedesktop.org Fixes: b63a16f6cd89 ("drm/i915: Compute display surface offset in the plane check hook for SKL+") Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98258
Testcase: igt/pm_rpm/legacy-planes
Testcase: igt/pm_rpm/universal-planes Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1478550057-24864-3-git-send-email-ville.syrjala@linux.intel.com
Zhenyu Wang [Tue, 17 Jan 2017 14:06:11 +0000 (22:06 +0800)]
drm/i915: Fix a typo in vgt_balloon_space()
Commit 625d988acc28 ("drm/i915: Extract reserving space in the GTT to a
helper") introduces this typo which can cause a driver loading failure
in Linux GVT-g guest.
Fixes: 625d988acc28 ("drm/i915: Extract reserving space in the GTT to a helper") Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Zhiyuan Lv <zhiyuan.lv@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Zhi Wang <zhi.a.wang@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1484661972-9366-1-git-send-email-zhi.a.wang@intel.com Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Chris Wilson [Thu, 29 Dec 2016 14:40:37 +0000 (14:40 +0000)]
drm/i915: Skip switch to kernel context if already done
Some engines are never user or already sitting idle in the kernel
context and for those we can skip flushing the current context for
i915_gem_switch_to_kernel_context(). We used to perform this
optimisation but that was removed for convenience of converting over to
multiple timelines and handling the pending request queues.
From the perspective of writing selftests, reducing the number of
background operations on the engines makes defining assertions easier.
Chris Wilson [Sat, 14 Jan 2017 16:23:33 +0000 (16:23 +0000)]
drm/i915: Construct a request even if the GPU is currently hung
As we now have the ability to directly reset the GPU from the waiter
(and so do not need to drop the lock in order to let the reset proceed)
and also do not lose requests over a reset, we can now simply queue the
request to occur after the reset rather than roundtripping to userspace
(or worse failing with EIO).
Chris Wilson [Sun, 15 Jan 2017 13:47:46 +0000 (13:47 +0000)]
drm/i915: Catch attempting to use the aliasing_gtt's drm_mm
The aliasing_gtt is just that, an alias of the global GTT. We do not
populate it directly, instead we always use the global GTT. Catch any
attempt to incorrectly allocate ranges from the aliasing_gtt.
projects / karo-tx-linux.git / log