York Sun [Mon, 8 Oct 2012 07:44:15 +0000 (07:44 +0000)]
powerpc/corenet2: Add SerDes for corenet2
Create new files to handle 2nd generation Chassis as the registers are
organized differently.
- Add SerDes protocol parsing and detection
- Add support of 4 SerDes
- Add CPRI protocol in fsl_serdes.h
The Common Public Radio Interface (CPRI) is publicly available
specification that standardizes the protocol interface between the
radio equipment control (REC) and the radio equipment (RE) in wireless
basestations. This allows interoperability of equipment from different
vendors,and preserves the software investment made by wireless service
providers.
Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
York Sun [Mon, 8 Oct 2012 07:44:14 +0000 (07:44 +0000)]
powerpc/mpc85xx: Add RCW bits and registers for SerDes for corenet2
Corenet 2nd generation Chassis has different RCW and registers for SerDes.
Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
York Sun [Mon, 8 Oct 2012 07:44:11 +0000 (07:44 +0000)]
powerpc/mpc85xx: Fix core cluster PLL calculation for Chassis generation 2
Corenet based SoCs have different core clocks starting from Chassis
generation 2. Cores are organized into clusters. Each cluster has up to
4 cores sharing same clock, which can be chosen from one of three PLLs in
the cluster group with one of the devisors /1, /2 or /4. Two clusters are
put together as a cluster group. These two clusters share the PLLs but may
have different divisor. For example, core 0~3 are in cluster 1. Core 4~7
are in cluster 2. Core 8~11 are in cluster 3 and so on. Cluster 1 and 2
are cluster group A. Cluster 3 and 4 are in cluster group B. Cluster group
A has PLL1, PLL2, PLL3. Cluster group B has PLL4, PLL5. Core 0~3 may have
PLL1/2, core 4~7 may have PLL2/2. Core 8~11 may have PLL4/1.
PME and FMan blocks can take different PLLs, configured by RCW.
Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
York Sun [Mon, 8 Oct 2012 07:44:08 +0000 (07:44 +0000)]
powerpc/mpc85xx: Enable L2 at the beginning of U-boot for E6500
Using E6500 L1 cache as initram requires L2 cache enabled.
Add l2-cache cluster enabling.
Setup stash id for L1 cache as (coreID) * 2 + 32 + 0
Setup stash id for L2 cache as (cluster) * 2 + 32 + 1
Stash id for L2 is only set for Chassis 2.
Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Andy Fleming <afleming@freescale.com>
Timur Tabi [Fri, 5 Oct 2012 11:09:19 +0000 (11:09 +0000)]
powerpc/85xx: Add P5040 processor support
Add support for the Freescale P5040 SOC, which is similar to the P5020.
Features of the P5040 are:
Four P5040 single-threaded e5500 cores built
Up to 2.4 GHz with 64-bit ISA support
Three levels of instruction: user, supervisor, hypervisor
CoreNet platform cache (CPC)
2.0 MB configures as dual 1 MB blocks hierarchical interconnect fabric
Two 64-bit DDR3/3L SDRAM memory controllers with ECC and interleaving
support Up to 1600MT/s
Memory pre-fetch engine
DPAA incorporating acceleration for the following functions
Packet parsing, classification, and distribution (FMAN)
Queue management for scheduling, packet sequencing and
congestion management (QMAN)
Hardware buffer management for buffer allocation and
de-allocation (BMAN)
Cryptography acceleration (SEC 5.2) at up to 40 Gbps SerDes
20 lanes at up to 5 Gbps
Supports SGMII, XAUI, PCIe rev1.1/2.0, SATA Ethernet interfaces
Two 10 Gbps Ethernet MACs
Ten 1 Gbps Ethernet MACs
High-speed peripheral interfaces
Two PCI Express 2.0/3.0 controllers
Additional peripheral interfaces
Two serial ATA (SATA 2.0) controllers
Two high-speed USB 2.0 controllers with integrated PHY
Enhanced secure digital host controller (SD/MMC/eMMC)
Enhanced serial peripheral interface (eSPI)
Two I2C controllers
Four UARTs
Integrated flash controller supporting NAND and NOR flash
DMA
Dual four channel
Support for hardware virtualization and partitioning enforcement
Extra privileged level for hypervisor support
QorIQ Trust Architecture 1.1
Secure boot, secure debug, tamper detection, volatile key storage
Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
Laurentiu Tudor [Fri, 5 Oct 2012 09:48:54 +0000 (09:48 +0000)]
powerpc/p5040ds: add per pci endpoint liodn offset list
Add a new device tree property named "fsl,liodn-offset-list"
holding a list of per pci endpoint permitted liodn offsets.
This property is useful in virtualization scenarios
that implement per pci endpoint partitioning.
The final liodn of a partitioned pci endpoint is
calculated by the hardware, by adding these offsets
to pci controller's base liodn, stored in the
"fsl,liodn" property of its node.
The liodn offsets are interleaved to get better cache
utilization. As an example, given 3 pci controllers,
the following liodns are generated for the pci endpoints:
pci0: 193 256 259 262 265 268 271 274 277
pci1: 194 257 260 263 266 269 272 275 278
pci2: 195 258 261 264 267 270 273 276 279
Signed-off-by: Laurentiu Tudor <Laurentiu.Tudor@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
Laurentiu Tudor [Fri, 5 Oct 2012 09:48:51 +0000 (09:48 +0000)]
powerpc/85xx: introduce SET_PCI_LIODN_BASE, for setting PCI LIODNs
The liodn for the new PCIE controller included in P5040DS is no longer set
through a register in the guts register block but with one in the PCIE
register block itself. Update the PCIE CCSR structure to add the new liodn
register and add a new dedicated SET_PCI_LIODN_BASE macro that puts
the liodn in the correct register.
Signed-off-by: Laurentiu Tudor <Laurentiu.Tudor@freescale.com> Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
Description: During port initialization, the SRIO port performs
lane synchronization (detecting valid symbols on a lane) and
lane alignment (coordinating multiple lanes to receive valid data
across lanes). Internal errors in lane synchronization and lane
alignment may cause failure to achieve link initialization at
the configured port width.
An SRIO port configured as a 4x port may see one of these scenarios:
1. One or more lanes fails to achieve lane synchronization.
Depending on which lanes fail, this may result in downtraining
from 4x to 1x on lane 0, 4x to 1x on lane R (redundant lane).
2. The link may fail to achieve lane alignment as a 4x, even
though all 4 lanes achieve lane synchronization, and downtrain
to a 1x. An SRIO port configured as a 1x port may fail to complete
port initialization (PnESCSR[PU] never deasserts) because of
scenario 1.
Impact: SRIO port may downtrain to 1x, or may fail to complete
link initialization. Once a port completes link initialization
successfully, it will operate normally.
Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
Fix usb device-tree fixup:
- wrong modification of dr_mode and phy_type when
"usb1" is not mentioned inside hwconfig string;
now allows hwconfig strings like:
"usb2:dr_mode=host,phy_type=ulpi"
- add warning message for using usb_dr_mode
and usb_phy_type env variables (if either is used)
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
P4080/esdhc: make the P4080 ESDHC13 errata workaround conditional
P4080 Rev3.0 fixes ESDHC13 errata, so update the code to make the
workaround conditional.
In formal release document, the errata number should be ESDHC13 instead
of ESDHC136.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
Mark Marshall [Sun, 9 Sep 2012 23:06:03 +0000 (23:06 +0000)]
powerpc mpc85xx: Only clear TSR:WIS in watchdog_reset.
We should only write TSR_WIS to the SPRN_TSR register in
reset_85xx_watchdog.
The old code would cause the timer interrupt to be acknowledged when the
watchdog was reset, and we would then get no more timer interrupts.
This bug would affect all mpc85xx boards that have the watchdog enabled.
Signed-off-by: Mark Marshall <Mark.Marshall@omicron.at> Signed-off-by: Andy Fleming <afleming@freescale.com>
Chris Packham [Thu, 6 Sep 2012 17:28:35 +0000 (17:28 +0000)]
mpc85xx: make gpio_direction_output respect value
Users of familiar with the Linux gpiolib API expect that value parameter
to gpio_direction_output reflects the initial state of the output pin.
gpio_direction_output was always driving the output low, now it drives
it high or low according to the value provided.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Cc: Kyle Moffett <Kyle.D.Moffett@boeing.com> Cc: Andy Fleming <afleming@gmail.com> Cc: Peter Tyser <ptyser@xes-inc.com> Cc: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Andy Fleming <afleming@freescale.com>
Minghuan Lian [Tue, 21 Aug 2012 23:35:42 +0000 (23:35 +0000)]
fsl_pci: use 'Header Type' field to judge PCIE mode
The original code uses 'Programming Interface' field to judge if PCIE is
EP or RC mode, however, T4240 does not support this functionality.
According to PCIE specification, 'Header Type' offset 0x0e is used to
indicate header type, so for PCIE controller, the patch changes code to
use 'Header Type' field to identify if the PCIE is EP or RC mode.
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
Hung-Te Lin [Thu, 11 Oct 2012 15:15:53 +0000 (15:15 +0000)]
input: Add ANSI 3.64 escape sequence generation.
To support Non-ASCII keys (ex, Fn, PgUp/Dn, arrow keys, ...), we need to
translate key code into escape sequence.
(Updated by sjg@chromium.org to move away from a function to store
keycodes, so we can easily record how many were sent. We now need to
return this from input_send_keycodes() so we know whether keys were
generated.)
Signed-off-by: Hung-Te Lin <hungte@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@ti.com>
Marc Jones [Thu, 11 Oct 2012 15:15:52 +0000 (15:15 +0000)]
input: Fix i8042 keyboard reset
The i8042 keyboard reset was not checking the results of the output
buffer after the reset command. This can jam up some KBC/keyboards.
Also, remove a write to the wrong register and the CONFIG setting
around the incorrect write.
Signed-off-by: Marc Jones <marc.jones@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@ti.com>
input: i8042: Provide feature to disable keyboard before booting kernel
The BIOS leaves the keyboard enabled during boot time so that any
keystroke would interfere kernel driver initialization.
Add a way to disable the keyboard to make sure no scancode will be
generated during the boot time. Note that the keyboard will be
re-enabled again after the kernel driver is up.
This code can be called from the board functions. Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@ti.com>
Gabe Black [Fri, 12 Oct 2012 14:02:02 +0000 (14:02 +0000)]
input: Provide a board specific mechanism to decide whether to skip i8042 init
This change adds a board overridable function which can be used to decide
whether or not to initialize the i8042 keyboard controller. On systems where
it isn't actually connected to anything, this can save a significant amount of
boot time.
On Stumpy, this saves about 200ms on boot.
Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@ti.com>
Gabe Black [Fri, 12 Oct 2012 14:02:01 +0000 (14:02 +0000)]
input: Use finer grain udelays while waitng for the i8042 keyboard buffer to empty
On x86, the i8042 keyboard controller driver frequently waits for the keyboard
input buffer to be empty to make sure the controller has had a chance to
process the data it was given. The way the delay loop was structured, if the
controller hadn't cleared the corresponding status bit immediately, it would
wait 1ms before checking again. If the keyboard responded quickly but not
instantly, the driver would still wait a full 1ms when perhaps 1us would have
been sufficient. Because udelay is a busy wait anyway, this change decreases
the delay between checks to 1us.
Also, this change gets rid of a hardcoded 250ms delay.
On Stumpy, this saves 100-150ms during boot.
Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@ti.com>
Stephen Warren [Wed, 10 Oct 2012 07:57:51 +0000 (07:57 +0000)]
disk: initialize name/part fields when returning a whole disk
When get_device_and_partition() finds a disk without a partition table,
under some conditions, it "returns" a disk_partition_t that describes
the entire raw disk. Make sure to initialize all fields in the partition
descriptor in that case.
The value chosen for name is just some arbitrary descriptive string.
The value chosen for info matches the check at the end of
get_device_and_partition(). However, it's probably not that important;
it's not obvious that the value is really used.
Simon Glass [Thu, 27 Sep 2012 15:41:55 +0000 (15:41 +0000)]
arm: fdt: Relocate fdt along with other data
Rather than leave the fdt down next to the code/data, we really should
relocate it along with everything else. For CONFIG_OF_EMBED this happens
automatically, but for CONFIG_OF_SEPARATE it does not.
Add code to copy the fdt and point to the new copy after relocation.
Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com>
When the environment sectors in the flash are big, one get those errors :
mcf547x_8x/start.S:173: relocation truncated to fit: R_68K_PC16 against
symbol `cpu_init_f' defined in .text section in libmcf547x_8x.a(cpu_init.o)
mcf547x_8x/start.S:174: relocation truncated to fit: R_68K_PC16 against
symbol `board_init_f' defined in .text section in libm68k.a(board.o)
Fix that.
Signed-off-by: Philippe De Muyter <phdm@macqel.be> Cc: "Jin Zhengxiong-R64188" <R64188@freescale.com> Cc: Jason Jin <jason.jin@freescale.com>
Marek Vasut [Sat, 21 Jul 2012 05:02:22 +0000 (05:02 +0000)]
dm: Move s3c24xx USB driver to a proper place
Signed-off-by: Marek Vasut <marex@denx.de> Cc: David Müller <d.mueller@elsoft.ch> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: U-Boot DM <u-boot-dm@lists.denx.de>
Marek Vasut [Sat, 21 Jul 2012 05:02:21 +0000 (05:02 +0000)]
dm: wdt: arm: Move tnetv107x into drivers/watchdog/
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Oliver Brown <obrown@adventnetworks.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: U-Boot DM <u-boot-dm@lists.denx.de>
Paul Gortmaker [Wed, 26 Sep 2012 11:43:54 +0000 (11:43 +0000)]
powerpc: delete Wind River SBC8560/8540 support
The sbc8548/60 (both similar, just variations in UART hardware)
support has been removed from the linux kernel as of v3.6-rc1~132
so lets also now remove it from the u-boot tree as well.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Marek Vasut [Tue, 9 Oct 2012 07:20:22 +0000 (07:20 +0000)]
fs: fat: Fix mkcksum() function parameters
The mkcksum() function now takes one parameter, the pointer to
11-byte wide character array, which it then operates on.
Currently, the function is wrongly passed (dir_entry)->name, which
is only 8-byte wide character array. Though by further inspecting
the dir_entry structure, it can be noticed that the name[8] entry
is immediatelly followed by ext[3] entry. Thus, name[8] and ext[3]
in the dir_entry structure actually work as this 11-byte wide array
since they're placed right next to each other by current compiler
behavior.
Depending on this is obviously wrong, thus fix this by correctly
passing both (dir_entry)->name and (dir_entry)->ext to the mkcksum()
function and adjust the function appropriately.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@ti.com>
Stephen Warren [Mon, 8 Oct 2012 08:14:40 +0000 (08:14 +0000)]
disk: part_dos: print partition UUID in partition list
This information may be useful to compare against command "part uuid",
or if you want to manually paste the information into the kernel
command-line.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
[trini: print_one_part / print_part_dos output strings didn't quite
match before the changes] Signed-off-by: Tom Rini <trini@ti.com>
Stephen Warren [Mon, 8 Oct 2012 08:14:37 +0000 (08:14 +0000)]
disk: part_efi: set bootable flag in partition objects
A partition is considered bootable if it either has the "legacy BIOS
bootable" flag set, or if the partition type UUID matches the standard
"system" type.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Stephen Warren [Mon, 8 Oct 2012 08:14:35 +0000 (08:14 +0000)]
disk: part_efi: add new partition attribute definitions
Add no_block_io_protocol and legacy_bios_bootable attribute definitions.
These are sourced from UEFI Spec 2.3, page 105, table 19. Credits to the
libparted source for the specification pointer.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Stephen Warren [Mon, 8 Oct 2012 08:14:34 +0000 (08:14 +0000)]
disk: part_efi: print partition UUIDs
When printing the partition table, print the partition type UUID and the
individual partition UUID. Do this unconditionally, since partition UUIDs
are useful.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Stephen Warren [Mon, 8 Oct 2012 08:14:33 +0000 (08:14 +0000)]
disk: part_efi: re-order partition list printf, change case
The partition name is a long variable-length string. Move it last on
the line to ensure consistent layout and that the entries align with
the "header" line. Also, surround it in quotes, so if it's empty, it's
obvious that something is still being printed.
Also, change the case of the LBA numbers; lower-case looks nicer in my
opinion, and will be more consistent with the UUID printing that is
added later in this series.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Stephen Warren [Mon, 8 Oct 2012 08:14:32 +0000 (08:14 +0000)]
disk: part_efi: remove indent level from loop
Simplify the partition printing loop in print_part_efi() to bail out
early when the first invalid partition is found, rather than indenting
the whole body of the loop. This simplifies later patches.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Stephen Warren [Mon, 8 Oct 2012 07:45:54 +0000 (07:45 +0000)]
disk: get_device_and_partition() return value fixes
When no valid partitions are found, guarantee that we return -1. This
most likely already happens, since the most recent get_partition_info()
will have returned an error. However, it's best to be explicit.
Remove an unnecessary assignment of ret=0 in the success case; this value
is over-written with the processed partition ID later.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Pavel Herrmann [Sun, 7 Oct 2012 05:56:10 +0000 (05:56 +0000)]
make ide_led() a weak alias
Make ide_led() a weak alias instead of global/local function/empty macro
based on CONFIG_IDE_LED value and/or board-specific CONFIGs, to get rid of
board-specific code in cmd_ide.c
Define dummy values to get rid of compoler errors in case where ide_led()
used to be an empty macro
Signed-off-by: Pavel Herrmann <morpheus.ibis@gmail.com>
Pavel Herrmann [Tue, 9 Oct 2012 07:04:39 +0000 (07:04 +0000)]
change all versions of input_data() and output_data() to global weak aliases
This changes input_data() and friends from static function to global symbols
under weak alias, to enable board specific overrides (and therefore get rid of
board-specific code in cmd_ide.c)
Also declare ide_bus_offset in the header file, so other files can use
ATA_CURR_BASE as well.
Signed-off-by: Pavel Herrmann <morpheus.ibis@gmail.com>
Pavel Herrmann [Tue, 9 Oct 2012 07:01:56 +0000 (07:01 +0000)]
split mpc8xx hooks from cmd_ide.c
move most of mpc8xx hooks from cmd_ide.c into ide_preinit() and newly created
ide_init_postreset() (invoked after calling ide_reset after ide_preinit),
some cleanup to make checkpatch happy, enable IDE init hooks in configs of
affected boards.
confusingly, these hooks are used by more than just mpc8xx-based boards, and
therefore are placed in arch/ppc/lib/
note: checkpatch still emits warnings about using volatile
Signed-off-by: Pavel Herrmann <morpheus.ibis@gmail.com>
Marek Vasut [Sat, 6 Oct 2012 14:07:06 +0000 (14:07 +0000)]
kerneldoc: stdio: tmpl: Add stdio template
Add STDIO documentation template.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Marek Vasut <marek.vasut@gmail.com> Cc: Tom Rini <trini@ti.com>
[trini: Fix DOCBOOKS line as we don't have linker_lists yet] Signed-off-by: Tom Rini <trini@ti.com>
Marek Vasut [Sat, 6 Oct 2012 14:07:04 +0000 (14:07 +0000)]
serial: Reorder get_current()
Reorder the get_current() function to make it a bit more readable.
The code does not grow and there is minor change in the code logic,
where dev != NULL is now checked in any case.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Marek Vasut <marek.vasut@gmail.com> Cc: Tom Rini <trini@ti.com>
Marek Vasut [Sat, 6 Oct 2012 14:07:03 +0000 (14:07 +0000)]
serial: Reorder serial_assign()
Reorder serial_assign() function to get rid of the extra level of
indentation. Also, adjust the return value to be -EINVAL instead of
positive one to be more consistent.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Marek Vasut <marek.vasut@gmail.com> Cc: Tom Rini <trini@ti.com>
Marek Vasut [Sat, 6 Oct 2012 14:07:02 +0000 (14:07 +0000)]
serial: Use default_serial_puts() in drivers
Replace the in-place ad-hoc implementation of serial_puts() within
the drivers with default_serial_puts() call. This cuts down on the
code duplication quite a bit.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Marek Vasut <marek.vasut@gmail.com> Cc: Tom Rini <trini@ti.com>
Marek Vasut [Sat, 6 Oct 2012 14:07:01 +0000 (14:07 +0000)]
serial: Implement default_serial_puts()
U-Boot contains a lot of duplicit implementations of serial_puts()
call which just pipes single characters into the port in loop. Implement
function that does this behavior into common code, so others can make
easy use of it.
This function is called default_serial_puts() and it's sole purpose
is to call putc() in loop on the whole string passed to it.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Marek Vasut <marek.vasut@gmail.com> Cc: Tom Rini <trini@ti.com>
Stefan Roese [Wed, 19 Sep 2012 03:18:53 +0000 (03:18 +0000)]
mpc82xx: Remove BMW board port
As the board seems to be unmaintained for some time, lets remove
the support in mainline completely.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Marek Vasut <marek.vasut@gmail.com> Cc: James F. Dougherty <jfd@broadcom.com> Cc: Wolfgang Denk <wd@denx.de> Acked-by: Marek Vasut <marex@denx.de>
nds32: Change macro from BOARD_LATE_INIT to CONFIG_BOARD_LATE_INIT
With almost all the architecture and board BOARD_LATE_INIT does not use.
CONFIG_BOARD_LATE_INIT is used instead.
This changed CONFIG_BOARD_LATE_INIT from BOARD_LATE_INIT.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> CC: Macpaul Lin <macpaul@andestech.com>
[trini: Fixup for context changes] Signed-off-by: Tom Rini <trini@ti.com>
projects / karo-tx-uboot.git / log