Richard Zhu [Thu, 5 Feb 2015 08:13:07 +0000 (16:13 +0800)]
MLK-10203-1 pci: imx: enable imx6qdl pcie support
enable imx6qdl pcie on imx_3.14 kernel
and add the pcie pm workaround for imx6qdl.
------
L2 can exit by 'reset' or Inband beacon (from remote EP)
toggling phy_powerdown has same effect as 'inband beacon'
So, toggle bit18 of GPR1, used as a workaround of errata
"PCIe PCIe does not support L2 Power Down"
WARNING: This is not official workaround for ERR005723.
Fortunately, we don't encounter issue with this workaround.
User should take own risk to use it.
Li Jun [Tue, 3 Feb 2015 05:40:47 +0000 (13:40 +0800)]
MLK-10179-1 usb: chipidea: add a flag for turn on vbus early for host
Some PHY of imx usb need power supply from vbus to make it work, if there
is no vbus, USB PHY will not in correct state when the controller starts to
work, for host, this requires vbus should be turned on before setting port
power(PP) of ehci, to work with this kind of USB PHY design, this patch adds
a flag CI_HDRC_IMX_VBUS_EARLY_ON, can be checked by host driver to turn on
vbus while start host.
Robin Gong [Tue, 10 Feb 2015 00:27:42 +0000 (08:27 +0800)]
MLK-10238-3: ARM: imx: gpc: correct the function and structure
Correct the function and structure since update the below patch
(24d70aa Revert "base: power: Add generic OF-based power domain look-up")
(dc092bc PM / Domains: Add generic OF-based PM domain look-up) Signed-off-by: Robin Gong <b38343@freescale.com>
(cherry picked from commit bddfa2a6ffa844d9a21a63dab974b993e4eccc41)
drivercore / platform: Convert to dev_pm_domain_attach|detach()
Previously only the ACPI PM domain was supported by the platform bus.
Let's convert to the common attach/detach functions for PM domains,
which currently means we are extending the support to include the
generic PM domain as well.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Tested-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Kevin Hilman <khilman@linaro.org> Reviewed-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
(cherry picked from commit cb51841397e8e5714cf82a7f91053f6e1fb80d1f)
(cherry picked from commit cd4edd4cb84f9dadb9e8f12b1e1f10bf2ef28749)
PM / Domains: Add APIs to attach/detach a PM domain for a device
To maintain scalability let's add common methods to attach and detach
a PM domain for a device, dev_pm_domain_attach|detach().
Typically dev_pm_domain_attach() shall be invoked from subsystem level
code at the probe phase to try to attach a device to its PM domain.
The reversed actions may be done a the remove phase and then by
invoking dev_pm_domain_detach().
When attachment succeeds, the attach function should assign its
corresponding detach function to a new ->detach() callback added in the
struct dev_pm_domain.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Tested-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Kevin Hilman <khilman@linaro.org> Reviewed-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
(cherry picked from commit 46420dd73b800f87a19af13af5883855cf38cb08)
(cherry picked from commit 451a5b00e51410adc16f8349ed753f7eced46bc5)
This patch introduces generic code to perform PM domain look-up using
device tree and automatically bind devices to their PM domains.
Generic device tree bindings are introduced to specify PM domains of
devices in their device tree nodes.
Backwards compatibility with legacy Samsung-specific PM domain bindings
is provided, but for now the new code is not compiled when
CONFIG_ARCH_EXYNOS is selected to avoid collision with legacy code.
This will change as soon as the Exynos PM domain code gets converted to
use the generic framework in further patch.
This patch was originally submitted by Tomasz Figa when he was employed
by Samsung.
PM / domains: Remove dev_irq_safe from genpd config
The genpd dev_irq_safe configuration somewhat overlaps with the runtime
PM pm_runtime_irq_safe() option. Also, currently genpd don't have a
good way to deal with these device. So, until we figured out if and how
to support this in genpd, let's remove the option to configure it.
Tushar Behera [Fri, 28 Mar 2014 05:20:21 +0000 (10:50 +0530)]
PM / domains: Add pd_ignore_unused to keep power domains enabled
Keep all power-domains already enabled by bootloader on, even if no
driver has claimed them. This is useful for debug and development, but
should not be needed on a platform with proper driver support.
Paul Gortmaker [Tue, 21 Jan 2014 21:23:10 +0000 (16:23 -0500)]
drivers/base: delete non-required instances of include <linux/init.h>
None of these files are actually using any __init type directives
and hence don't need to include <linux/init.h>. Most are just a
left over from __devinit and __cpuinit removal, or simply due to
code getting copied from one driver to the next.
Cc: Len Brown <len.brown@intel.com> Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Acked-by: Pavel Machek <pavel@ucw.cz> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Acked-by: Mark Brown <broonie@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 4272b9611c30f99f51590085998129480f2fe45e)
(cherry picked from commit 9680398849d6b7f74cf8874522c16064a3df535d)
Add support to leave PLL1 enabled since its required whenever ARM-PODF is
changed. With this patch PLL1 is set to bypassed mode (and enabled) whenever
ARM is sourced from step_clk.
Add support to leave PLL1 enabled since its required whenever ARM-PODF is
changed. With this patch PLL1 is set to bypassed mode (and enabled) whenever
ARM is sourced from step_clk.
Add support to leave PLL1 enabled since its required whenever ARM-PODF is
changed. With this patch PLL1 is set to bypassed mode (and enabled) whenever
ARM is sourced from step_clk.
Also change imx6dl.dtsi to use #defines instead of hard-coded numbers for
busfreq clocks.
Shengjiu Wang [Mon, 9 Feb 2015 10:19:38 +0000 (18:19 +0800)]
MLK-10214-2: regmap: rbtree: Fix the shift issue.
The right shift should be changed to left shift. Lower register
address correspond to LSB of the cache_present, if right shift
old cache_present, the valid bits is moved out, then the new
cache_present is not correct.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
The SDMA driver doesn't support DMA_PAUSE and DMA_RESUME commands.
So this patch use TRIGGER_START for TRIGGER_RESUME and TRIGGER_SUSPEND
for TRIGGER_STOP as a work around so that Audio can normally stop
and restart its corresponding DMA channels.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
We've got a race condition bewteen the interrupt handler mxsfb_irq_handler()
and the function mxsfb_wait_for_vsync() on the flag host->wait4vsync.
If a CUR_FRAME_DONE interrupt comes and we just finish setting host->wait4vsync
to be 1 in mxsfb_wait_for_vsync() before we go to the interrupt handler, we are
likely to see the VSYNC_EDGE interrupt status bit asserted in the interrupt
handler for the CUR_FRAME_DONE interrupt, disable the not yet enabled VSYNC_EDGE
interrupt and finally clear host->wait4vsync.
Then, we go back to mxsfb_wait_for_vsync() and enable the VSYNC_EDGE interrupt
with host->wait4vsync=0. This may leave the VSYNC_EDGE interrupt enabled all
the time and never get a chance to be disabled in the interrupt handler.
So, we are deemed to hang up because the uncleared VSYNC_EDGE interrupt status
bit will cause the CPU to be trapped forever, according to SoC designer's words.
This patch corrects the interrupt handling to handle only the interrupts which
are acknowledged by checking both the interrupt enablement bits and the status
bits but not the status bits only. This may avoid any bogus interrupt from
being handled.
Dan Douglass [Thu, 20 Feb 2014 17:25:56 +0000 (11:25 -0600)]
ENGR00292341 imx6sl hwrng
Add hwrng support for i.MX6SL.
1. Add RNG driver. This driver originated as fsl-rngc.c. It
has been modified to support device tree. The name has been
changed since it supports both b and c variants of RNG.
2. Added clock and compatible info to the device tree data.
3. Added the entry in the options in the Kconfig for hwrng.
Signed-off-by: Dan Douglass <dan.douglass@freescale.com> Signed-off-by: Victoria Milhoan <vicki.milhoan@freescale.com>
(cherry picked from commit 586166b87eee2e5ec40331032aed8c8eaec884f3)
Xianzhong [Fri, 6 Feb 2015 06:58:38 +0000 (14:58 +0800)]
MGS-504 imx: i.MX6DL gpu3d_core_clk should be 528M instead of 396M
This patch is refined from the previous commit 20d89c9c909:
-Update the parent of gpu2d_core for mx6dl.
-Update the parent of gpu3d_shader and gpu3d_core for mx6dl.
-Update the clock of gpu3d_shader and gpu3d_core for mx6dl.
The code change is cherry-picked from patch 00e75bcba16d.
Signed-off-by: Loren Huang <b02279@freescale.com> Signed-off-by: Xianzhong <b07117@freescale.com> Acked-by: Jason Liu
(cherry picked from commit e63222bdba7c2de063c6367017ccd6a1d1d3cc22)
ENGR00299939-3 USB: imx6x: Add dummy LDO2p5 regulator for VBUS wakeup
LDO2p5 cannot be disabled in low power idle mode when the USB driver
enables VBUS wakeup. To identify when LDO2p5 can be disabled add a dummy
regulator that the USB driver will enable when VBUS wakeup is required.
Bai Ping [Fri, 30 Jan 2015 10:56:40 +0000 (18:56 +0800)]
MLK-10188 arm: imx: Add dummy LDO2p5 regulator for VBUS wakeup
LDO2p5 cannot be disabled in low power idle mode when the USB driver
enables VBUS wakeup. To identify when LDO2p5 can be disabled add a dummy
regulator that the USB driver will enable when VBUS wakeup is required.
This patch is copied from commit 7d849e4d9ebca3c as code the structure has
changed too many. directly cherry-pick has too many conflicts to resolve
conflict: arch/arm/match-imx/match-imx6sx.c
Some patches have not been moved from 3.10 to 3.14. Rewrite the logic
as what the pre-commit has done and resolve the conflict.
Sandor Yu [Mon, 2 Feb 2015 05:54:23 +0000 (13:54 +0800)]
MLK-10192: dts: Move sii902x hdmi function to imx6sx sdb lcdif1 dts
-Sii902x hdmi daughter connect to lcdif1 interface,
move this function to lcdif1 dts.
-Sii902x hdmi driver share the reset pin with ov5640 driver,
one driver will been reset by the other driver,
so move sii902x reset pin configure to licdif1 dts.
ENGR00279980 ubi: attach: do not return -EINVAL if the mtd->numeraseregions is 1
If the master mtd does not have any slave mtd partitions,
and its numeraseregions is one(only has one erease block), and
we attach the master mtd with : ubiattach -m 0 -d 0
We will meet the error:
-------------------------------------------------------
root@freescale ~$ ubiattach /dev/ubi_ctrl -m 0 -d 0
UBI: attaching mtd0 to ubi0
UBI error: io_init: multiple regions, not implemented
ubiattach: error!: cannot attach mtd0
error 22 (Invalid argument)
-------------------------------------------------------
In fact, if there is only one "erase block", we should not
prevent the attach.
Sandor Yu [Fri, 30 Jan 2015 09:25:40 +0000 (17:25 +0800)]
MLK-10182: cam :Module can't load/unload twice without camera connected
If no camera connected, ov5640 driver loading failed,
but the driver have register subdev by v4l2_async_register_subdev.
v4l2_async_unregister_subdev function in remove function
and not been called when module unloading.
Same subdev can not register twice, v4l2 async driver will print
error message in the second module loading.
Move v4l2_async_register_subdev function after ov5640 is succeed
found to fix the issue.
Currently wpa_supplicant in yocto rootfs does not work properly due to RFKILL
feature and Yocto upgrade.
It causes the WiFi in new Yocto rootfs unable to get ip address via DHCP.
The root cause is still unkown.
This patch temporarily disable RFKILL feature to make WiFi work first.
Current there's no user of RFKILL in Yocto rootfs.
We will enable it again if needed after the issue is fixed.
Dong Aisheng [Fri, 8 Nov 2013 07:48:23 +0000 (15:48 +0800)]
ENGR00286971-1 imx6q: add sanity check for getting gpio for flexcan
This is used to avoid a warning:
WARNING: at /home/b29397/work/projects/linux-2.6-imx/drivers/gpio/gpiolib.c:126
gpio_to_desc+0x30/0x44()
invalid GPIO -517
Modules linked in:
....
gpiod_request: invalid GPIO
Sandor Yu [Fri, 23 Jan 2015 06:18:01 +0000 (14:18 +0800)]
MLK-10137:csi: Return physical address in querybuffer call
GST application want to use physical address even video buffer
allocated with type of V4L2_MEMORY_MMAP.
So add a trick in querybuffer function, if video buffer flags
is setting to V4L2_BUF_FLAG_MAPPED, overwirte m.offset with
physical address.
Bai Ping [Thu, 29 Jan 2015 11:09:39 +0000 (19:09 +0800)]
MLK-10175 arm: imx6: Skip gating QSPI2 clk when M4 is enabled
When the M4 core is enabled on i.MX6, the QSPI2 clk can't be gated,
otherwise, the M4 will hang. This patch add a check to make sure when
M4 is enabled, just skip the QSPI2 clk gating operations.
Li Jun [Wed, 10 Sep 2014 09:49:33 +0000 (17:49 +0800)]
ENGR00325832 usb: chipidea: usb vbus glitch check logic change
This patch changes the vbus glitch check to cover usb otg certification
case, so the possible cases of vbus rise:
- USB vbus can reach AVV(4.4v), valid vbus.
- USB vbus keeps above BSV(0.8v) but lower than AVV(4.4v) for
more than 300ms, we think it's valid vbus event, this can meet
usb otg certificataion case(B device can do connection in 1s when
vbus is 4.0v).
- USB vbus cannot be kept above BSV(0.8v) for more than 300ms,
it's a vbus glitch.
In case of vbus drop: if the vbus on flag is not set, it's a vbus glitch,
otherwise it's a valid vbus drop event.
Acked-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Li Jun <b47624@freescale.com>
(cherry picked from commit de5ab444839b6d1492d697256ea2b8a1dcaffc62)
We add vbus glitch handling for both BSV rise and drop interruptes.
If it is a vbus glitch (higher than BSV but cannot reach AVV), ignore it.
Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Li Jun <b47624@freescale.com>
(cherry picked from commit 827f2fe71e6222882930db7e89460087cb3bce5b)
Shengjiu Wang [Tue, 27 Jan 2015 08:44:34 +0000 (16:44 +0800)]
MLK-10161-3: ARM: imx6sx: Add SPDIF_GCLK clock in clock tree
As spdif driver will register SPDIF clock to regmap, regmap will do
clk_prepare in init function, so SPDIF clock is prepared in probe, then its
root clock (pll clock) is prepared also, which cause the arm can't enter
low power mode.
Add SPDIF_GCLK in clock tree which share same gate bits with SPDIF clock.
Its root clock is ipg clock, and register it to regmap, then the issue can be
fixed.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Shengjiu Wang [Tue, 27 Jan 2015 08:43:17 +0000 (16:43 +0800)]
MLK-10161-2: ARM: imx6sl: Add SPDIF_GCLK clock in clock tree
As spdif driver will register SPDIF clock to regmap, regmap will do
clk_prepare in init function, so SPDIF clock is prepared in probe, then its
root clock (pll clock) is prepared also, which cause the arm can't enter
low power mode.
Add SPDIF_GCLK in clock tree which share same gate bits with SPDIF clock.
Its root clock is ipg clock, and register it to regmap, then the issue can be
fixed.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Shengjiu Wang [Tue, 27 Jan 2015 08:24:53 +0000 (16:24 +0800)]
MLK-10161-1: ARM: imx6q: Add SPDIF_GCLK clock in clock tree
As spdif driver will register SPDIF clock to regmap, regmap will do
clk_prepare in init function, so SPDIF clock is prepared in probe, then its
root clock (pll clock) is prepared also, which cause the arm can't enter
low power mode.
Add SPDIF_GCLK in clock tree which share same gate bits with SPDIF clock.
Its root clock is ipg clock, and register it to regmap, then the issue can be
fixed.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Li Jun [Tue, 27 Jan 2015 09:11:14 +0000 (17:11 +0800)]
MLK-10101-4 usb: add otg_fsm pointer in usb_bus
Add otg_fsm pointer in struct of usb_bus for access otg_fsm via bus.
Original way was to put it in usb_otg, then usb host can access otg_fsm via
hcd->usb_phy->otg->fsm, since usb_phy will not be the future direction, instead
phy is prefered, so this way may not work. It's more direct and simple to put
it in usb_bus.
Li Jun [Sun, 28 Sep 2014 05:55:01 +0000 (13:55 +0800)]
MLK-9618-1 doc: usb: chipidea: select gadget drivers for otg compliance test
This patch adds guide for selecting available gadget drivers for otg and EH
compliance tests.
Acked-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Li Jun <b47624@freescale.com>
(cherry picked from commit 520cac9e4fe938887dd45b5b4df6c8e35e125a59)
Li Jun [Mon, 1 Sep 2014 07:44:15 +0000 (15:44 +0800)]
MLK-9617-2 usb: gadget: set bcdOTG of OTG descriptor for gadget drivers
This patch sets bcdOTG field of OTG descriptor for below 3 gadget drivers:
- ether
- mass storage
- serial
OTG and EH supplement release number in binary-coded decimal(i.e. 2.0 is 0200H).
Acked-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Li Jun <b47624@freescale.com>
(cherry picked from commit a426ace68acd9b770ce3a609f92029782b8ca1d1)
Li Jun [Thu, 9 Jan 2014 02:25:55 +0000 (10:25 +0800)]
MLK-9617-1 usb: otg: update otg descriptor definition for OTG and EH 2.0
Add one field bcdOTG for OTG and EH supplement release number in OTG
descriptor according to On-The-Go and Embedded Host Supplement to the
USB Revision 2.0 Specification Revision 2.0 version 1.1a.
Acked-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Li Jun <b47624@freescale.com>
(cherry picked from commit 1bf5e829100a2922826818bd8cbb18ee81452cfc)
The default TPL is for USB OTG & EH compliance test, the supported
class is: mass storage, hub, and hid.
Besides, we add one match criterion that matching targeted device
through class at interface descriptor.
Tested-by: Li Jun <b47624@freescale.com> Signed-off-by: Peter Chen <peter.chen@freescale.com>
(cherry picked from commit 483c071d989ceb36cacf76e1e3e779c67e5b8280)
Li Jun [Mon, 22 Sep 2014 08:19:59 +0000 (16:19 +0800)]
ENGR00331016-5 usb: chipidea: otg: clear b_bus_req when vbus is off
In case of b_peripheral --> b_wait_acon --> b_idle due to vbus off
in b_wait_acon state, b_bus_req cannot be cleared in b_idle state,
which result in b device will do data pulse because b_bus_req is set.
This patch fix this issue by clear the input variable b_bus_req when
vbus is off.
Acked-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Li Jun <b47624@freescale.com>
(cherry picked from commit bc600546bf9193f1a39186ad4c07a5fd497c7bfd)
Since BSV irq is enabled for B-device all the time, so B_SESS_VLD timer
is not required, and also no need to check BSV status when B_ASE0_BRST
timer timeout.
Acked-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Li Jun <b47624@freescale.com>
(cherry picked from commit a7d0b864b613c555add9ea864eb8c163e1d3362e)
Li Jun [Tue, 27 Jan 2015 07:01:57 +0000 (15:01 +0800)]
MLK-10101-3 usb: chipidea: otg: enable BSV irq when OTG B-device in host mode
When B-device in host mode, if Vbus is off by A-device or A-device is removed,
B-device should update charger status correctly. This patch enables BSV irq
for B-device in all states, so the charger connection and removal can be early
handled by BSV change irq.
Li Jun [Tue, 27 Jan 2015 03:30:35 +0000 (11:30 +0800)]
MLK-10101-2 usb: chipidea: otg: delay to enter low power mode for a_host
There is 2s delay for controller resume from usb wakeup case already,
in OTG fsm mode, A-dev can start a new session via sys input file(means
not via usb wakeup), in this case, A-dev still need the 2s delay for
host root hub access registers, otherwise system will hang due to access
register at low power mode.
Peter Chen [Fri, 3 Jan 2014 05:45:30 +0000 (13:45 +0800)]
ENGR00292408-2 usb: chipidea: imx: enable different wakeup setting
We have different wakeup setting for different roles:
For peripheral-only mode, we may only enable vbus wakeup.
The Micro-AB cable should not be considered as wakeup source.
For host-only mode, the ID change or vbus change should not be
considered as wakeup source.
For OTG mode, all wakeup setting should be considered as wakeup
source.
Peter Chen [Mon, 22 Sep 2014 08:45:39 +0000 (16:45 +0800)]
ENGR00324639 usb: chipidea: set ITC to 0 for device mode
ITC (Interrupt Threshold Control) is used to set the maximum rate at which
the host/device controller will issue interrupts. The default value is 8 (1ms)
for it. EHCI core will modify it to 1, but device mode keeps it as default
value.
In some use cases like this CR, it uses Android ADB to transfer data, ADB
only has one usb request for each direction, and maximum payload data is
only 4KB, so the speed is 4MB/s at most, it needs controller to trigger
interrupt as fast as possible to increase the speed. The USB performance
will be better if the interrupt can be triggered faster.
In this case, we set ITC default value as 0, which will trigger USB interrupt
immediately once the transfer has completed.
Peter Chen [Wed, 5 Nov 2014 06:58:32 +0000 (14:58 +0800)]
MLK-9785-5 usb: chipidea: usbmisc_imx: add unburst setting for imx6
With this setting and AHBBRST at SBUSCFG as "Incremental burst of
unspecified length", each unburst size can be taken as one single transfer.
It is benefit for unburst size transfer.
For imx6, below AHB burst setting are better performance:
- Incremental burst of unspecified length, see SBUSCFG, $BASE + 0x90
- Set Both RX/TX burst size as 16 DWords, see BURSTSIZE, $BASE + 0x160
The AHBBRST at SBUSCFG and RX/TX burst size at BURSTSIZE are implementation
dependent, each platform may have different values, and some values may not be
optimized.
The glue layer can override ahb burst configuration value by setting flag
CI_HDRC_OVERRIDE_AHB_BURST and ahbburst_config.
The glue layer can override RX/TX burst size by setting flag
CI_HDRC_OVERRIDE_BURST_LENGTH and burst_length.
Peter Chen [Tue, 4 Nov 2014 12:46:15 +0000 (20:46 +0800)]
MLK-9785-1 usb: host: ehci-hcd: enable park mode
Enable park mode will improve the performance a lot at USB ethernet use
case, but a little at USB mass storage use case, and it is not harm from
the tests. Below the performance comparison at imx6sl:
USB Ethernet (Mbps)
Default Enable Park
TX 192 262
RX 262 290
USB Mass Storage (MB/s)
Read 21.8 22.9
Write 19.5 22.8
Peter Chen [Thu, 30 Oct 2014 03:10:04 +0000 (11:10 +0800)]
MLK-9770-3 usb: chipidea: imx: add stream mode enable for device mode at imx6sl/imx6sx
Stream mode enable is known for better performance
(eg, rx at g_ncm: 175Mbps->250Mbps), and stream mode
enable has been passed with stress tests at device mode
for imx6sl and imx6sx, and no issue is found.
Peter Chen [Thu, 30 Oct 2014 01:15:15 +0000 (09:15 +0800)]
MLK-9770-2 usb: chipidea: define stream mode disable for both roles
The chipidea IP has different limitations for host and device mode,
see below errata, we may need to enable SDIS(Stream Disable Mode)
at host mode, but we don't want it at device mode at some situations.
TAR 9000378958
Title: Non-Double Word Aligned Buffer Address Sometimes Causes Host to Hang on OUT Retry
Impacted Configuration: Host mode, all transfer types
Description:
The host core operating in streaming mode may under run while sending the data packet of an OUT transaction. This under run can occur if there are unexpected system delays in fetching the remaining packet data from memory. The host forces a bad CRC on the packet, the device detects the error and discards the packet. The host then retries a Bulk, Interrupt, or Control transfer if an under run occurs according to the USB specification.
During simulations, it was found that the host does not issue the retry of the failed bulk OUT. It does not issue any other transactions except SOF packets that have incorrect frame numbers.
The second failure mode occurs if the under run occurs on an ISO OUT transaction and the next ISO transaction is a zero byte packet. The host does not issue any transactions (including SOFs). The device detects a Suspend condition, reverts to full speed, and waits for resume signaling.
A third failure mode occurs when the host under runs on an ISO OUT and the next ISO in the schedule is an ISO OUT with two max packets of 1024 bytes each.
The host should issue MDATA for the first OUT followed by DATA1 for the second. However, it drops the MDATA transaction, and issues the DATA1 transaction.
The system impact of this bug is the same regardless of the failure mode observed. The host core hangs, the ehci_ctrl state machine waits for the protocol engine to send the completion status for the corrupted transaction, which never occurs. No indication is sent to the host controller driver, no register bits change and no interrupts occur. Eventually the requesting application times out.
Detailed internal behavior:
The EHCI control state machine (ehci_ctrl) in the DMA block is responsible for parsing the schedules and initiating all transactions. The ehci_ctrl state machine passes the transaction details to the protocol block by writing the transaction information in to the TxFIFO. It then asserts the pe_hst_run_pkt signal to inform the host protocol state machine (pe_hst_state) that there is a packet in the TxFIFO.
A tag of 0x0 indicates a start of packet with the data providing the following information:
35:32 Tag
31:30 Reserved
29:23 Endpoint (lowest 4 bits)
22:16 Address
15:10 Reserved
9:8 Endpoint speed
7:6 Endpoint type
5:6 Data Toggle
3:0 PID
The pe_hst_state reads the packet information and constructs the packet and issues it to the PHY interface.
The ehci_ctrl state machine writes the start transaction information in to the TxFIFO as 0x03002910c for the OUT packet that had the under run error. However, it writes 0xC3002910C for the retry of the Out transaction, which is incorrect.
The pe_hst_state enters a bus timeout state after sending the bad CRC for the packet that under ran. It then purges any data that was back filled in to the TxFIFO for the packet that under ran. The pe_hst_state machine stops purging the TxFIFO when it is empty or if it reads a location that has a tag of 0x0, indicating a start of packet command.
The pe_hst_state reads 0xC3002910C and discards it as it does not decode to a start of packet command. It continues to purge the OUT data that has been pre-buffered for the OUT retry . The pe_hst_state detects the hst_packet_run signal and attempts to read the PID and address information from the TxFIFO. This location has packet data and so does not decode to a valid PID and so falls through to the PE_HST_SOF_LOAD state where the frame_num_counter is updated. The frame_num_counter is updated with the data in the TxFIFO. In this case, the data is incorrect as the ehci_ctrl state machine did not initiate the load. The hst_pe_state machine detects the SOF request signal and sends an SOF with the bad frame number. Meanwhile, the ehci_ctrl state machine waits indefinitely in the run_pkt state waiting for the completion status from pe_hst_state machine, which will never happen.
The ISO failure case is similar except that there is no retry for ISO. The ehci_ctrl state machine moves to the next transfer in the periodic schedule. If the under run occurs on the last entry of the periodic list then it moves to the Async schedule.
In the case of ISO OUT simulations, the next ISO is a zero byte OUT and again the start of packet command gets corrupted. The TxFIFO is empty when the hst_pe_state attempts to read the Address and PID information as the transaction is a zero byte packet. This results in the hst_pe_state machine staying in the GET_PID state, which means that it does not issue any transactions (including SOFs). The device detects a Suspend condition and reverts to full speed mode and waits for a Resume or Reset signal.
The EHCI specification allows a Non-DoubleWord (32 bits) offset to be used as a current offset for Buffer Pointer Page 0 of the qTD. In Non-DoubleWord aligned cases, the core reads the packet data from the AHB memory, performs the alignment operation before writing it in to the TxFIFO as a 32 bit data word. An End Of Packet tag (EOP) is written to the TxFIFO after all the packet data has been written in to the TxFIFO. The alignment function is reset to Idle by the EOP tag. The corruption of the start of packet command arises because the packet buffer for the OUT transaction that under ran is not aligned to a DoubleWord, and hence no EOP tag is written to the TxFIFO. The alignment function is still active when the start packet information is written in to the TxFIFO for the retry of the bulk packet or for the next transaction in the case of an under run on an ISO. This results in the corruption of the start tag and the transaction information.
Click for waveform showing the command 0x 0000300291 being written in to the TX FIFO for the Out that under ran.
Click for waveform showing the command 0xC3002910C written to the TxFIFO instead of 0x 0000300291
Versions affected: Versions 2.10a and previous versions
How discovered: Customer simulation
Workaround:
1- The EHCI specification allows a non-DoubleWord offset to be used as a current offset for Buffer Pointer Page 0 of the qTD. However, if a DoubleWord offset is used then this issue does not arise.
2- Use non streaming mode to eliminate under runs.
Resolution:
The fix involves changes to the traffic state machine in the vusb_hs_dma_traf block. The ehci_ctrl state machine updates the context information by encoding the transaction results on the hst_op_context_update signals at the end of a transaction. The signal hst_op_context_update is added to the traffic state machine, and the tx_fifo_under_ran_r signal is generated if the transaction results in an under run error. Click for waveform
The traffic state machine then traverses to the do_eop states if the tx_fifo_under_ran error is asserted. Thus an EOP tag is written in to the TxFIFO as shown in this waveform .
The EOP tag resets the align state machine to the Idle state ensuring that the next command written by the echi_ctrl state machine does not get corrupted.
File(s) modified:
RTL code fixed: …..
Method of reproducing: This failure cannot be reproduced in the current test bench.
Date Found: March 2010
Date Fixed: June 2010
Update information:
Added the RTL code fix
Peter Chen [Sat, 13 Sep 2014 07:10:04 +0000 (15:10 +0800)]
ENGR00325724-4 usb: chipidea: udc: disconnect host if system enters suspend
It is better we disconnect (pulldown dp) host when the system enters
suspend if the host did not suspend bus beforehand, it can avoid
unnecessary udc suspend irq during usb enters suspend. This unexpected
suspend irq occurs due to the udc still pulls up dp, but the host
suspends bus due to it finds the device has disconnected. The device
turns off high speed terminal will be considered a disconnection event
from the host.
Peter Chen [Tue, 26 Nov 2013 05:33:21 +0000 (13:33 +0800)]
ENGR00289645 usb: chipidea: udc: don't do hardware access if gadget has stopped
After _gadget_stop_activity is executed, we can consider the hardware
operation for gadget has finished, and the udc can be stopped and enter
low power mode. So, any later hardware operations (from usb_ep_ops APIs
or usb_gadget_ops APIs) should be considered invalid, any deinitializatons
has been covered at _gadget_stop_activity.
I meet this problem when I plug out usb cable from PC (using g_mass_storage),
my callstack like: vbus interrupt->.vbus_session->composite_disconnect
->pm_runtime_put_sync(&_gadget->dev), the composite_disconnect will
call fsg_disable, but fsg_disable calls usb_ep_disable using async way,
there are register accesses for usb_ep_disable. So sometimes, I get system
hang due to visit register without clock, sometimes not.
The Linux Kernel USB maintainer Alan Stern suggests this kinds of solution.
See: http://marc.info/?l=linux-usb&m=138541769810983&w=2.
Richard Zhu [Mon, 26 Jan 2015 06:35:14 +0000 (14:35 +0800)]
MLK-10146 arm: mcc: fix one compile error when DYNAMIC_DEBUG is set
When CONFIG_DYNAMIC_DEBUG is configured, there is one
compile error in mcc_linux.c file, the memcpy() is not
defined.
Fix it by including the linux/string.h header explicitly.
Signed-off-by: Richard Zhu <Richard.Zhu@freescale.com>
Li Jun [Tue, 20 Jan 2015 08:03:38 +0000 (16:03 +0800)]
MLK-10086-3 usb: phy-nop: add the implementation of .set_suspend
Add clock enable/disable at .set_suspend if the PHY has
suspend requirement, it can be benefit of power saving for
phy and the whole system (parent clock may also be disabled).
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Li Jun [Tue, 20 Jan 2015 08:03:36 +0000 (16:03 +0800)]
MLK-10086-2 ARM: imx6: add dts entries for hsic controller
- Add usbphy_nop, hsic uses nop phy driver
- Add anatop phandle, hsic needs to access anatop register to
change osc clock for different boards
- Add phy_type, hsic needs to config PHY parameters at portsc
- For imx6q-arm2 board, hsic has pin conflict with ethernet, we create a
dedicated dts(imx6q-arm2-hsic.dts) for it with ethernet disabled, besides
please make sure keep the line of data and strobe unchanged between board
boots up and enable hsic controller.
Signed-off-by: Peter Chen <peter.chen@freescale.com>