Russell King [Tue, 8 Jul 2014 11:39:57 +0000 (12:39 +0100)]
net: fec: improve safety of suspend/resume/transmit timeout paths
We should hold the rtnl lock while suspending, resuming or processing
the transmit timeout to ensure that nothing will interfere while we
bring up, take down or restart the hardware. The transmit timeout
could run if we're preempted during suspend.
Acked-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
Russell King [Mon, 7 Jul 2014 23:23:30 +0000 (00:23 +0100)]
net: fec: fix missing kmalloc() failure check in fec_enet_alloc_buffers()
fec_enet_alloc_buffers() assumes that kmalloc() will never fail, which
is an invalid assumption. Fix this by implementing a common error
cleanup path, and use it to also clean up after failed bounce buffer
allocation.
Acked-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
Russell King [Mon, 7 Jul 2014 23:23:25 +0000 (00:23 +0100)]
net: fec: ensure fec_enet_free_buffers() properly cleans the rings
Ensure that we do not double-free any allocations, and that any transmit
skbuffs are properly freed when we clean up the rings.
Acked-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
Russell King [Mon, 7 Jul 2014 23:23:19 +0000 (00:23 +0100)]
net: fec: clean up transmit descriptor setup
Avoid writing any state until we're certain we can proceed with the
transmission: this avoids writing mapping error address values to the
descriptors, or setting the skbuff pointer until we have successfully
mapped the skb.
Acked-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
Russell King [Mon, 7 Jul 2014 23:23:14 +0000 (00:23 +0100)]
net: fec: make rx skb handling more robust
Allocate, and then map the receive skb before writing any data to the
ring descriptor or storing the skb. When freeing the receive ring
entries, unmap and free the skb, and then clear the stored skb pointer.
This means we have ring data and skb pointer in one of two states:
either both fully setup, or nothing setup.
This simplifies the cleanup, as we can use just the skb pointer to
indicate whether the descriptor is setup, and thus avoids potentially
calling dma_unmap_single() on a DMA error value.
Acked-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
Russell King [Mon, 7 Jul 2014 23:23:09 +0000 (00:23 +0100)]
net: fec: remove useless fep->opened
napi_disable() waits until the NAPI processing has completed, and then
prevents any further polls. At this point, the driver then clears
fep->opened. The NAPI poll function uses this to stop processing in
the receive path. Hence, it will never see this variable cleared,
because the NAPI poll has to complete before it will be cleared.
Therefore, this variable serves no purpose, so let's remove it.
Acked-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
Russell King [Mon, 7 Jul 2014 23:23:04 +0000 (00:23 +0100)]
net: fec: stop the phy before shutting down the MAC
When the network interface goes down, stop the phy to prevent further
link up status changes before taking the MAC or netif sections down.
This prevents further reception of link up events which could
potentially call fec_restart().
Since phy_stop() takes the mutex which adjust_link() runs under, we
also ensure that adjust_link() will not already be processing a link
up event.
We also need to do this when suspending as well - we don't want a
mis-timed phy state change to restart the MAC after we have stopped
it for suspend, and thus need to restart the phy when resuming.
Acked-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
Russell King [Mon, 7 Jul 2014 23:22:59 +0000 (00:22 +0100)]
net: fec: ensure that a disconnected phy isn't configured
When we disconnect from a phy, we should forget our pointer to it so we
don't accidentally try to configure it. We handle a NULL phy pointer
correctly in most places, except fec_enet_set_pauseparam(). Fix this
too.
Acked-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
Russell King [Mon, 7 Jul 2014 23:22:54 +0000 (00:22 +0100)]
net: fec: remove checking for NULL phy_dev in fec_enet_close()
fep->phy_dev can not be NULL here for two reasons:
- fec_enet_open() will have successfully connected the phy, or will have
failed.
- fec_enet_open() will have called phy_start(fep->phy_dev), which
unconditionally dereferences this pointer.
If it were to be NULL here, then fec_enet_open() will have already
oopsed.
Acked-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
Russell King [Mon, 7 Jul 2014 23:22:49 +0000 (00:22 +0100)]
net: fec: use netif_tx_disable() rather than netif_stop_queue()
We use netif_stop_queue() in several places where we want to ensure that
the start_xmit function is not running. netif_stop_queue() is not
sufficient to achieve that - it merely sets a flag to indicate that the
transmit queue(s) should not be run.
netif_tx_disable() gives this guarantee, since it takes the transmit
queue lock while marking the queue stopped. This will wait for the
transmit function to complete before returning.
Acked-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
Russell King [Mon, 7 Jul 2014 23:22:44 +0000 (00:22 +0100)]
net: fec: fix interrupt handling races
While running: while :; do iperf -c <HOST> -P 4; done, transmit timeouts
are regularly reported. With the tx ring dumping in place, we can see
that all entries are in use, and the hardware has finished transmitting
these packets. However, the driver has not reclaimed these ring
entries.
This can occur if the interrupt handler is invoked at the wrong moment -
eg:
The result is that we clear the transmit interrupt, but we don't trigger
any cleaning of the transmit ring. Instead, use a different strategy:
- When receiving a transmit or receive interrupt, disable both tx and rx
interrupts, but do not acknowledge them. Schedule a napi poll. Don't
loop.
- When we are polled, read IEVENT, acknowledging the pending transmit
and receive interrupts, before then going on to process the
appropriate rings.
This allows us to avoid the race, and has a number of other advantages:
- we cut down on the number of transmit interrupts we have to process.
- we only look at the rings which have pending events.
- we gain additional throughput: the iperf total bandwidth increases
from about 180Mbps to 240Mbps:
Acked-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
Russell King [Mon, 7 Jul 2014 23:22:39 +0000 (00:22 +0100)]
net: fec: fix ethtool set_pauseparam duplex bug
Setting the pause parameters causes a running network interface to be
restarted. However, the restart forces the FEC into half-duplex mode,
whether or not the remote end is in half-duplex mode. Misconfigured
duplex mode is a known source of problems on a link.
Fix this by always preserving the duplex mode on configuration changes.
Acked-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
Russell King [Mon, 7 Jul 2014 23:22:34 +0000 (00:22 +0100)]
net: fec: iMX6 FEC does not support half-duplex gigabit
The iMX6 gigabit FEC does not support half-duplex gigabit operation.
Phys attacked to the FEC may support this, and we currently do nothing
to disable this feature. This may result in an invalid configuration.
Mask out phy support for gigabit half-duplex operation.
Acked-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
Fugang Duan [Wed, 18 Jun 2014 00:33:52 +0000 (08:33 +0800)]
net: fec: Don't clear IPV6 header checksum field when IP accelerator enable
The commit 96c50caa5148 (net: fec: Enable IP header hardware checksum)
enable HW IP header checksum for IPV4 and IPV6, which causes IPV6 TCP/UDP
cannot work. (The issue is reported by Russell King)
For FEC IP header checksum function: Insert IP header checksum. This "IINS"
bit is written by the user. If set, IP accelerator calculates the IP header
checksum and overwrites the IINS corresponding header field with the calculated
value. The checksum field must be cleared by user, otherwise the checksum
always is 0xFFFF.
So the previous patch clear IP header checksum field regardless of IP frame
type.
In fact, IP HW detect the packet as IPV6 type, even if the "IINS" bit is set,
the IP accelerator is not triggered to calculates IPV6 header checksum because
IPV6 frame format don't have checksum.
So this results in the IPV6 frame being corrupted.
The patch just add software detect the current packet type, if it is IPV6
frame, it don't clear IP header checksum field.
Cc: Russell King <linux@arm.linux.org.uk> Reported-and-tested-by: Russell King <linux@arm.linux.org.uk> Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Nimrod Andy [Thu, 12 Jun 2014 00:16:23 +0000 (08:16 +0800)]
net: fec: Add software TSO support
Add software TSO support for FEC.
This feature allows to improve outbound throughput performance.
Tested on imx6dl sabresd board, running iperf tcp tests shows:
- 16.2% improvement comparing with FEC SG patch
- 82% improvement comparing with NO SG & TSO patch
$ ethtool -K eth0 tso on
$ iperf -c 10.192.242.167 -t 3 &
[ 3] local 10.192.242.108 port 35388 connected with 10.192.242.167 port 5001
[ ID] Interval Transfer Bandwidth
[ 3] 0.0- 3.0 sec 181 MBytes 506 Mbits/sec
During the testing, CPU loading is 30%.
Since imx6dl FEC Bandwidth is limited to SOC system bus bandwidth, the
performance with SW TSO is a milestone.
CC: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> CC: Eric Dumazet <eric.dumazet@gmail.com> CC: David Laight <David.Laight@ACULAB.COM> CC: Li Frank <B20596@freescale.com> Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Nimrod Andy [Thu, 12 Jun 2014 00:16:21 +0000 (08:16 +0800)]
net: fec: Increase buffer descriptor entry number
In order to support SG, software TSO, let's increase BD entry number.
CC: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> CC: Eric Dumazet <eric.dumazet@gmail.com> CC: David Laight <David.Laight@ACULAB.COM> Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Nimrod Andy [Thu, 12 Jun 2014 00:16:19 +0000 (08:16 +0800)]
net: fec: Enable IP header hardware checksum
IP header checksum is calcalated by network layer in default.
To support software TSO, it is better to use HW calculate the
IP header checksum.
FEC hw checksum feature request the checksum field in frame
is zero, otherwise the calculative CRC is not correct.
For segmentated TCP packet, HW calculate the IP header checksum again,
it doesn't bring any impact. For SW TSO, HW calculated checksum bring
better performance.
Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Fabio Estevam [Mon, 2 Jun 2014 18:44:30 +0000 (15:44 -0300)]
fec: Include pinctrl header file
Commit 5bbde4d2ec ("net: fec: use pinctrl PM helpers") caused the following
build error on m68k:
drivers/net/ethernet/freescale/fec_main.c: In function 'fec_enet_open':
drivers/net/ethernet/freescale/fec_main.c:1819:2: error: implicit declaration of function 'pinctrl_pm_select_default_state' [-Werror=implicit-function-declaration]
drivers/net/ethernet/freescale/fec_main.c: In function 'fec_enet_close':
drivers/net/ethernet/freescale/fec_main.c:1863:2: error: implicit declaration of function 'pinctrl_pm_select_sleep_state' [-Werror=implicit-function-declaration]
In order to fix the build error, include the linux/pinctrl/consumer.h header
file.
Reported-by: kbuild test robot <fengguang.wu@intel.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Nimrod Andy [Tue, 27 May 2014 07:51:08 +0000 (15:51 +0800)]
net: fec: use pinctrl PM helpers
when system suspend, need to set pins to low power state to
save IO power consumption, there are three states of pinctrl:
"default", "idle" and "sleep". Currently enet supports default
and sleep state.
Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Nimrod Andy [Tue, 20 May 2014 05:23:09 +0000 (13:23 +0800)]
net: fec: correct the MDIO clock source
Since imx serials FEC/ENET MDIO clock source is internal ipg clock,
and "ahb" clock is defined as FEC/ENET bus clock, so the patch just
correct the fec driver MDIO clock source.
Signed-off-by: Fugang Duan <B38611@freescale.com> Acked-by: Frank Li <frank.li@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Nimrod Andy [Tue, 20 May 2014 05:22:51 +0000 (13:22 +0800)]
net: fec: optimize the clock management to save power
Add below clock management to save fec power:
- After probe, disable all clocks incluing ipg, ahb, enet_out, ptp clock.
- Open ethx interface enable necessary clocks.
Close ethx interface disable all clocks.
The patch also encapsulates the all enet clocks enable/disable to
.fec_enet_clk_enable(), which can reduce the repetitional code in
driver.
Signed-off-by: Fugang Duan <B38611@freescale.com> Acked-by: Frank Li <Frank.li@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Lucas Stach [Sun, 30 Mar 2014 19:32:08 +0000 (21:32 +0200)]
net: fec: make sure to init MAC address
Though we made sure to acquire a valid MAC for
the netdevice we never actually programmed it
into the hardware.
So if the bootloader did not set the MAC,
network operation would only work if userspace
explicitly asked to transfer the MAC to hardware.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: David S. Miller <davem@davemloft.net>
Ezequiel Garcia [Mon, 19 May 2014 16:59:52 +0000 (13:59 -0300)]
net: Add a software TSO helper API
Although the implementation probably needs a lot of work, this initial API
allows to implement software TSO in mvneta and mv643xx_eth drivers in a not
so intrusive way.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Daniel Mack [Fri, 27 Jun 2014 23:23:35 +0000 (01:23 +0200)]
net: fix circular dependency in of_mdio code
Commit 86f6cf4127 (net: of_mdio: add of_mdiobus_link_phydev()) introduced a
circular dependency between libphy and of_mdio.
depmod: ERROR: <modroot>/kernel/drivers/net/phy/libphy.ko in
dependency cycle!
depmod: ERROR: <modroot>/kernel/drivers/of/of_mdio.ko in dependency cycle!
The problem is that of_mdio.c references &mdio_bus_type and libphy now
references of_mdiobus_link_phydev.
Fix this by not exporting of_mdiobus_link_phydev() from of_mdio.ko.
Make it a static function in mdio_bus.c instead.
Signed-off-by: Daniel Mack <zonque@gmail.com> Reported-by: Jeff Mahoney <jeffm@suse.com> Fixes: 86f6cf4127 (net: of_mdio: add of_mdiobus_link_phydev()) Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Daniel Mack [Mon, 2 Jun 2014 11:32:46 +0000 (13:32 +0200)]
of: of_mdio: export symbol of_mdiobus_link_phydev
Make of_mdiobus_link_phydev externally available.
This fixes CONFIG_OF_MDIO=m.
Signed-off-by: Daniel Mack <zonque@gmail.com> Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Fixes: 86f6cf41272 ("net: of_mdio: add of_mdiobus_link_phydev()") Signed-off-by: David S. Miller <davem@davemloft.net>
Daniel Mack [Mon, 2 Jun 2014 11:32:45 +0000 (13:32 +0200)]
net: of_mdio: use int type for address variable
Use int rather than u32 to fix the following warning:
drivers/of/of_mdio.c:147 of_mdiobus_register() warn: unsigned 'addr' is
never less than zero.
Signed-off-by: Daniel Mack <zonque@gmail.com> Fixes: 8f8382888cba ("net: of_mdio: factor out code to parse a phy's 'reg' property") Signed-off-by: David S. Miller <davem@davemloft.net>
Daniel Mack [Sat, 24 May 2014 07:34:27 +0000 (09:34 +0200)]
net: of_mdio: don't store the length of a property if we don't need to
of_get_property() can be called with NULL as 2nd argument if the caller
is not interested in the length of a property. Use that here so we can
get rid of a variable.
Signed-off-by: Daniel Mack <zonque@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Daniel Mack [Sat, 24 May 2014 07:34:26 +0000 (09:34 +0200)]
net: of_mdio: add of_mdiobus_link_phydev()
Add a function to walk the list of subnodes of a mdio bus and look for
a node that matches the phy's address with its 'reg' property. If found,
set the of_node pointer for the phy. This allows auto-probed pyh
devices to be augmented by information passed in via DT.
Signed-off-by: Daniel Mack <zonque@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Daniel Mack [Sat, 24 May 2014 07:34:25 +0000 (09:34 +0200)]
net: of_mdio: factor out code to parse a phy's 'reg' property
Factor out some logic into of_mdio_parse_addr() so it can be reused
later. While at it, use of_property_read_u32() rather than open-coding
the same logic again.
Signed-off-by: Daniel Mack <zonque@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
of: mdio: fix compile warning in of_mdiobus_register_phy()
Commit de906af1 (net: phy: make of_set_phy_supported work with genphy driver)
removed the last user of variable 'max_speed' in function
of_mdiobus_register_phy(), leading to compile warning "unused variable
‘max_speed’ [-Wunused-variable]". Thus remove it.
Signed-off-by: Christian Engelmayer <cengelma@gmx.at> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Sascha Hauer [Wed, 21 May 2014 13:29:45 +0000 (15:29 +0200)]
net: phy: make of_set_phy_supported work with genphy driver
of_set_phy_supported allows overwiting hardware capabilities of
a phy with values from the devicetree. of_set_phy_supported is
called right after phy_device_register in the assumption that
phy_probe is called from phy_device_register and the features
of the phy are already initialized. For the genphy driver this
is not true, here phy_probe is called later during phy_connect
time. phy_probe will then overwrite all settings done from
of_set_phy_supported
Fix this by moving of_set_phy_supported to the core phy code
and calling it from phy_probe.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: David S. Miller <davem@davemloft.net>
Florian Fainelli [Thu, 22 May 2014 16:47:50 +0000 (09:47 -0700)]
of: mdio: remove of_phy_connect_fixed_link
All in-tree drivers have been converted to use the new pair of
functions: of_is_fixed_phy_link() plus of_phy_register_fixed_link(), we
can now safely remove of_phy_connect_fixed_link.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Thomas Petazzoni [Fri, 16 May 2014 14:14:05 +0000 (16:14 +0200)]
of: provide a binding for fixed link PHYs
Some Ethernet MACs have a "fixed link", and are not connected to a
normal MDIO-managed PHY device. For those situations, a Device Tree
binding allows to describe a "fixed link" using a special PHY node.
This patch adds:
* A documentation for the fixed PHY Device Tree binding.
* An of_phy_is_fixed_link() function that an Ethernet driver can call
on its PHY phandle to find out whether it's a fixed link PHY or
not. It should typically be used to know if
of_phy_register_fixed_link() should be called.
* An of_phy_register_fixed_link() function that instantiates the
fixed PHY into the PHY subsystem, so that when the driver calls
of_phy_connect(), the PHY device associated to the OF node will be
found.
These two additional functions also support the old fixed-link Device
Tree binding used on PowerPC platforms, so that ultimately, the
network device drivers for those platforms could be converted to use
of_phy_is_fixed_link() and of_phy_register_fixed_link() instead of
of_phy_connect_fixed_link(), while keeping compatibility with their
respective Device Tree bindings.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Tested-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Jason Gunthorpe [Wed, 19 Mar 2014 22:15:24 +0000 (16:15 -0600)]
of_mdio: Allow the DT to specify the phy ID and avoid autoprobing
This makes the generic of_mdiobus_register parse the DT compatible string for
the pattern ethernet-phy-idAAAA.BBBB. If present it should be a value that
matches the phy-id register normally readable through MDIO.
When the ID is given the phy autoprobing is defeated and the phy is
created directly.
This is necessary to support phy's that cannot be autoprobed when
of_mdiobus_register is called. Specifically, my case has the phy in reset at
of_mdiobus_register, the reset is only released once the ethernet driver
starts, before it attaches to the phy.
Tested on ARM Kirkwood with phy id 0x01410e90 (Marvell 88E1318)
Signed-off-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
Shawn Guo [Fri, 27 Jun 2014 08:32:46 +0000 (16:32 +0800)]
ENGR00318063-14: ARM: imx6sx: set pll2_bus as the default parent of QSPI clock
We already know that pll2_bus is the best parent of QSPI clock. Let's
set it up in clock initialization as the default, so that we can save
those implicit parent switching and rate changing calls from clock
framework.
shawn.guo: cherry-pick commit ecef6a715f1a from imx_3.10.y
Shawn Guo [Fri, 27 Jun 2014 04:39:54 +0000 (12:39 +0800)]
ENGR00318063-13: ARM: imx: do not reparent during clk_set_rate
Without flag CLK_SET_RATE_NO_REPARENT, during clk_set_rate call, clock
framework will spontaneously switch parent if there is another parent
clock which can provide a better rate. Such implicit clock reparent
sometimes results in unexpected clock tree topology change. Also, with
flag CLK_SET_PARENT_GATE in place, the clk_set_rate() can fail due to
this spontaneous clock switch. So let's stop clock framework from doing
this spontaneous reparent by adding flag CLK_SET_RATE_NO_REPARENT for
mux clocks.
While at it, adds the missing CLK_SET_PARENT_GATE flag for the fixup mux
clock also.
shawn.guo: cherry-pick commit f99c1687c820 from imx_3.10.y
ENGR00318063-12: ARM: imx6: enable clocks only after all parent and rate are initialized
This is a forward porting of commit ebf625e1a496 (ENGR00318063-12: ARM:
imx6: enable clocks only after all parent and rate are initialized) from
imx_3.10.y to imx_3.14.y.
Shawn Guo [Thu, 5 Jun 2014 08:54:31 +0000 (16:54 +0800)]
ENGR00318063-9: clk: do not allow parent switching with another mux being child
When switching parent clock with another basic mux clock being its
child, a glitch might be generated and propagated to downstream clocks
through this child mux.
The patch adds a flag CLK_IS_BASIC_MUX to identify the basic mux clocks,
and prohibit the parent switching when the clock itself is the parent of
any basic mux clock. With this check, the parent switching of a clock
has to happen before the child mux switches to this clock path.
shawn.guo: cherry-pick commit 8df4202f6a46 from imx_3.10.y
ENGR00318063-7: ARM: imx6q: mmdc_ch_axi clock should be non-gateable
Per the updated CCM chapter, there is no gate for clock mmdc_ch1_axi.
And there is a gate for mmdc_ch0_axi, but the gate also controls FABRIC
clock, which means the gate cannot be gated anyway. That said,
implementing these two clocks as gate does not make too much sense.
Remove these two gate clocks by pointing IMX6QDL_CLK_MMDC_CH0_AXI and
IMX6QDL_CLK_MMDC_CH1_AXI to the dividers.
Shawn Guo [Wed, 28 May 2014 07:46:44 +0000 (15:46 +0800)]
ENGR00318063-6: ARM: imx6: add CLK_SET_RATE_GATE flag for PLL clocks
The i.MX6 Reference Manual requires PLLs to be powered down before
changing its rate. Let's add flag CLK_SET_RATE_GATE for PLLs and
audio/video dividers to enforce the check at clock core level. So any
clk_set_rate() call from clients on these clocks will fail if the clocks
are not disabled and unprepared.
shawn.guo: cherry-pick commit 763c47cb3684 from imx_3.10.y
ENGR00329450 ARM: imx: set CLK_SET_RATE_GATE for gate and divider clocks
A recent QSPI boot failure (5% possibility) on i.MX6SX reminds us that
the peripheral clocks are still missing the check, rate cannot be
changed when the clock is enabled due to the glitchy multiplexers.
Commit a63839445ad3 (ENGR00325423: ARM: imx: pllv3 can only be
configured when it's powered off) adds the check for PLL clocks but
misses the peripheral clocks. The patch uses the help from clock
framework to check the condition with flag CLK_SET_RATE_GATE.
We adds flag CLK_SET_RATE_GATE for i.MX gate and divider clocks on
which the client drivers usually make clk_set_rate() call, so that the
call will fail when clock is still on instead of standing the risk of
running into glitch issue.
shawn.guo: cherry-pick commit 6487168bc783 from imx_3.10.y
Shawn Guo [Mon, 26 May 2014 08:37:25 +0000 (16:37 +0800)]
ENGR00318063-5: ARM: imx: set CLK_SET_PARENT_GATE flag for glitchy mux clocks
The mux clocks found on imx6 SoCs are all glitchy ones except
pll1_sw_clk_sel, axi_sel, periph_clk_sel and periph2_clk_sel. When
switching parent clock of a glitchy mux without gating, a glitch could
be generated and propagated into the downstream divider, and hence locks
up the divider and results in no clock output.
To avoid the situation, the parent switching should happen only when
the clock is gated. Add CLK_SET_PARENT_GATE flag for i.MX mux clocks,
so that clock core will make that check during clk_set_parent() call.
Since glitchless clocks do not need this flag, we create
imx_clk_mux_glitchless() without this flag for them. The periph_clk_sel
and periph2_clk_sel are registered by imx_clk_busy_mux() which does not
set this flag anyway, so they need no change.
shawn.guo: cherry-pick commit 10bae51219b3 from imx_3.10.y
The current imx6sx clock driver combines two mux clocks ocram_alt_sel
and ocram_sel into one, while ocram_alt_sel is a glitchy mux and
ocram_sel is a glitchless one. Fix it to match the clock tree in
Reference Manual.
One thing clk API clients need to take care is that clk_set_parent()
can be called on glitchy ocram_alt_sel only when ocram_sel selects the
other path, i.e. periph. Otherwise, a glitch could be generated on
ocram_alt_sel and get propagated into the divider ocram_podf. In that
case, ocram_podf gets locked up and ocram clock has no output.
shawn.guo: cherry-pick commit a3b6793d21d9 from imx_3.10.y
The current imx6q clock driver combines two mux clocks axi_alt_sel and
axi_sel into one, while axi_alt_sel is a glitchy mux and axi_sel is a
glitchless one. Fix it to match the clock tree in Reference Manual.
shawn.guo: cherry-pick commit 973abca21604 from imx_3.10.y
Let's say clock A and B are two gate clocks that share the same register
bit in hardware. Therefore they are registered as shared gate clocks
with imx_clk_gate2_shared().
In a scenario that only clock A is enabled by clk_enable(A) while B is
not used, the shared gate will be unexpectedly disabled in hardware.
It happens because clk_enable(A) increments the share_count from 0 to 1,
while clock B is unused to clock core, and therefore the core function
will just disable B by calling clk->ops->disable() directly. The
consequence of that call is share_count is decremented to 0 and the gate
is disabled in hardware, even though clock A is still in use.
The patch fixes the issue by initializing the share_count per hardware
state and returns enable state per share_count from .is_enabled() hook,
in case it's a shared gate.
While at it, add a check in clk_gate2_disable() to ensure it's never
called with a zero share_count.
The ocotp also plays as a fuse device beside the system controller we
already have in device tree. Let's add a device node for the fuse
device for imx6qdl and imx6sl.
While at it, the patch also drops "fsl,imx6q-ocotp" and
"fsl,imx6sl-ocotp" from system controller compatible string, since
it's not used, and use node name ocotp-ctrl and ocotp-fuse for system
controller and fuse device respectively.
shawn.guo: cherry-pick commit 1a8c2aef633c from imx_3.10.y, and add the
same change for imx6sx.
Jason Liu [Tue, 5 Nov 2013 04:03:18 +0000 (12:03 +0800)]
ARM: i.MX6: add more chip revision support
Add more revision support for the new i.MX6DQ tape-out (TO1.5). This
TO1.5 is the Rev 1.3 as documented in i.MX6DQ data sheet, because TO1.3
and TO1.4 are never revealed.
Signed-off-by: Jason Liu <r64343@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
ENGR00277955-2 rtc: rtc-snvs: support wakeup system from freeze mode
To support wakeup system from freeze mode of suspend,
device's irq can NOT be disabled during devices suspend,
so we need to add IRQF_NO_SUSPEND flag to irqflags.
ENGR00277955-1 keyboard: gpio_keys: support wakeup system from freeze mode
To support wakeup system from freeze mode of suspend,
device's irq can NOT be disabled during devices suspend,
so we need to add IRQF_NO_SUSPEND flag to irqflags.
Luwei Zhou [Fri, 20 Dec 2013 02:23:39 +0000 (10:23 +0800)]
ENGR00281813 input: mma8450: evbug module will keep print message.
evbug will open the mma8450 on i.MX6SL_EVK and mma8450 will work in 2G mode by default.
That is the reason why mma8450 logs will be printed out. The main changes is below:
* Remove the open(), close() hook out of the drivers. The open() and close()
hook in input framwork is defined as void type. It isn't strictly safe in
logic when some error happends. So remove them out.
* Modify the mma8450 to standby mode by default. It will be more power saving
and there would be no log printing out after booting up.
* Provide the sys interface to modify the mma8450 work modes. Then the higher
layer can modify the the mma8450 work mode via the interface. It would be
much safer.There would be a sclaemode interface in the folder of
/sys/devices/soc0/soc.1/2100000.aips-bus/21a0000.i2c/i2c-0/0-001c/scalemode
User can use cat to read the current scalemode and echo to write. The mode
is defined as: MODE_STANDBY: 0 MODE_2G:1 MODE_4G:2 MODE_8G:3
* Add mutex to protect and some error handling.
ENGR00277864 input: mma8450: Add chip id check in probe
Add chip ID check in probe function. The mma8450 is
on the E-INK daughter board. When the daughter board
is not pluged, there would be polling error log
continuously. Add the check to avoid this.
ENGR00321358-2 dts: imx6sx: change m_can message ram to a small size
We met an issue that access the 0x2600 offset of message ram
does not work although the mx6sx spec claims a 16KB size.
The reason is still unkown.
Change the RAM size to a small size to use the first 2K
to avoid such issue.
Dong Aisheng [Thu, 19 Jun 2014 10:49:37 +0000 (18:49 +0800)]
ENGR00319455-1 can: m_can: add Bosch M_CAN controller support
The patch adds the basic CAN TX/RX function support for Bosch M_CAN controller.
For TX, only one dedicated tx buffer is used for sending data.
For RX, RXFIFO 0 is used for receiving data to avoid overflow.
Rx FIFO 1 and Rx Buffers are not used currently, as well as Tx Event FIFO.
Due to the message ram can be shared by multi m_can instances
and the fifo element is configurable which is SoC dependant,
the design is to parse the message ram related configuration data from device
tree rather than hardcode define it in driver which can make the message
ram using fully transparently to M_CAN controller driver,
then we can gain better driver maintainability and future features upgrade.
M_CAN also supports CANFD protocol features like data payload up to 64 bytes
and bitrate switch at runtime, however, this patch still does not add the
support for these features.
Dong Aisheng [Mon, 24 Feb 2014 06:25:12 +0000 (14:25 +0800)]
ENGR00300439-5 can: flexcan: parse stop mode control bits from device tree
Starting from IMX6, the flexcan stop mode control bits is SoC specific,
move it out of IP driver and parse it from devicetree.
It's good from maintain perspective and can avoid adding too many SoC
specifi bits in driver but with no IP changes when the IMX SoC series
keep growing.
ENGR00258885 flexcan: fix errata ERR005829 that MB may fail to be sent
This is an issue from IC errata ERR005829 which is described as follows:
----------------------------------------------------------
FlexCAN does not transmit a message that is enabled to be transmitted
in a specific moment during the arbitration process. The following
conditions are necessary to have the issue.
- Only one MB is configured to be transmitted
- The write which enables the MB to be transmitted (write on Control status
word) happens during a specific clock during the arbitration process.
After this arbitration process occurs, the bus goes to Idle state and no
new message is received on bus.
For example:
1) MB13 is deactivated on RxIntermission (write 0x0 on CODE field from Control
Status word) - First write on CODE
2) Reconfigure the ID and data fields
3) Enable the MB13 to be transmitted on BusIdle (write 0xC on Code
field) - Second write on code
4) CAN bus keeps in Idle state
5) No write on Control status from any MB happens.
During the second write on code (step 3), the write must happen one clock
before the current MB13 is to be scanned by arbitration process.
In this case, it does not detect the new code (0xC) and no new arbitration is
scheduled.
The suggested workaround which is implemented in this patch is:
The workaround consists of executing two extra steps:
6. Reserve the first valid mailbox as an inactive mailbox (CODE=0b1000).
If RX FIFO is disabled, this mailbox must be MB0. Otherwise, the first
valid mailbox can be found by using table "RX FIFO filters" on FlexCAN3 chapter.
7. Write twice INACTIVE code (0b1000) into the first valid mailbox.
Note: The first mailbox cannot be used for reception or transmission process.
-------------------------------------------------------------
Note: Although the currently flexcan driver does not have the step 1 to run,
it's also possible to meet this issue in theory because we can not predict
when the arbitration is scheduled.
With a modified can-utils/canfdttest tool simulating Pingpong test, we were
able to reproduce this issue after running a about one day.
After applying this patch, we ran six days and did not see the issue happen
again on two mx6q sabrelite boards.
Note: with a few minors change for new kernel and change errata id from
ERR005641 to ERR005829 which is the open one in freescale website.
Dong Aisheng [Wed, 6 Nov 2013 11:10:28 +0000 (19:10 +0800)]
ENGR00286724-8 can: flexcan: add self wakeup support
If wakeup is enabled, enter stop mode, else enter disabled mode.
Self wake can only work on stop mode.
For imx6q, the stop request has to be mannually assert on
IOMUX GPR13[28:29] register, we use syscon to control that bit.
Antoine Ténart [Wed, 30 Jul 2014 18:13:56 +0000 (20:13 +0200)]
ata: libahci_platform: move port_map parameters into the AHCI structure
This patch moves force_port_map and mask_port_map into the
ahci_host_priv structure. This allows to modify them into the AHCI
framework. This is needed by the new dt bindings representing ports as
the port_map mask is computed automatically.
Parameters modifying force_port_map, mask_port_map and flags have been
removed from the ahci_platform_init_host() function, and inputs in the
ahci_host_priv structure are now directly filed.
Signed-off-by: Antoine Ténart <antoine.tenart@free-electrons.com> Signed-off-by: Tejun Heo <tj@kernel.org>
(cherry picked from commit 725c7b570fda4207e465ff8856c2c12c2645a685)
ahci_xgene: Use correct OOB tunning parameters for APM X-Gene SoC AHCI SATA Host controller driver.
APM X-Gene SoC AHCI SATA Host controller driver requires
some correction of Phy Control OOB timing for the
COMINIT/COMWAKE parameters to correctly interoperate with
different kinds of disks.
Signed-off-by: Loc Ho <lho@apm.com> Signed-off-by: Suman Tripathi <stripathi@apm.com> Signed-off-by: Tejun Heo <tj@kernel.org>
(cherry picked from commit 0185b1b787962db38fdf74e1cab9b7a2619490a1)
ahci_xgene: Fix the watermark threshold for the APM X-Gene SATA host controller driver.
As per SATA IO specification, when Host sends HOLD, the device takes
about 20DW latency to reply to HOLDA. In some case, device doesn't
response to HOLDA over 20DW and causes FIFO goes into over flow
condition. Due to this condition, device enumerations fails with
those devices. This patch adjust the watermark FIFO by increasing
the FIFO depth from 0x16(default) to 0x30 to address this issue.
Signed-off-by: Loc Ho <lho@apm.com> Signed-off-by: Suman Tripathi <stripathi@apm.com> Signed-off-by: Tejun Heo <tj@kernel.org>
(cherry picked from commit aeae4dcac5a91de9546c42a3be09c96479bfc3ff)
Mikko Perttunen [Fri, 18 Jul 2014 07:12:30 +0000 (10:12 +0300)]
ata: Add support for the Tegra124 SATA controller
This adds support for the integrated AHCI-compliant Serial ATA
controller present on the NVIDIA Tegra124 system-on-chip.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Tejun Heo <tj@kernel.org>
(cherry picked from commit ccfde50810ae916564765a2f8ee6d7163b025594)
Mikko Perttunen [Wed, 16 Jul 2014 08:54:21 +0000 (11:54 +0300)]
ata: ahci_platform: Increase AHCI_MAX_CLKS to 4
The Tegra124 SATA controller requires 4 clocks. Increase this constant
to be able to use them all.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Tejun Heo <tj@kernel.org>
(cherry picked from commit 0e38699387fd2fd433618bb67612f3aae676fbae)
libata: EH should handle AMNF error condition as a media error
libata-eh.c should handle AMNF error condition (error byte bit 0,
usually code 0x01) in libata-eh.c along with UNC as a media error so
SCSI stack can handle it properly (translation code 0x01 is already
present in libata-scsi.c) but was never passed down due to lack of
handling in EH.
While using linux-based machine (AMD 6550M-based notebook, PCI IDs for the
controller are 1022:7801 subsys 1025:059d) and ddrescue to salvage data
from failing hard drive (WD7500BPVT 2.5" 750G SATA2), I've found that pure
AMNF 0x01 error code generates generic "device error" that is retried
several times by SCSI stack instead of "media error" that is passed up to
software.
So we may assume deprecated AMNF error code is surely not dead yet, and
it's better for it to be handled properly. As we may see it is used by
modern enough devices, and used properly: drive returned AMNF only when IDs
for track cannot be read completely due to dying head or positioning,
otherwise it returned UNC(orrectables).
Not handling it causes wrong generic error code ("device error") reporting
down the stack, can damage failing drives further because of excessive
retries, and slows salvaging down a lot. Also, there is handling code in
libata-scsi.c for 0x01 AMNF error already.
https://bugzilla.kernel.org/show_bug.cgi?id=80031
tj: Shortened $SUBJ and moved its content to the first paragraph.
ahci_xgene: fix the dma state machine lockup for the IDENTIFY DEVICE PIO mode command.
This patch fixes the dma state machine lockup due to the processing
of IDENTIFY DEVICE PIO mode command. The X-Gene AHCI controller
has an errata in which it cannot clear the BSY bit after the PIO setup
FIS. The dma state machine enters CMFatalErrorUpdate state and locks
up. This patch also removes the dma restart workaround from the read_id
function as the read_id function is only called by libata layer for
ATA_INTERNAL commands. But for some cases eg: PORT MULTIPLIER
and udev, the framework will enumerate using SCSI commands and it will
not call read_id function.
Signed-off-by: Loc Ho <lho@apm.com> Signed-off-by: Suman Tripathi <stripathi@apm.com> Signed-off-by: Tejun Heo <tj@kernel.org>
(cherry picked from commit 2a0bdff6b958d1b2523d2754b6cd5e0ea4053016)
Russell King [Tue, 24 Jun 2014 10:19:47 +0000 (11:19 +0100)]
ata: ahci_imx: add disable for spread-spectrum
Spread-spectrum doesn't work with Cubox-i hardware, so we have to
disable this feature. Add a DT property so that platforms can
indicate that this feature should not be enabled.
Having it as a negative property keeps existing DT files working.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Reviewed-by: Shawn Guo <shawn.guo@freescale.com> Signed-off-by: Tejun Heo <tj@kernel.org>
(cherry picked from commit a6e726244c78e04d0af754c625036be8f92a9afd)
Russell King [Mon, 23 Jun 2014 11:59:08 +0000 (12:59 +0100)]
ata: ahci_imx: warn when disabling ahci link
When the AHCI link is disabled, it can't be re-enabled except by
resetting the entire SoC. Rather than doing this silently print
some kernel messages to inform the user, along with how to avoid
this.
tj: Put a long printf format string on a single line.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Tejun Heo <tj@kernel.org>
(cherry picked from commit f118ae5901172dacc4f272acf5eccfba06e8d221)
The reason is that the SATA controller has no working clock at this
point, and thus ahci_enable_ahci() fails to enable the controller. In
case that there is no SATA disk attached, the imx_sata_disable() gets
called in ahci_imx_error_handler(), and both sata_clk and sata_ref_clk
will be disabled there. Because all the imx_sata_enable() calls
afterward will return immediately due to imxpriv->no_device check, the
SATA controller working clock sata_clk will never get any chance to be
enabled again.
This is a regression caused by commit 90870d79d4f2 (ahci-imx: Port to
library-ised ahci_platform). Before the commit, only sata_ref_clk is
managed by the driver in enable/disable function. But after the commit,
all the clocks are enabled/disabled in a row by ahci platform helpers
ahci_platform_enable[disable]_clks. Since ahb_clk is a bus clock which
does not have gate at all, and i.MX low-power hardware module already
manages sata_clk across suspend/resume cycle, the only clock that needs
to be managed by software is sata_ref_clk.
So instead of using ahci_platform_enable[disable]_clks to manage all
the clocks in a row from imx_sata_enable[disable], we should manage
only sata_ref_clk in there.
Reported-by: Fabio Estevam <fabio.estevam@freescale.com> Fixes: 90870d79d4f2 (ahci-imx: Port to library-ised ahci_platform) Signed-off-by: Shawn Guo <shawn.guo@freescale.com> Acked-by: Hans de Goede <hdegoede@redhat.com>
(cherry picked from commit e6dd42a917e62d916c6e513dbf87a4dec8cf3a1c)
projects / karo-tx-linux.git / log