Robin Gong [Thu, 28 Jun 2012 06:24:40 +0000 (14:24 +0800)]
ENGR00215188-2 LDO bypass: disable LDO bypass before suspend and back in resume
There is one SOC bug if use LDO bypass, VDDARM_CAP will take 2ms to raise up
normal voltage when system resume back, longer than 40us before. Then it will
cause cpu hang if resume back.
Workaround:
We can disable LDO bypass at the last minute of suspend and enable LDO bypass
again as long as system resume back. Signed-off-by: Robin Gong <B38343@freescale.com>
Robin Gong [Thu, 28 Jun 2012 06:14:46 +0000 (14:14 +0800)]
ENGR00215188-1 PFUZE CPUFREQ: reconstruct LDO bypass function
As before, raw I2C operation is added in suspend interface of cpufeq driver,so
that we can raise up cpu frequency and voltage after I2C driver suspended.But
the code is not platform independent if customer use another pmic whose I2C
slave address is different with pfuze.
Now, we rasie up cpu frequency and disable cpu frequency change in more earlier
than before. If system begin to suspend flow, we will do this. Signed-off-by: Robin Gong <B38343@freescale.com>
Francisco Munoz [Tue, 12 Jun 2012 19:59:31 +0000 (14:59 -0500)]
ENGR00213293 : Enable WEIM NOR support on the imx6 ARD revb quad/solo.
Added IOMUX,GPIO and early param support for the parallel nor to work
on the imx6 revB quad/solo. Since the parallel NOR can clash with I2C3,
and SPI, an early param was added to enable WEIM NOR chips using boot
args.
The Weim NOR needs a HW rework for it to work. This rework is going
to disable the SPI NOR. Modified files:
Eric Sun [Mon, 25 Jun 2012 11:03:46 +0000 (19:03 +0800)]
ENGR00214813 MX6DL SabreSD : Kernel, Enable ARM Perfromance Monitor
Register PMU resources during system bootup, so that "Perf" Command can
be used to get misc performance data of a running program
The "Perf" Exe should be built manually in
"./tools/perf" using the following command line
> make CROSS_COMPILER=... ARCH=arm CFLAGS="-static -DGElf_Nhdr=Elf32_Nhdr"
then copy the "Perf" executable to rootfs/bin
Usage :
perf # show help content
perf list # show all available statistics options
perf stat ls # show all statistics of a "ls" command
perf stat -e cycles tar cvfz bin.tgz /bin
# show "cycles" statistics of command
# "tar cvfz ...."
MX6 Series Chips bound all CPUs PERFMON IRQ to one, this may cause some
problems when get per-CPU statistics. Need further investigation
Liu Ying [Tue, 26 Jun 2012 04:45:05 +0000 (12:45 +0800)]
ENGR00214865 mxc_v4l2_capture:Be silent when closing device
This patch changes the debug level of a kernel message in
mxc_v4l2_close() from KERN_INFO to KERN_DEBUG to make the
console silent when closing device.
Fugang Duan [Thu, 21 Jun 2012 08:28:57 +0000 (16:28 +0800)]
ENGR00210654 - MSL : fix NFS boot fails issue in sometime
- MX6 sololite cpu board NFS boot fails in sometimes, because MAC
cannot get any packets while sending DHCP to require IP. The
reproduce rate is 10%.
- Lan8720 phy enter a unexpected status, and need software reset
phy before transmition.
- Do some below overnight tests after add the changes, no NFS
boot issue found.
1. Kernel boot from MMC, rootfs mount from NFS.
2. Kernel boot from tftp, rootfs mount form NFS.
Ryan QIAN [Thu, 21 Jun 2012 06:40:40 +0000 (14:40 +0800)]
ENGR00213944-02: mmc: sdhci: [MX6] support SD v3.0 memory cards.
- Add variable pad speed setting per SD clk freq.
- Add SD3.0 support on SD1, SD2, and SD3.
- Enhance drive strength on SD pad to improve its compatibility.
- change the definition of pad speed changing interface
- combine pad speed setting for different SD host controllers into one function.
Signed-off-by: Ryan QIAN <b32804@freescale.com> Acked-by: Lily Zhang
Ryan QIAN [Mon, 18 Jun 2012 22:56:24 +0000 (06:56 +0800)]
ENGR00213944-01: mmc: sdhci: support SD v3.0 memory cards.
- Correct switcing signaling voltage sequence according to SD3.0 spec,
that turn off SD clk before switching signaling voltage.
- previous code can work on MX6Q but failed on MX6SL.
- only have sequence corrected, it can work on MX6SL.
Wayne Zou [Wed, 20 Jun 2012 04:55:13 +0000 (12:55 +0800)]
ENGR00214337 MX6: Enable AXI cache for VDOA/VPU/IPU and set IPU high priority
set IPU AXI-id0 Qos=0xf(bypass) and AXI-id1 Qos=0x7,
mx6q use AXI-id0 for IPU display channel, it should has
highest priority(bypass), and AXI-id1 for other IPU channel,
it has high priority.
Also, clear OCRAM_CTL bits to disable OCRAM read/write pipeline control.
Nancy Chen [Tue, 19 Jun 2012 22:21:43 +0000 (17:21 -0500)]
ENGR00212633 [MX6SL]: Add support for SoC power optimization in Idle mode
Add support for SoC power optimization in Idle mode (1st phase):
1. ARM @ 198MHz. VDDARM_CAP @ 0.85V
2. AHB @ 24MHz, DDR @ 25MHz
3. PU regulator disabled when system is in IDLE.
Terry Lv [Fri, 15 Jun 2012 04:38:11 +0000 (12:38 +0800)]
ENGR00213726: CAAM: Amend crypto API configuration for caam operation
Previous configuration suppressed a number of crypto API features that
caused misleading results when using the CAAM driver through the tcrypt.
Enabling the API tests eliminated this.
Also, added in other common ciphers and modes that, if lacking, would
cause confusion with tcrypt behavior.
Signed-off-by: Steve Cornelius <steve.cornelius@freescale.com> Signed-off-by: Terry Lv <r65388@freescale.com>
Anson Huang [Tue, 19 Jun 2012 10:23:10 +0000 (18:23 +0800)]
ENGR00214199 [MX6]Need to lower ipg_perclk to 6M before init GPT
As Arik TO1.0 GPT use ipg_perclk as clock source, we need to
lower it to 6M before init GPT, or the clock source freq will
be wrong if we lower the ipg_perclk after GPT time already init.
Rong Dian [Fri, 15 Jun 2012 04:33:58 +0000 (12:33 +0800)]
ENGR00213722:MX6 SABRESD battery:add voltage offset sysfs
interface and modify driver
1.add battery sample voltage offset sysfs interface.
2.add usb charger powersupply from max8903 UOK.
3.modify battery max coulomb data to 99% in charger full stage and
modify battery max coulomb data to 100% in discharger stage,because
hardware cannot support battery internal resistance and coulomb
calculation.Battery voltage and coulomb may increase a bit in charger
stage,so keep max coulomb data 99% in charger full stage.
Robby Cai [Mon, 18 Jun 2012 11:46:41 +0000 (19:46 +0800)]
ENGR00213997: Fix Section Mismatch warning
Fix:
WARNING: vmlinux.o(.data+0x8c28): Section mismatch in reference from the
variable mx6_gpmi_nand_platform_data to the function
.init.text:gpmi_nand_platform_init()
The variable mx6_gpmi_nand_platform_data references
the function __init gpmi_nand_platform_init()
If the reference is valid then annotate the
variable with __init* or __refdata (see linux/init.h) or name the variable:
*_template, *_timer, *_sht, *_ops, *_probe, *_probe_one, *_console
Robby Cai [Mon, 18 Jun 2012 05:14:08 +0000 (13:14 +0800)]
ENGR00213751: imx6sl: Add ELAN touchscreen support on EINK-DC3 board
Add ELAN capacitive TS support on EINK-DC3 stacked on MX6SL_ARM2 board
- configure the iomux setting (need 4.7K Ohm pull up on 'touch_int_b')
- configure the i2c slave addr
- configure the GPIO setting for ELAN ce/int/rst
- update the defconfig
Robby Cai [Tue, 12 Jun 2012 10:24:54 +0000 (18:24 +0800)]
ENGR00213749: imx6sl: Add keypad support on EINK-DC3 board
Add the support for keypad on EINK-DC3 board which is stacked on ARM2 board.
- configure the iomux setting
- add dummy kpp clock to fool imx_keypad driver
- add platform device for keypad
- add key mapping (4x4 array) used on EINK-DC3
- update the defconfig for keypad driver
Chen Liangjun [Mon, 11 Jun 2012 07:08:18 +0000 (15:08 +0800)]
ENGR00212318 ASRC:update to in/out width config
The origin ASRC driver did not support input and output wordwidth
config but an total wordwidth config instead. And the input wordwith
and output wordwidth are all fixed to 24 bit.
In this path, we do things below:
1 Update to use input wordwidth and output wordwidth config seperately
instead of an total wordwidth config.
2 Set corresponding DMA(input/output) buswidth according ASRC's input
and output wordwidth config.
3 Support 16/24 bit input wordwidth and 24 bit output wordwidth.
Anson Huang [Thu, 14 Jun 2012 10:07:30 +0000 (18:07 +0800)]
ENGR00212720 [MX6]Adjust CPU 672M setpoint voltage
Previous voltage for 672M is 1.05V, normal test is OK,
but if CPU is busy in background and do the CPUFreq change
as well, always fail the stress test at 672M setpoint, after
increase it to 1.1V, stress test is OK.
Wayne Zou [Tue, 12 Jun 2012 06:52:21 +0000 (14:52 +0800)]
ENGR00213158-3 FB: Clean up fb interrupt handler
Clean up the fb driver for maintainability:
1. Use completion instead of semaphore API interface.
2. Use IPU oneshot interrupt mode and remove ipu_disable_irq()
function call in interrupt handler.
Larry Li [Tue, 12 Jun 2012 09:11:45 +0000 (17:11 +0800)]
ENGR00213170-2 [MX6SL] Enable GPU driver
Use allocated GPU resource to enable GPU.
Memroy address on imx6sl board starts from 0x80000000
and GC320 can access [baseAddress, baseAddress + 2G) only without MMU.
So to make GC320 work, baseAddres must be set to 0x80000000, and all
address sent to GC320 must be a offset to baseAddress. GC355 doesn't
need this baseAddress, that means it needs a real physcial adress,
rather than the offset to baseAddress.
Original code always change phsysical address to 'offset' before use it,
no matter it is used by GC355 or GC320, so only one of them can work.
Solution is to move address adjustion to arch specific part. So each
core can get what it wants.
Signed-off-by: Larry Li <b20787@freescale.com> Acked-by: Lily Zhang
Anson Huang [Wed, 13 Jun 2012 12:20:01 +0000 (20:20 +0800)]
ENGR00180919 [MX6]Update clock tree if BUS freq is changed
As DDR freq change is by modifying CCM register directly,
we need to update the clock tree as well, or the clock
tree will be broken. Also, we need to make sure the clock
rate counting is right.
Robin Gong [Wed, 13 Jun 2012 06:44:00 +0000 (14:44 +0800)]
ENGR00213336 sabresd pfuze: support 1.2G by param which pass by u-boot
There is no fuse data for distinguish 1.2G or 1G, kernel need support passed
param from u-boot that can know 1.2G or 1G. If 1.2G, will configure VDDSOC_IN
&VDDARM_IN to 1.425V by pfuze and VDDSOC&VDDPU to 1.25V by internal ldo
Sandor Yu [Wed, 13 Jun 2012 11:18:43 +0000 (19:18 +0800)]
ENGR00180937 IPU: Change IPU error message to IPU warning
IPU driver will print unexpect interrupt state in ipu_irq_handler function,
It is for IPU debug and state check, not a IPU error.
So change print function from dev_error to dev_warn.
Anson Huang [Tue, 12 Jun 2012 10:50:42 +0000 (18:50 +0800)]
ENGR00180930 [MX6]Fix low bus mode bug when there is no CPUFreq change
If the CPUFreq change is done before enabling low bus freq driver,
the bus freq will be staying at high freq until there is new request
of entering low bus freq. So we need to put the bus freq into low
point if all the conditions are met when we enable bus freq.
ENGR000212647 MX6 - Fix IPU and AXI default clock frequency
The max freq for IPU and AXI clocks is 264MHz. Hence source
IPU from mmdc_ch0 clock on MX6 to get maximum frequency.
And source AXI from periph_clk on for max freq.
Peter Chen [Mon, 11 Jun 2012 06:31:20 +0000 (14:31 +0800)]
ENGR00212992 usb: fix potential bug with fast plug in/out with usb charger
- Move imx_usb_vbus_disconnect to work queue, and wait or cancel
charger detect worker when vbus is disconnected if charger detect
worker still hasn't finished.
- Move pull down dp from imx_usb_vbus_disconnect to udc vbus
disconnect interrupt handler, the reason is udc->gadget.speed should
to be updated at that ISR.
- Select POWER_SUPPLY if USB_GADGET_ARC is configured to fix the build
error for manufacture tools firmware's build.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
make shi [Mon, 4 Jun 2012 08:28:33 +0000 (16:28 +0800)]
ENGR00212232-02 USB:fix otg can not work without phy power if VBUS removed
- There is no VBUS supply or not supply for USBPHY power 3p0,the USB mouse
enumeration fail during the board booting with a USB mouse connected to
otg port.During system booting ,some error message appear like below :
"usb 1-1: device not accepting address 5, error -71
hub 1-0:1.0: unable to enumerate USB device on port 1"
The otg phy power is needed during normal USB transmitting ,the otg phy
power should be on before calling the usb_add_hcd. So should make sure
usb_add_hcd is called after otg_set_host is called in usb_hcd_fsl_probe().
- Before switch the otg mode form Host mode to Device mode,we must call
dr_discharge_line() to make sure no abnormal usb wakeup interrupt happen.
- Some user case ,the BM_USBPHY_CTRL_ENHOSTDISCONDETECT bit is cleared by
mistake. For example,the otg port connect a extern USB hub and a USB device
connected to the USB hub.Unplug the USB device,the Hub will enter auto suspend
mode,then plug in the device, hub will auto resume by the device plug in ,the
BM_USBPHY_CTRL_ENHOSTDISCONDETECT bit is cleared by mistake.So the function
platform_set_disconnect_det() should be called after usb_disconnect.
make shi [Mon, 4 Jun 2012 08:24:01 +0000 (16:24 +0800)]
ENGR00212232-01 USB:fix otg can not work without phy power if VBUS removed
According to ticket TKT094250 :There is no VBUS supply or not supply for USB
PHY power 3p0,USB dp/dm is floating when there is no connection in device mode:
S/W can run the following flow to ensure the internal DP/DM linestate does not
change. These should be done before set SUSP/PHCD bit after detecting the VBUS
change from high to low.
clear HW_USBPHY_DEBUG_CLKGATE
loopback_utmi_dig_tst1 = 1
loopback_utmi_dig_tst0 = 0
loopback_tsti_tx_en = 1
loopback_tsti_tx_hiz = 0
loopback_tsti_tx_hs_mode = 0;
After detecting the VBUS or ID change (connected to a host or device), SW do:
set HW_USBPHY_DEBUG_CLKGATE back to 1
clear the loopback_XXXX signals above back to 0
Peter Chen [Tue, 5 Jun 2012 03:08:29 +0000 (11:08 +0800)]
ENGR00212322-1: usb: add usb charger support for i.mx6x
- USB charger function is embedded in usb device driver, and only for i.mx6x
- SDP and DCP charger are tested
- Need to enable usb device function (insmod one gadget driver)
to use usb charger detect function
- The power supply interface for usb charger is:
/sys/class/power_supply/imx_usb_charger/
Some useful entries for power supply interface:
- present: whether usb charger is present or not
- type: usb charger type
- current_max: the max charger current for this charger
- online: whether vbus is on or not
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Sandor Yu [Fri, 8 Jun 2012 05:37:17 +0000 (13:37 +0800)]
ENGR00178617 MX6x HDMI hotplug,video discontinuously after do a hotplug
The issue only in play video on DP FG, no such issue on DP BG.
HDMI drvier will call fb_set_var to config framebuffer after HDMI cable plugin.
In Frame buffer driver, the DP FG and BG register as different fb.
The function fb_set_var only update one fb.
As IPU DP module, if DP BG is re-enabled, the FG should reconfig again.
So after HDMI plugin, only BG fb is update, FG fb will work incorrect,
no end of frame interrupt trigger, and print
"mxc_sdc_fb mxc_sdc_fb.0: timeout when waiting for flip irq"
to display.
Change code in function fb_set_var, FG fb will reconfig with DP BG fb.
Anson Huang [Fri, 8 Jun 2012 06:20:36 +0000 (14:20 +0800)]
ENGR00212805 [MX6SL]Add thermal driver device.
Add thermal driver device to support thermal driver interface,
but as this driver is dependent on OCOTP driver and need a
calibrated part, so the temp read from the thermal sysfs
interface maybe inaccurate on those uncalibrated parts.
If we want to use ESAI call ASRC, we need to know the input sample
rate as well as the output sample rate. however, cause of ALSA-LIB,
the input sample rate pass down to ALSA-DRIVER is not accurate. For
example, if the ALSA-DRIVER only support 48KHz playback and we want
to play an 16KHz audio file, the sample rate params the ALSA DRIVER
see is 48KHz but not 16KHz. So, the ALSA-DRIVER do not know the
original sample rate, and thus unable to config ASRC properly.
In this patch, we add an amixer control interface for alsa lib plugin to
config the input sample rate before playback. If no plugin, user
can call the amixer control interface to manually use ASRC for rate
convert.
For example, if we need to playback an 24bit_24K audio wav file without
call the plug. The sound card is 0.
1 Get the ASRC capability: amixer sget "ASRC"
1 Set the input samplerate: amixer sset "ASRC" "24KHz"
2 Play; aplay -Dhw:0 audio_24k24S-S24_LE.wav
Gary Zhang [Wed, 6 Jun 2012 08:22:26 +0000 (16:22 +0800)]
ENGR00212542 SPDIF: move clock operation
Now clock operation occurs in mxc_spdif_trigger(), and
because clock operation is forbidden to exist in interrupt
context, move disabling clock operation to mxc_spdif_shutdown()
the original low memory killer only take care of system memory accounting,
but for so large shared memory occupy by GPU, and each process memory
killer account become unfair, very large 3D game will not killed firstly
if it going to background.
Add this account to let real large memory user get killed if going to background
eg, the "angry bird Space" will acquire 68,215,360 GPU memory for 1-6 toll-gate.
The test show it can quicker recovery from memory shortage situation,
since it's very like to be killed after add so much GPU memory for such 3D game.
ENGR00211670- CPUFREQ-Set CPU to maximum frequency before entering STOP mode
Ensure that the CPUFREQ driver sets the CPU to its maximum
frequency when it is suspended.
Also change the WAIT macro in clock.c to use GPT counter
for the delay instead of getnsdayoftime(). As the kernel
timekeeping driver is suspended before CPUFREQ and this
causes a dump during suspend.
Anson Huang [Mon, 4 Jun 2012 12:51:57 +0000 (20:51 +0800)]
ENGR00211169-2 [SMP]Need to update loops_per_jiffy when cpufreq is changed
Need to update loops_per_jiffy when cpufreq is changed, our platform
only change the loops_per_jiffy of per_cpu cpu_data, we need to update
it to global loops_per_jiffy which is used for udelay, this is for pure
cpu freq change.
Anson Huang [Mon, 4 Jun 2012 12:50:53 +0000 (20:50 +0800)]
ENGR00211169-1 [SMP]Need to update loops_per_jiffy when cpufreq is changed
Need to update loops_per_jiffy when cpufreq is changed, our platform
only change the loops_per_jiffy of per_cpu cpu_data, we need to update
it to global loops_per_jiffy which is used for udelay.
For each CPU, do the calibration delay only once. For subsequent calls,
use the cached per-CPU value of loops_per_jiffy.
This saves about 200ms of resume time on dual core Intel Atom N5xx based
systems. This helps bring down the kernel resume time on such systems
from about 500ms to about 300ms.
[akpm@linux-foundation.org: make cpu_loops_per_jiffy static]
[akpm@linux-foundation.org: clean up message text]
[akpm@linux-foundation.org: fix things up after upstream rmk changes] Signed-off-by: Sameer Nanda <snanda@chromium.org> Cc: Phil Carmody <ext-phil.2.carmody@nokia.com> Cc: Andrew Worsley <amworsley@gmail.com> Cc: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Tony LIU [Fri, 1 Jun 2012 09:56:48 +0000 (17:56 +0800)]
ENGR00211329-2 add mutex for otg wake up enable
- For the system dump issue of usb unhandled irq,
the root cause is the shared resource being lack of protection
add mutex to protect the shared access.
Signed-off-by: Tony LIU <junjie.liu@freescale.com>
Liu Ying [Wed, 30 May 2012 08:14:06 +0000 (16:14 +0800)]
ENGR00211764 IPUv3 fb: support pan display with fb_set_var
Users may call FBIOPUT_VSCREENINFO ioctrl to do pan display.
This ioctrl relies on fb_set_var() to do the job. fb_set_var()
calls custom fb_set_par() method and then calls custom
fb_pan_display() method. The current implementation of ipuv3fb
reinitializes IPU display controller every time the custom
fb_set_par() method is called, which makes the display flash
if fb_set_var() is called to do panning frequently. The custom
fb_pan_display() method checks if the current xoffset and
yoffset are different from previous ones before doing actual
panning, which prevents the panning from happening within the
fb_set_var() context. This patch checks new var info to decide
whether we really need to reinitialize IPU display controller.
We ignore xoffset and yoffset update because it doesn't require
to reinitialize the controller. Users may specify activate field
of var info with FB_ACTIVATE_NOW and FB_ACTIVATE_FORCE to
reinialize the controller by force. Meanwhile, this patch removes
the check in custom fb_pan_display() method mentioned before to
have the panning work within fb_set_var() context. It doesn't
hurt to do panning again if there is no update for xoffset and
yoffset.
make shi [Thu, 31 May 2012 02:24:10 +0000 (10:24 +0800)]
ENGR00210686 USB:fix unplug&plug device during suspend without wakeup enabled
For High speed device ,we need clear BM_USBPHY_CTRL_ENHOSTDISCONDETECT
after suspend.For Low and full speed device, we should power on and power
off the USB port to make sure USB internal state machine work well.
Add a config to enable/disable this code,the code is enabled by default.
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