Jon Hunter [Sun, 10 Jul 2011 11:57:33 +0000 (05:57 -0600)]
OMAP: Add debugfs node to show the summary of all clocks
Add a debugfs node called "summary" to /sys/kernel/debug/clock/
that displays a quick summary of all clocks registered in the
"clocks" structure. The format of the output from this node is:
<clock-name> <parent-name> <rate> <usecount>
This debugfs node was very helpful for taking a quick snapshot of
the linux clock tree for OMAP and ensuring clock frequencies
calculated by the kernel were indeed correct. This patch helped
uncover some bugs in the linux clock tree for OMAP4.
Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
OMAP2+: hwmod: Follow the recommended PRCM module enable sequence
On OMAP4, the PRCM recommended sequence for enabling
a module after power-on-reset is:
-1- Force clkdm to SW_WKUP
-2- Enabling the clocks
-3- Configure desired module mode to "enable" or "auto"
-4- Wait for the desired module idle status to be FUNC
-5- Program clkdm in HW_AUTO(if supported)
This sequence applies to all older OMAPs' as well,
however since they use autodeps, it makes sure that
no clkdm is in IDLE, and hence not requiring a force
SW_WKUP when a module is being enabled.
OMAP4 does not need to support autodeps, because
of the dyanamic dependency feature, wherein
the HW takes care of waking up a clockdomain from
idle and hence the module, whenever an interconnect
access happens to the given module.
Implementing the sequence for OMAP4 requires
the clockdomain handling that is currently done in
clock framework to be done as part of hwmod framework
since the step -4- above to "Wait for the desired
module idle status to be FUNC" is done as part of
hwmod framework.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
[b-cousson@ti.com: Adapt it to the new clkdm hwmod attribute and API] Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com>
[paul@pwsan.com: dropped mach-omap2/clock.c changes; modified to only
call the clockdomain code if oh->clkdm is set; disable clock->clockdomain
interaction on OMAP4] Signed-off-by: Paul Walmsley <paul@pwsan.com>
Paul Walmsley [Sun, 10 Jul 2011 11:57:06 +0000 (05:57 -0600)]
OMAP2+: clock: allow per-SoC clock init code to prevent clockdomain calls from clock code
The OMAP2/3 clock code was written to notify the clockdomain code when
the first clock in a clockdomain is enabled and when the last enabled
clock in a clockdomain is disabled. OMAP4 requires a different
approach: the hwmod code needs to signal the clockdomain code when to
force-enable and auto-idle a clockdomain during the IP block enable
process. The current conjecture is that once that hwmod sequence is
implemented, it will no longer be necessary for the clock code to call
into the clockdomain code for "optional clocks" on OMAP4.
Add a static flag to the OMAP2+ clock code, clkdm_control, that by
default preserves the OMAP2/3 behavior. Also add a function,
omap2_clk_disable_clkdm_control(), intended to be called from OMAP4
and beyond clock initcalls, that disables the old behavior.
Part of this patch was originally based on a patch by Rajendra Nayak
<rnayak@ti.com>.
OMAP2+: clockdomain: Add per clkdm lock to prevent concurrent state programming
Since the clkdm state programming is now done from within the hwmod
framework (which uses a per-hwmod lock) instead of the being done
from the clock framework (which used a global lock), there is now a
need to have per-clkdm locking to prevent races between different
hwmods/modules belonging to the same clock domain concurrently
programming the clkdm state.
Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
The omap_set_pwrdm_state function forces clockdomains
to idle, without checking the existing idle state
programmed, instead based solely on the HW capability
of the clockdomain to support idle.
This is wrong and the clockdomains should be idled
post a state_switch *only* if idle transitions on the
clockdomain were already enabled.
Signed-off-by: Rajendra Nayak <rnayak@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Acked-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
Paul Walmsley [Sun, 10 Jul 2011 11:56:54 +0000 (05:56 -0600)]
OMAP2+: clockdomain: add clkdm_in_hwsup()
Add a new function, clkdm_in_hwsup(), that returns true if a clockdomain
is configured for hardware-supervised idle. It does not actually read the
hardware; rather, it checks an internal flag in the struct clockdomain, which
is changed when the clockdomain is switched in and out of hardware-supervised
idle. This should be safe, since all changes to the idle mode should
pass through the clockdomain code.
Based on a set of patches by Rajendra Nayak <rnayak@ti.com> which do
the same thing by checking the hardware bits. This approach should be
faster and more compact.
OMAP2+: clockdomain: Add 2 APIs to control clockdomain from hwmod framework
Duplicate the existing API for clockdomain enable from clock to enable
a clock domain from hwmod framework.
This will be needed when the hwmod framework will move from the current
clock centric approach to the module based approach.
These APIs are returning 0 for the moment for OMAP2 and OMAP3 until
their hwmods are updated with the clksm attribute.
Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Kevin Hilman <khilman@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
OMAP: clockdomain: Remove redundant call to pwrdm_wait_transition()
The call to pwrdm_wait_transition() in clkdm_clk_enable()
is redundant since the function pwrdm_clkdm_state_switch()
which is called next also does the same thing.
Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
OMAP4: hwmod: Introduce the module control in hwmod control
Take advantage of the explicit modulemode control to fix
the way parents clocks are managed.
A module must be disabled before any parents are disabled.
That programming model was not possible with the previous
implementation that was considering a modulemode as a leaf
clock node managed by the clock fmwk.
This was leading to bad crash upon disable when the parent
clock was gated before the module completed its transition
to idle.
Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
OMAP4: cm: Add two new APIs for modulemode control
In OMAP4, a new programming model based on module control instead
of clock control was introduced.
Expose two APIs to allow the upper layer (omap_hwmod) to control
the module mode independently of the parent clocks management.
Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com>
[paul@pwsan.com: renamed 'omap4_cm_' fns to 'omap4_cminst_'; cleaned up
kerneldoc] Signed-off-by: Paul Walmsley <paul@pwsan.com>
OMAP4: hwmod data: Add modulemode entry in omap_hwmod structure
Add a new field to provide the mode supported by the module.
The mode will control the way mandatory clocks are managed by the PRCM.
0 : Module is temporarily disabled by SW. OCP access to module are stalled.
Can be used to change timing parameter of GPMC module.
1 : Module is managed automatically by HW according to clock domain
transition. A clock domain sleep transition put module into idle.
A wakeup domain transition put it back into function.
If CLKTRCTRL=3, any OCP access to module is always granted.
Module clocks may be gated according to the clock domain state.
2 : Module is explicitly enabled. Interface clock (if not used for
functions) may be gated according to the clock domain state.
Functional clocks are guarantied to stay present. As long as
in this configuration, power domain sleep transition cannot happen.
Some modules will have a modulemode initialized at 1 (HWCTRL) by default.
This is the case for interconnect and simple module like GPIO, WDT, MAILBOX.
Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
Add a 'context_offs' entry in the prcm.omap4 structure to all
IPs when applicable.
The offset will be used to retrieve the per module context lost
information now available on OMAP4.
Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
OMAP4: hwmod: Replace RSTCTRL absolute address with offset macros
The RSTCTRL register was accessed using an absolute address.
The usage of hardcoded macros to calculate virtual address from physical
one should be avoided as much as possible.
The usage of an offset will allow future improvement like migration from
the current architecture code toward a module driver.
Update prm_xxx accessors, move definition to the proper header file and
update copyrights.
Change the s16 register offset parameter to u16.
Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com>
[paul@pwsan.com: use '_prminst_' in function names that are part of the
prminst44xx.c file] Signed-off-by: Paul Walmsley <paul@pwsan.com>
It is mandatory to wait for a module to be in disabled state before
potentially disabling source clock or re-asserting a reset.
omap_hwmod_idle and omap_hwmod_shutdown does not wait for
the module to be fully idle.
Add a cm_xxx accessor to wait the clkctrl idle status to be disabled.
Fix hwmod_[idle|shutdown] to use this API.
Based on Rajendra's initial patch.
Please note that most interconnects hwmod will return one timeout because
it is impossible for them to be in idle since the processor is accessing
the registers though the interconnect.
Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Todd Poynor <toddpoynor@google.com>
[paul@pwsan.com: move cpu_is_*() tests to the top of _wait_target_disable();
incorporate some feedback from Todd] Signed-off-by: Paul Walmsley <paul@pwsan.com>
OMAP4: hwmod: Replace CLKCTRL absolute address with offset macros
The CLKCTRL register was accessed using an absolute address.
The usage of hardcoded macros to calculate virtual address from physical
one should be avoided as much as possible.
The usage of a offset will allow future improvement like migration from
the current architecture code toward a module driver.
Update cm_xxx accessor, move definition to the proper header file and
update copyrights.
Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Todd Poynor <toddpoynor@google.com>
[paul@pwsan.com: renamed 'omap4_cm_' fns to 'omap4_cminst_'; removed empty
fn prototype section from cm44xx.h; incorporated comments from Todd;
documented some functions] Signed-off-by: Paul Walmsley <paul@pwsan.com>
In OMAP PRCM terminology, the clock domain is defined as a group of IPs
that share some clocks and most of the time an interface clock.
Every IP does belong to a clockdomain.
For the moment the clock domain attribute is affected to a clock node.
The issue with that approach, is that a clock might or not belong to a
clock domain. Moreover during module transition, it is up to a module
to handle properly the clock domain state and not to a clock node.
Create a clkdm_name attribute to provide this information per hwmod.
Populate this attribute for every OMAP4 hwmod entries.
Future cleanup series with remove that information from the OMAP4 clock
when it is relevant.
Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com>
[paul@pwsan.com: fix the mpuss_clkdm name] Signed-off-by: Paul Walmsley <paul@pwsan.com>
OMAP4: clock data: Add missing divider selection for auxclks
On OMAP4 the auxclk nodes (part of SCRM) support both
divider as well as parent selection.
Supporting this requires splitting the existing nodes
(which support only parent selection) into two nodes,
one for parent and another for divider selection.
The nodes for parent selection are named auxclk*_src_ck
and the ones for divider selection as auxclk*_ck.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
[b-cousson@ti.com: Rebase on top of clock cleanup
and autogen alignement] Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
OMAP: omap_device: Create clkdev entry for hwmod main_clk
Extend the existing function to create clkdev for every optional
clocks to add a well one "fck" alias for the main_clk of the
omap_hwmod.
It will allow to remove these static clkdev entries from the
clockXXX_data.c file.
Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@ti.com> Cc: Todd Poynor <toddpoynor@google.com>
[paul@pwsan.com: remove all of the "fck" role clkdev aliases from the
clock data files; fixed error message] Signed-off-by: Paul Walmsley <paul@pwsan.com>
OMAP: hwmod: fix the i2c-reset timeout during bootup
The sequence of _ocp_softreset doesn't work for i2c. The i2c module has a
special sequence to reset the module. The sequence is
- Disable the I2C.
- Write to SOFTRESET bit.
- Enable the I2C.
- Poll on the RESETDONE bit.
The sequence is implemented as a function and the i2c_class is updated with
the correct 'reset' pointer. omap_hwmod_softreset function is implemented
which triggers the softreset by writing into sysconfig register. On following
this sequence, i2c module resets properly and timeouts are not seen.
Cc: Rajendra Nayak <rnayak@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Kevin Hilman <khilman@ti.com> Signed-off-by: Avinash.H.M <avinashhm@ti.com>
[paul@pwsan.com: combined this patch with a patch to remove
HWMOD_INIT_NO_RESET from the 44xx hwmod flags; change register
offset conditional code to use the IP block revision; minor code
cleanup] Signed-off-by: Paul Walmsley <paul@pwsan.com>
Andy Green [Sun, 10 Jul 2011 11:27:16 +0000 (05:27 -0600)]
I2C: OMAP2+: add correct functionality flags to all omap2plus i2c dev_attr
This adds the new functionality flags for omap i2c unit to all OMAP2
hwmod definitions
Cc: patches@linaro.org Cc: Ben Dooks <ben-linux@fluff.org> Reported-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andy Green <andy.green@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
Andy Green [Sun, 10 Jul 2011 11:27:15 +0000 (05:27 -0600)]
I2C: OMAP2+: Tag all OMAP2+ hwmod defintions with I2C IP revision
Since we cannot trust (or even reliably find) the OMAP I2C
peripheral unit's own revision register, we must inform the
OMAP i2c driver of which IP version it is running on. We
do this by tagging the omap_hwmod_class for i2c on all the
OMAP2+ platform / cpu specific hwmod init and passing it up
to the driver (next patches).
Cc: patches@linaro.org Cc: Ben Dooks <ben-linux@fluff.org> Reported-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andy Green <andy.green@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
Andy Green [Sun, 10 Jul 2011 11:27:15 +0000 (05:27 -0600)]
I2C: OMAP1/OMAP2+: create omap I2C functionality flags for each cpu_... test
These represent the 8 kinds of implementation functionality
that up until now were inferred by the 16 remaining cpu_...()
tests in the omap i2c driver.
Changed to use BIT() as suggested by Balaji T Krishnamoorthy.
Cc: patches@linaro.org Cc: Ben Dooks <ben-linux@fluff.org> Reported-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andy Green <andy.green@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
Andy Green [Sun, 10 Jul 2011 11:27:14 +0000 (05:27 -0600)]
I2C: OMAP2+: Introduce I2C IP versioning constants
These represent the two kinds of (incompatible) OMAP I2C
peripheral unit in use so far.
The constants are in linux/i2c-omap.h so the omap i2c driver can have
them too.
Cc: patches@linaro.org Cc: Ben Dooks <ben-linux@fluff.org> Reported-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andy Green <andy.green@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
Andy Green [Sun, 10 Jul 2011 11:27:14 +0000 (05:27 -0600)]
I2C: OMAP2+: increase omap_i2c_dev_attr flags from u8 to u32
As part of removing cpu_...() from the OMAP I2C driver, we need to
convert the CPU tests into functionality flags that are set by
hwmod class in the same way the IP revision is.
More flags are needed than will fit in the existing u8 flags
member of omap_i2c_dev_attr.
These flags can refer to options inside the IP block but they are
most needed for information about cpu implementation specific
options that are not part of the IP block itself. For example,
how the CPU data bus is wired to the IP block databus differs
between OMAP cpus and affects how you must shift the address in
the IP block, but is not a feature of the IP block itself.
Cc: patches@linaro.org Cc: Ben Dooks <ben-linux@fluff.org> Reported-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andy Green <andy.green@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
Andy Green [Sun, 10 Jul 2011 11:27:14 +0000 (05:27 -0600)]
I2C: OMAP2+: Set hwmod flags to only allow 16-bit accesses to i2c
Peter Maydell noticed when running under QEMU he was getting
errors reporting 32-bit access to I2C peripheral unit registers
that are documented to be 8 or 16-bit only[1][2]
The I2C driver is blameless as it wraps its accesses in a
function using __raw_writew and __raw_readw, it turned out it
is the hwmod stuff.
However the hwmod code already has a flag to force a
perhipheral unit to only be accessed using 16-bit operations.
This patch applies the 16-bit only flag to the 2430,
OMAP3xxx and OMAP44xx hwmod structs. 2420 was already
correctly marked up as 16-bit.
The 2430 change will need testing by TI as arranged
in the comments to the previous patch version.
When the 16-bit flag is or-ed with other flags, it is placed
first as requested in comments.
Cc: patches@linaro.org Cc: Ben Dooks <ben-linux@fluff.org> Reported-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andy Green <andy.green@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
Tomi Valkeinen [Sun, 10 Jul 2011 02:39:45 +0000 (20:39 -0600)]
OMAP4: hwmod data: Change DSS main_clk scheme
Currently using pm_runtime with DSS requires the DSS driver to enable
the DSS functional clock before calling pm_runtime_get(). That makes it
impossible to use pm_runtime in DSS as it is meant to be used, with
pm_runtime callbacks.
This patch changes the hwmod database for OMAP4 so that enabling the
hwmod via pm_runtime will also enable the DSS functional clock, allowing
us to use pm_runtime properly in DSS driver.
The DSS HWMOD side is not really correct, not before nor after this
patch, and getting DSS to retention will probably not work currently.
However, it is not supported in the mainline kernel anyway, so this
won't break anything.
So this patch allows us to write the pm_runtime adaptation for the DSS
driver the way it should be done, and the HWMOD/PM side can be fixed
later.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
OMAP4: powerdomain data: Remove unsupported MPU powerdomain state
On OMAP4430 devices, because of boot ROM code bug, MPU OFF state can't
be attempted independently. When coming out of MPU OFF state, ROM code
disables the clocks of IVAHD, TESLA which is not desirable. Hence the
MPU OFF state is not usable on OMAP4430 devices.
OMAP4460 onwards, MPU OFF state will be descoped completely because
the DDR firewall falls in MPU power domain. When the MPU hit OFF state,
DDR won't be accessible for other initiators. The deepest state supported
is open switch retention (OSWR) just like CORE and PER PD on OMAP4430.
So in summary MPU power domain OFF state is not supported on OMAP4
and onwards designs. Thanks to new PRCM design, device off mode can
still be achieved with power domains hitting OSWR state.
On OMAP4, CPU accesses on unmapped addresses are redirected to GPMC by
L3 interconnect. Because of CPU speculative nature, such accesses are
possible which can lead to indirect access to GPMC and if it's clock is
not running, it can result in hang/abort on the platform.
Above makes access to GPMC unpredictable during the execution, so it's
module mode needs to be kept under hardware control instead of software
control.
Since the auto gating is supported for GPMC, there isn't any power impact
because of this change.
The issue was un-covered with security middleware running along with HLOS.
In this case GPMC had a valid MMU descriptor on secure side where as HLOS
didn't map the GMPC because it isn't being used.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
[b-cousson@ti.com: Update subject and fix typos in the changelog] Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Kevin Hilman <khilman@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
OMAP4: powerdomain data: Fix core mem states and missing cefuse flag
Since ES2.0, the core ocmram does not support a different state
than the main power domain anymore during both ON and RET power
domain state.
Since PM is not supported at all in ES1.0, update the common
structure.
LOWPOWERSTATECHANGE is supported by the cefuse power domain but
the flag was missing.
Add the PWRDM_HAS_LOWPOWERSTATECHANGE in flags field.
Update the TI copyright date to 2011.
Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
[paul@pwsan.com: moved the indentation changes to a different patch set] Signed-off-by: Paul Walmsley <paul@pwsan.com>
Tomi Valkeinen [Sun, 10 Jul 2011 02:39:44 +0000 (20:39 -0600)]
OMAP4: hwmod data: Modify DSS opt clocks
Add missing DSS optional clocks to HWMOD data for OMAP4xxx.
Add HWMOD_CONTROL_OPT_CLKS_IN_RESET flag for dispc to fix dispc reset.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
[b-cousson@ti.com: Remove a comment and update the subject] Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
[paul@pwsan.com: removed DSS "fck" role and some clkdev aliases at Tomi's
request] Signed-off-by: Paul Walmsley <paul@pwsan.com>
Jon Hunter [Sun, 10 Jul 2011 01:14:47 +0000 (19:14 -0600)]
OMAP4: clock data: Remove UNIPRO clock nodes
UNIPRO was removed from OMAP4 devices from ES2.0 onwards.
Since this IP was anyway non-functional and not supported,
it is best to remove it completely.
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
[b-cousson@ti.com: Update the changelog] Signed-off-by: Benoit Cousson <b-cousson@ti.com>
[paul@pwsan.com: split PRCM header file changes into a separate patch] Signed-off-by: Paul Walmsley <paul@pwsan.com>
Jon Hunter [Sun, 10 Jul 2011 01:14:47 +0000 (19:14 -0600)]
OMAP4: clock data: Remove McASP2, McASP3 and MMC6 clocks
McASP2, 3 and MMC6 modules are not present in the OMAP4 family.
Remove the fclk and the clksel related to these nodes.
Rename the references that were potentially re-used in order nodes.
Remove related macros in prcm header files.
Update TI copyright date.
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
[b-cousson@ti.com: Update the patch according to autogen output] Signed-off-by: Benoit Cousson <b-cousson@ti.com>
[paul@pwsan.com: split PRCM data changes into a separate patch] Signed-off-by: Paul Walmsley <paul@pwsan.com>
Jean Pihet [Sun, 10 Jul 2011 01:15:41 +0000 (19:15 -0600)]
OMAP PM: remove OMAP_PM_NONE config option
The current code base is not linking with the OMAP_PM_NONE
option set.
Since the option OMAP_PM_NOOP provides a no-op/debug layer,
OMAP_PM_NONE can be removed.
OMAP_PM_NOOP is enabled by default by Kconfig.
Signed-off-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
Kevin Hilman [Sun, 10 Jul 2011 01:15:20 +0000 (19:15 -0600)]
OMAP: omap_device: replace _find_by_pdev() with to_omap_device()
The omap_device layer currently has two ways of getting an omap_device
pointer from a platform_device pointer.
Replace current usage of _find_by_pdev() with to_omap_device() since
to_omap_device() is more familiar to the existing to_platform_device()
used when getting a platform_device pointer from a struct device pointer.
Cc: Felipe Balbi <balbi@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com> Reviewed-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
OMAP4: cm: Remove RESTORE macros to avoid access from SW
The restore part of the CM is an alias of some regular registers
used only during the SAR restore to facilate the dma to write
a contiguous set of registers.
The registers should never be used by the SW, only the original
register have to be used.
Remove them from cmX_44xx.h files to avoid anybody to use them by
mistake.
Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
OMAP4: clock data: Re-order some clock nodes and structure fields
A couple of fieds were edited manually and thus do not stick
to the template used by the generator and by other structures.
Move them to the correct location.
Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com>
[paul@pwsan.com: dropped the UNIPRO changes since those will be removed
in a later patch] Signed-off-by: Paul Walmsley <paul@pwsan.com>
OMAP4: clock data: Remove usb_host_fs clkdev with NULL dev
usb_host_fs_fck does have a clkdev mapping with "usbhs-omap.0"
and "fs_fck" alias used by the driver.
The entry with NULL dev is thus not needed anymore.
Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Felipe Balbi <balbi@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
The USB DPLL is a J-Type DPLL with the sddiv extra parameter. Add it
in USB DPLL.
Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com>
[paul@pwsan.com: dropped UNIPRO change since it is removed in a later patch] Signed-off-by: Paul Walmsley <paul@pwsan.com>
To reduce kernel source file data duplication, share struct
omap_hwmod_class and omap_hwmod_class_sysconfig arrays across OMAP2xxx
and 3xxx hwmod data files.
Paul Walmsley [Sun, 10 Jul 2011 01:14:07 +0000 (19:14 -0600)]
omap_hwmod: use a terminator record with omap_hwmod_dma_info arrays
Previously, struct omap_hwmod_dma_info arrays were unterminated; and
users of these arrays used the ARRAY_SIZE() macro to determine the
length of the array. However, ARRAY_SIZE() only works when the array
is in the same scope as the macro user.
So far this hasn't been a problem. However, to reduce duplicated
data, a subsequent patch will move common data to a separate, shared
file. When this is done, ARRAY_SIZE() will no longer be usable.
This patch removes ARRAY_SIZE() usage for struct omap_hwmod_dma_info
arrays and uses a sentinel value (irq == -1) as the array terminator
instead.
Paul Walmsley [Sun, 10 Jul 2011 01:14:06 +0000 (19:14 -0600)]
omap_hwmod: use a terminator record with omap_hwmod_mpu_irqs arrays
Previously, struct omap_hwmod_mpu_irqs arrays were unterminated; and
users of these arrays used the ARRAY_SIZE() macro to determine the
length of the array. However, ARRAY_SIZE() only works when the array
is in the same scope as the macro user.
So far this hasn't been a problem. However, to reduce duplicated
data, a subsequent patch will move common data to a separate, shared
file. When this is done, ARRAY_SIZE() will no longer be usable.
This patch removes ARRAY_SIZE() usage for struct omap_hwmod_mpu_irqs
arrays and uses a sentinel value (irq == -1) as the array terminator
instead.
Paul Walmsley [Sun, 10 Jul 2011 01:14:05 +0000 (19:14 -0600)]
omap_hwmod: use a null structure record to terminate omap_hwmod_addr_space arrays
Previously, struct omap_hwmod_addr_space arrays were unterminated; and
users of these arrays used the ARRAY_SIZE() macro to determine the
length of the array. However, ARRAY_SIZE() only works when the array
is in the same scope as the macro user.
So far this hasn't been a problem. However, to reduce duplicated
data, a subsequent patch will move common data to a separate, shared
file. When this is done, ARRAY_SIZE() will no longer be usable.
This patch removes ARRAY_SIZE() usage for struct omap_hwmod_addr_space
arrays and uses a null structure member as the array terminator
instead.
OMAP: hwmod: Move pr_debug to improve the readability
Move the pr_debug at the top of the function
to trace the entry even if the first test is failing.
That help understanding that we entered the function
but failed in it.
Move the _enable last part out of the test to reduce
indentation and improve readability.
Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
The HW reset must be de-assert after the clocks are enabled
but before waiting for the target to be ready. Otherwise the
reset might not work properly since the clock is not running
to proceed the reset.
De-assert the reset after _enable_clocks and before
_wait_target_ready.
Re-assert it only when the clocks are disabled.
Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
It is perfectly valid for some hwmod to not have any
register target address for sysconfig. This is especially
true for interconnect hwmods.
Remove the warning.
Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
OMAP2+: hwmod: Do not write the enawakeup bit if SYSC_HAS_ENAWAKEUP is not set
The Type 2 type of IPs will not have any enawakeup bit in their sysconfig.
Writing to that bit will instead trigger a softreset.
Check the flag to write this bit only if the module supports it.
Reported-by: Miguel Vadillo <vadillo@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
Miguel Vadillo [Fri, 1 Jul 2011 20:54:02 +0000 (22:54 +0200)]
OMAP2+: hwmod: Enable module in shutdown to access sysconfig
When calling the shutdown, the module may be already in idle.
Accessing the sysconfig register will then lead to a crash.
In that case, re-enable the module in order to allow the access
to the sysconfig register.
Signed-off-by: Miguel Vadillo <vadillo@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
Add the flag to every IPs that support it to allow the
framework to enable it instead of the SMART_STANDBY default
mode.
Without that, an IP with busmaster capability will not
be able to wakeup the interconnect at all.
Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
The commit 86009eb326afde34ffdc5648cd344aa86b8d58d4 was adding
the wakeup support for new OMAP4 IPs. This support is incomplete for
busmaster IPs that need as well to use smart-standby with wakeup.
This new standbymode is suported on HSI and USB_HOST_FS for the moment.
Add the new MSTANDBY_SMART_WKUP flag to mark the IPs that support this
capability.
Enable this new mode when applicable in _enable_wakeup, _disable_wakeup,
_enable_sysc and _idle_sysc.
The omap_hwmod_44xx_data.c will have to be updated to add this new flag.
Paul Walmsley [Sun, 10 Jul 2011 00:00:25 +0000 (18:00 -0600)]
OMAP: dmtimer: add missing include
After commit caf64f2fdc48472995d40656eb1a75524c464447 ("omap: Make a subset
of dmtimer functions into inline functions"),
arch/arm/plat-omap/include/plat/dmtimer.h is missing an include of linux/io.h
- add it.
Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Tony Lindgren <tony@atomide.com>
Jarkko Nikula [Fri, 1 Jul 2011 08:52:27 +0000 (08:52 +0000)]
omap: mcbsp: Remove port number enums
These McBSP port number enums are used only in two places in the McBSP code
so we may remove then and just use numeric values like rest of the code does.
Signed-off-by: Jarkko Nikula <jhnikula@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Peter Ujfalusi [Tue, 7 Jun 2011 07:28:54 +0000 (10:28 +0300)]
OMAP3: Move common twl configuration to twl-common
Reduce the amount of duplicated code by moving the common
configuration for twl4030/5030/tpsxx to the twl-common file.
Use the omap3_pmic_get_config function from board files to
properly configure the PMIC with the common fields.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
Peter Ujfalusi [Tue, 7 Jun 2011 07:26:46 +0000 (10:26 +0300)]
OMAP4: Move common twl6030 configuration to twl-common
Reduce the amount of duplicated code by moving the common
configuration for TWL6030 (on OMAP4 platform) to the
twl-common file.
Use the omap4_pmic_get_config function from board files to
properly configure the PMIC with the common fields.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
Arnd Bergmann [Thu, 30 Jun 2011 12:58:01 +0000 (12:58 +0000)]
omap2+: fix build regression
board-generic.c now contains a reference to omap3_timer, but depends
only on ARCH_OMAP2, not on ARCH_OMAP3, which controls that symbol.
omap2_timer seems to be more appropriate anyway, so use that instead.
Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Tony Lindgren <tony@atomide.com>
Jarkko Nikula [Tue, 14 Jun 2011 11:23:51 +0000 (11:23 +0000)]
omap: mcbsp: Drop SPI mode support
We haven't seen any use for the SPI API in McBSP driver over the years. More
over, Peter Ujfalusi <peter.ujfalusi@ti.com> noticed that SPI mode is not
even supported since OMAP2430 so it's very unlikely that we'll see any use
for it in the future either.
Signed-off-by: Jarkko Nikula <jhnikula@gmail.com> Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
omap_nand_platform_data fields 'options', 'gpio_irq', 'nand_setup' and
'dma_channel' are never referenced by the NAND driver, yet various
board files are initializing those fields. This is both incorrect and
confusing, so remove them. This allows to get rid of a global
variable in gpmc-nand.c.
This also corrects an issue where some boards are trying to pass NAND
16bit flag through .options, but the driver is using .devsize instead
and ignoring .options.
Finally, .dev_ready is treated as a flag by the driver, so make it bool
instead of a function pointer.
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Tony Lindgren [Tue, 29 Mar 2011 22:54:50 +0000 (15:54 -0700)]
omap2+: Rename timer-gp.c into timer.c to combine timer init functions
We can keep everything sys_timer and gptimer.c related code in
timer.c as the code will be very minimal.
Later on we can also remove timer-mpu.c, as it can be called from
omap4_timer_init function.
This allows us to get rid of confusing existing files. We currently
have timer-gp.c, timer-mpu.c, and patches have been posted to add
dmtimer.c. There's no need to have these multiple files, we can
put everything into timer.c.
Tony Lindgren [Tue, 29 Mar 2011 22:54:49 +0000 (15:54 -0700)]
omap2+: Reserve clocksource and timesource and initialize dmtimer later
There's no need to initialize the dmtimer framework early.
Just mark the clocksource and timesource as reserved, and
initialize dmtimer with an arch_initcall.
Signed-off-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com>
Sanjeev Premi [Thu, 16 Jun 2011 20:31:00 +0000 (02:01 +0530)]
OMAP2+: PM: fix section mismatch in pm_dbg_init()
Fix the section mismatch warning:
WARNING: vmlinux.o(.text+0x21118): Section mismatch
in reference from the function pm_dbg_init() to the
function .init.text:pwrdms_setup()
The function pm_dbg_init() references
the function __init pwrdms_setup().
This is often because pm_dbg_init lacks a __init
annotation or the annotation of pwrdms_setup is wrong.
Signed-off-by: Sanjeev Premi <premi@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
Nishanth Menon [Mon, 14 Feb 2011 15:44:17 +0000 (21:14 +0530)]
OMAP3+: SR: enable/disable SR only on need
Since we already know the state of the autocomp enablement, we can
see if the requested state is different from the current state and
enable/disable SR only on the need basis.
Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
Nishanth Menon [Mon, 14 Feb 2011 07:11:10 +0000 (12:41 +0530)]
OMAP3+: SR: disable interrupt by default
We will enable and disable interrupt on a need basis in the class
driver. We need to keep the IRQ disabled by default else the
forceupdate or vcbypass events could trigger events that we don't
need/expect to handle.
This is a preparation for SmartReflex AVS class drivers such as
class 2 and class 1.5 which would need to use interrupts. Existing
SmartReflex AVS class 3 driver does not require to use interrupts
and is not impacted by this change.
Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
Nishanth Menon [Mon, 14 Feb 2011 06:46:36 +0000 (12:16 +0530)]
OMAP3+: SR: make notify independent of class
Interrupt notification mechanism of SmartReflex can be used by the
choice of implementation of the class driver. For example, Class 2 and
Class 1.5 of SmartReflex can both use the interrupt notification to
identify the transition of voltage or other events.
Hence, the actual class does not matter for notifier. Let the class
driver's handling decide how it should be used. SmartReflex driver
should provide just the primitives.
Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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