Huang Shijie [Fri, 20 Dec 2013 16:02:28 +0000 (00:02 +0800)]
mtd: denali: kill the NAND_MAX_PAGESIZE/NAND_MAX_OOBSIZE
This patch kills the NAND_MAX_PAGESIZE/NAND_MAX_OOBSIZE by the following
way:
1.) change the @buf field of nand_buf{} from an array to a pointer.
also remove the DENALI_BUF_SIZE macro.
2.) Before we call the nand_scan_ident, we allocate a temporary buffer
whose size is PAGE_SIZE.
3.) After we finish the nand_scan_ident, we have already getten the
page size and oob size. We will allocate the right buffer size
again.
Huang Shijie [Fri, 20 Dec 2013 16:02:27 +0000 (00:02 +0800)]
mtd: mxc-nand: kill the NAND_MAX_PAGESIZE/NAND_MAX_OOBSIZE
We kill the NAND_MAX_PAGESIZE/NAND_MAX_OOBSIZE by the following way:
1.) Before we call the nand_scan_ident, we allocate a temporary buffer
whose size is PAGE_SIZE.
2.) After we finish the nand_scan_ident, we have already getten the
page size and oob size. We will allocate the right buffer size
again.
Sachin Kamat [Thu, 26 Dec 2013 06:18:34 +0000 (11:48 +0530)]
mtd: onenand: Trivial cleanup in samsung.h
commit 93115b7fa8f4 ("mtd: onenand/samsung: make regs-onenand.h file local")
moved the file to the current location but forgot to remove the pointer to
its previous location. Clean it up.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Sachin Kamat [Mon, 30 Dec 2013 06:30:21 +0000 (12:00 +0530)]
mtd: orion: Cleanup mtd-orion_nand.h header
Commit c02cecb92ed4 ("ARM: orion: move platform_data definitions")
moved the file to the current location but forgot to remove the pointer
to its previous location. Clean it up. While at it also change the header
file protection macros appropriately.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Sachin Kamat [Mon, 30 Dec 2013 06:30:20 +0000 (12:00 +0530)]
mtd: omap2: Cleanup header files
Commit 2203747c9771 ("ARM: omap: move platform_data definitions")
moved the files to the current location but forgot to remove the pointer
to its previous location. Clean it up.
Josh Triplett [Mon, 23 Dec 2013 21:54:56 +0000 (13:54 -0800)]
mtd: denali: Drop print of build date/time
The kernel already has this information, and individual drivers
shouldn't duplicate that. This also eliminates the use of __DATE__ and
__TIME__, which make the build non-deterministic.
Signed-off-by: Josh Triplett <josh@joshtriplett.org> Reviewed-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Rafał Miłecki [Sat, 21 Dec 2013 18:39:12 +0000 (19:39 +0100)]
mtd: bcm47xxpart: alternative MAGIC for board_data partition
Some devices (like WNDR3700v3) have board_data without MPFR magic, some
extra header or extra NVRAM around 0x100. In such case we have to look
for another magic which is BD 0B 0D BD (BD probably stands for Board
Data). It's located "far far away", so instead of extending buffer add
another mtd_read.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Ezequiel Garcia [Fri, 13 Dec 2013 13:58:44 +0000 (10:58 -0300)]
mtd: Hide CONFIG_MTD_BLKDEVS from the menu
Make this option a hidden one and get a cleaner configuration.
This option just selects a common infrastructure for MTD-based devices
to expose a block interface. There is no point in allowing a separate
enable/disable.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
[Brian: keep symbol as tristate] Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Brian Norris [Wed, 30 Oct 2013 23:39:51 +0000 (19:39 -0400)]
mtd: omap2: use nand_base defaults for polled I/O
The omap_{read,write}_buf{8,16}() functions are identical to the default
nand_base versions. Just let nand_base assign them in the
NAND_OMAP_POLLED case.
Signed-off-by: Brian Norris <computersforpeace@gmail.com> Tested-by: Pekon Gupta <pekon@ti.com>
Brian Norris [Sat, 14 Dec 2013 05:19:58 +0000 (21:19 -0800)]
mtd: nand-gpio: don't waste memory for OF failure
We shouldn't try to allocate a resource until we're sure the
of_property_read_u64() call didn't fail. This is especially important if
we use this code for both CONFIG_OF and !CONFIG_OF builds, since
of_property_read_u64() will always return -ENOSYS for !CONFIG_OF.
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Ezequiel Garcia [Wed, 18 Dec 2013 21:44:10 +0000 (18:44 -0300)]
mtd: nand: pxa3xx: Consolidate ECC initialization
In order to avoid code duplication, let's consolidate the ECC setting
for all SoC variants. Such decision is based on page size and ECC
strength requirements.
Also, provide a default value for the case where such ECC information
is not provided (non-ONFI devices).
Ezequiel Garcia [Wed, 18 Dec 2013 21:44:09 +0000 (18:44 -0300)]
mtd: nand: pxa3xx: Use extended cmdfunc() only if needed
Currently, we have two different cmdfunc's implementations:
one for PXA3xx SoC variant and one for Armada 370/XP SoC variant.
The former is the legacy one, typically constrained to devices
with page sizes smaller or equal to the controller's FIFO buffer.
On the other side, the latter _only_ supports the so-called extended
command semantics, which allow to handle devices with larger
page sizes (4 KiB, 8 KiB, ...).
This means we currently don't support devices with smaller pages on the
A370/XP SoC. Fix it by first renaming the cmdfuncs variants, and then
make the choice based on device page size (and SoC variant), rather than
SoC variant alone.
While at it, add a check for page size, to make sure we don't allow larger
pages sizes on the PXA3xx variant.
Ezequiel Garcia [Wed, 18 Dec 2013 21:44:08 +0000 (18:44 -0300)]
mtd: nand: pxa3xx: Clear need_wait flag when starting a command
Currently the driver assumes all commands will eventually trigger a RnB
transition, and thus a "device is ready" IRQ.
This assumption means that on every issued command, the dev_ready completion
handler is init'ed and the need_wait flag is set.
However this is incorrect: some commands (such as NAND_CMD_STATUS) don't
make the device 'busy' and thus a RnB transition never occurs.
Given, the NAND core never calls waitfunc() after such commands, this
is not a problem.
Therefore, it's possible to only clear the need_wait flag on every command
that is started.
This fixes a current bug that can be reproduced on PXA boards by writing
blank (all 0xff'ed) to a page:
1. The kernel issues NAND_CMD_STATUS and sets need_wait=1. The flag
won't be cleared for this command since no RnB transition is
involved.
2. NAND_CMD_PAGEPROG is issued but since the data is blank, the driver
decides not to execute the command (and no IRQ activity is
involved).
3. The NAND core calls waitfunc() and waits for the dev_ready
completion, which will never end since the device _is_ already ready.
Rashika Kheria [Fri, 13 Dec 2013 07:16:04 +0000 (12:46 +0530)]
mtd: denali: Mark function is_erased() as static
This patch marks the function is_erased() as static in denali.c because
it is not used outside this file.
This patch elimiates the following warning in nand/denali.c:
drivers/mtd/nand/denali.c:900:6: warning: no previous prototype for ‘is_erased’ [-Wmissing-prototypes]
Rashika Kheria [Fri, 13 Dec 2013 07:14:07 +0000 (12:44 +0530)]
mtd: lpddr: Mark functions as static and remove unused function
This patch marks the functions do_write_buffer() and do_erase_oneblock()
as static because because they are not used outside this file. It also
removes the unused function word_program() in lpddr/lpddr_cmds.c.
Thus, it also removes the following warnings in lpddr/lpddr_cmds.c:
drivers/mtd/lpddr/lpddr_cmds.c:391:5: warning: no previous prototype for ‘do_write_buffer’ [-Wmissing-prototypes]
drivers/mtd/lpddr/lpddr_cmds.c:472:5: warning: no previous prototype for ‘do_erase_oneblock’ [-Wmissing-prototypes]
drivers/mtd/lpddr/lpddr_cmds.c:751:5: warning: no previous prototype for ‘word_program’ [-Wmissing-prototypes]
Brian Norris [Tue, 17 Dec 2013 04:50:32 +0000 (20:50 -0800)]
mtd: nand: lpc32xx_mlc: drop custom write_page callback
This driver doesn't need its own custom chip->write_page callback; the
only "custom" requirement is that this driver does not support subpage
writes, which we can avoid using the NAND_NO_SUBPAGE_WRITE flag. With
NAND_NO_SUBPAGE_WRITE, the default routine (nand_write_page()) should
perform the equivalent operations.
Signed-off-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Roland Stigge <stigge@antcom.de> Tested-by: Roland Stigge <stigge@antcom.de>
Ivan Khoronzhuk [Tue, 17 Dec 2013 13:38:31 +0000 (15:38 +0200)]
mtd: nand: davinci: don't request AEMIF address range
The TI AEMIF driver registers are used to setup timings for each chip
select. The same registers range is used to setup NAND settings.
The AEMIF and NAND drivers not use the same registers in this range.
In case with TI AEMIF driver, the memory address range is requested
already by AEMIF, so we cannot request it twice, just ioremap.
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com> Reviewed-by: Taras Kondratiuk <taras@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Ivan Khoronzhuk [Tue, 17 Dec 2013 13:38:12 +0000 (15:38 +0200)]
mtd: nand: davinci: reuse driver for Keystone arch
The Keystone arch has compatible nand device, so reuse it.
In case with Keystone it depends on TI_AEMIF because AEMIF
driver is responsible to set timings.
See http://www.ti.com/lit/ug/sprugz3a/sprugz3a.pdf
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com> Reviewed-by: Taras Kondratiuk <taras@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Ivan Khoronzhuk [Tue, 17 Dec 2013 13:37:56 +0000 (15:37 +0200)]
mtd: nand: davinci: adjust DT properties to MTD generic
The properties davinci-ecc-mode, davinci-nand-use-bbt, davinci-nand-buswidth
are MTD generic. Correct names for them are: nand-ecc-mode, nand-on-flash-bbt,
nand-bus-width accordingly. So rename them in dts and documentation.
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com> Reviewed-by: Taras Kondratiuk <taras@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Ivan Khoronzhuk [Tue, 17 Dec 2013 13:33:50 +0000 (15:33 +0200)]
mtd: nand: davinci: fix driver registration
When kernel is booted using DT, there is no guarantee that Davinci
NAND device has been created already at the time when driver init
function is executed. Therefore, platform_driver_probe() can't be used
because this may result the Davinci NAND driver will never be probed.
The driver probing has to be made with core mechanism.
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com> Reviewed-by: Taras Kondratiuk <taras@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Ezequiel Garcia [Mon, 25 Nov 2013 11:30:31 +0000 (08:30 -0300)]
mtd: nand: refactor print messages
Add a nice "nand:" prefix to all pr_xxx() messages. This allows
to get rid of the "NAND" words in messages, given the context
is already given by the prefix.
Remove the __func__ report from messages where it's not needed and refactor
the device detection messages to show itself in several lines.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
The driver core clears the driver data to NULL after device_release
or on probe failure. Thus, it is not needed to manually clear the
device driver data to NULL.
Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
mtd: mpc5121_nfc: drop devm_free_irq of devm_ allocated irq
The devm_request_irq function allocates irq that is released
when a driver detaches. Thus, there is no reason to explicitly
call devm_free_irq in probe or remove functions.
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Huang Shijie [Tue, 19 Nov 2013 02:57:50 +0000 (10:57 +0800)]
mtd: gpmi: remove the unnecessary pr_err()
The error messages for the failure of dmaengine_prep_slave_sg are
not necessary, this patch removes all these pr_err, and returns with
the proper error code -EINVAL, not -1.
Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Alexander Shiyan [Wed, 13 Nov 2013 11:59:25 +0000 (15:59 +0400)]
mtd: nand: diskonchip: Request memory region prior ioremap()
This patch adds request_mem_region() prior ioremap() for diskonchip
driver. This will allow to check if memory region is occupied by any
other device, for example in case if we have memory region for several
optional devices and only one device can be used at once.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Huang Shijie [Thu, 14 Nov 2013 06:25:44 +0000 (14:25 +0800)]
mtd: gpmi: do not use the local array to do the DMA transfer
The local array feature[] is in the stack. We can see the warning
when we enable the CONFIG_DMA_API_DEBUG:
----------------------------------------------------------
WARNING: at lib/dma-debug.c:950 check_for_stack+0xac/0xf8()
gpmi-nand 112000.gpmi-nand: DMA-API: device driver maps memory fromstack [addr=dc05be34]
Modules linked in:
CPU: 0 PID: 1 Comm: swapper/0 Not tainted 3.10.17-16851-g2414a73 #1324
[<80014cbc>] (unwind_backtrace+0x0/0x138) from [<8001251c>] (show_stack+0x10/0x14)
[<8001251c>] (show_stack+0x10/0x14) from [<8002699c>] (warn_slowpath_common+0x4c/0x68)
[<8002699c>] (warn_slowpath_common+0x4c/0x68) from [<80026a4c>] (warn_slowpath_fmt+0x30/0x40)
[<80026a4c>] (warn_slowpath_fmt+0x30/0x40) from [<8028e2f8>] (check_for_stack+0xac/0xf8)
[<8028e2f8>] (check_for_stack+0xac/0xf8) from [<8028e438>] (debug_dma_map_sg+0xf4/0x188)
[<8028e438>] (debug_dma_map_sg+0xf4/0x188) from [<803968d0>] (prepare_data_dma+0xb8/0x1a8)
[<803968d0>] (prepare_data_dma+0xb8/0x1a8) from [<80397b20>] (gpmi_send_data+0x84/0xfc)
[<80397b20>] (gpmi_send_data+0x84/0xfc) from [<8038c2b4>] (nand_onfi_set_features+0x50/0x74)
[<8038c2b4>] (nand_onfi_set_features+0x50/0x74) from [<80397198>] (gpmi_extra_init+0x90/0x170)
[<80397198>] (gpmi_extra_init+0x90/0x170) from [<8039520c>] (gpmi_nand_probe+0x2f8/0xb3c)
[<8039520c>] (gpmi_nand_probe+0x2f8/0xb3c) from [<8031b974>] (platform_drv_probe+0x18/0x1c)
----------------------------------------------------------
The patch uses the kzalloc to allocate the buffer, and free it when
we do not use it anymore.
Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Brian Norris [Thu, 14 Nov 2013 22:41:32 +0000 (14:41 -0800)]
mtd: nand: pxa3xx: make ECC configuration checks more explicit
The Armada BCH configuration in this driver uses one of the two
following ECC schemes:
16-bit correction per 2048 bytes
16-bit correction per 1024 bytes
These are sufficient for mapping to the 4-bit per 512-bytes and 8-bit
per 512-bytes (respectively) minimum correctability requirements of many
common NAND.
The current code only checks for the required strength (4-bit or 8-bit)
without checking the ECC step size that is associated with that strength
(and simply assumes it is 512). While that is often a safe assumption to
make, let's make it explicit, since we have that information.
Signed-off-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com>
This commit extends the ECC correctable error detection to include
ECC BCH errors. The number of BCH correctable errors can be any up to 16,
and the actual value is exposed in the NDSR register.
Therefore, we change some symbol names to refer to correctable or
uncorrectable (instead of single-bit or double-bit as it was in the
Hamming case) and while at it, cleanup the detection code slightly.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Ezequiel Garcia [Thu, 14 Nov 2013 21:25:38 +0000 (18:25 -0300)]
mtd: nand: pxa3xx: Add multiple chunk write support
This commit adds write support for large pages (4 KiB, 8 KiB).
Such support is implemented by issuing a multiple command sequence,
transfering a set of 2 KiB chunks per transaction.
The splitted command sequence requires to send the SEQIN command
independently of the PAGEPROG command and therefore it's set as
an execution command.
Since PAGEPROG enables ECC, each 2 KiB chunk of data is written
together with ECC code at a controller-fixed location within
the flash page.
Currently, only devices with a 4 KiB page size has been tested.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Ezequiel Garcia [Thu, 14 Nov 2013 21:25:37 +0000 (18:25 -0300)]
mtd: nand: pxa3xx: Introduce multiple page I/O support
As preparation work to fully support large pages, this commit adds
the initial infrastructure to support splitted (aka chunked) I/O
operation. This commit adds support for read, and follow-up patches
will add write support.
When a read (aka READ0) command is issued, the driver loops issuing
the same command until all the requested data is transfered, changing
the 'extended' command field as needed.
For instance, if the driver is required to read a 4 KiB page, using a
chunk size of 2 KiB, the transaction is splitted in:
1. Monolithic read, first 2 KiB page chunk is read
2. Last naked read, second and last 2KiB page chunk is read
If ECC is enabled it is calculated on each chunk transfered and added
at a controller-fixed location after the data chunk that must be
spare area.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Ezequiel Garcia [Thu, 14 Nov 2013 21:25:36 +0000 (18:25 -0300)]
mtd: nand: pxa3xx: Add a read/write buffers markers
In preparation to support multiple (aka chunked, aka splitted)
page I/O, this commit adds 'data_buff_pos' and 'oob_buff_pos' fields
to keep track of where the next read (or write) should be done.
This will allow multiple calls to handle_data_pio() to continue
the read (or write) operation.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
projects / karo-tx-linux.git / log