Christian König [Tue, 10 Jan 2017 16:27:49 +0000 (17:27 +0100)]
drm/amdgpu: user BO priority instead of self coding it (v2)
Keeping groups of BOs on the LRU is to time consuming on command submission.
Instead use the newly added BO priority to give a certain eviction order.
v2: agd: trivial warning fix
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Roger.He <Hongbo.He@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Tue, 10 Jan 2017 13:08:28 +0000 (14:08 +0100)]
drm/ttm: add BO priorities for the LRUs
This way the driver can specify a priority for a BO which has the effect that
a BO is only evicted when all other BOs with a lower priority are evicted
first.
Reviewed-by: Sinclair Yeh <syeh@vmware.com> Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Roger.He <Hongbo.He@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 6 Jan 2017 18:16:07 +0000 (19:16 +0100)]
drm/ttm: remove allow_errors parameter from ttm_bo_force_list_clean
Not allowing errors here is completely pointless and actually dangerous
cause trying to continue on an error can cause an endless loop.
Reviewed-by: Sinclair Yeh <syeh@vmware.com> Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Roger.He <Hongbo.He@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Xiangliang Yu [Wed, 18 Jan 2017 04:50:14 +0000 (12:50 +0800)]
drm/amdgpu/vi: fix mailbox irq mistake
For virt, freed mailbox irq should be handled in hw fini, not hw
init. Correct it.
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Reviewed-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Xiangliang Yu [Wed, 18 Jan 2017 04:47:55 +0000 (12:47 +0800)]
drm/amdgpu: fix reboot failure issue for virtualization
Reboot process will call HW fini functions of IP blocks. For virt,
need to send event three before hw fini and send event four after
hw fini.
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Reviewed-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Wed, 18 Jan 2017 18:01:25 +0000 (13:01 -0500)]
drm/amd/amdgpu: Add PCI info to gca_config debugfs
So we can determine which device the entry is before connecting
a display.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Wed, 18 Jan 2017 02:38:06 +0000 (10:38 +0800)]
drm/amdgpu:insert switch buffer only for VM submit
for non-VM submit which is from kernel side, no need
to switch buffer at all.
Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Wed, 18 Jan 2017 02:37:34 +0000 (10:37 +0800)]
drm/amdgpu:Preamble is forbid to be ignored in SRIOV
SR-IOV requires the preamble.
Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Wed, 18 Jan 2017 02:31:18 +0000 (10:31 +0800)]
drm/amdgpu:set cond_exec polling value to 1 in ring_init
no need to set it per ib_schedule(), hw won't override
this polling address.
Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Tue, 17 Jan 2017 02:56:16 +0000 (10:56 +0800)]
drm/amdgpu:in cntx_ctrl we need insert meta-init for CE/DE(V2)
to support SRIOV preemption.
v2:
fix emit_frame_size
Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Tue, 17 Jan 2017 02:55:42 +0000 (10:55 +0800)]
drm/amdgpu:introduce new flag to identify VM domain for cntx_ctrl
To determine whether the context uses GPUVM or not.
Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Tue, 17 Jan 2017 02:52:58 +0000 (10:52 +0800)]
drm/amdgpu:implement CE/DE meta-init routines
those package need to insert into ring buffer for
SRIOV case. they are used to let CP do preemption.
Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Tue, 17 Jan 2017 02:52:33 +0000 (10:52 +0800)]
drm/amdgpu:implement ring_write_multiple
Write multiple dwords to the ring.
Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Thu, 12 Jan 2017 07:32:44 +0000 (15:32 +0800)]
drm/amdgpu:add META_DATA struct for CSA/SRIOV v2
META-DATA is used in GFX cmd submit, we have two
format suit for META-DATA-init, one is legacy and another
is for chained-ib preempt, which is used in vulkan
UMD.
v2: drop use CP version number to judge if chain-ib
supports or not, we wait for it mature
Signed-off-by: Monk Liu <Monk.Liu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Thu, 12 Jan 2017 13:50:18 +0000 (21:50 +0800)]
drm/amdgpu: refine ci uvd dpm code.
Fix up the powergating logic.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Ack-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Nils Wallménius [Mon, 16 Jan 2017 20:56:48 +0000 (21:56 +0100)]
drm/amdgpu: simplify allocation of scratch regs
The scratch regs are sequential so there's no need to keep
them in an array, we can just return the index of the first
free register + the base register. Also change the array
of bools for keeping track of the free regs to a bitfield.
Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Refactor flip into prepare submit and submit. (v3)
Make pflip atomic friendly. Split the fuinction into
whatever can fail part and the actual flip submit part.
Call the pre-submit function before atomic states
are swapped so in case of error we can fail the
IOCTL.
v2:
Update due to target_vblank code change.
Fix identetation.
Change return type for amdgpu_crtc_submit_flip to void
v3: agd: fix formatting
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Reviewed-by Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Switch error code when bo pin fails. (v3)
Switching to -ENOMEM resolves a hang in case the driver
uses this function in atomic code path.
v2: Update commit message.
v3:
Remove forcing -EINVAL in case of amdgpu_bo_pin fail
since there is no apparent reason for not just passing
through the the return value.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by Harry Wentland <harry.wentland@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Nicolai Hähnle [Tue, 10 Jan 2017 19:36:56 +0000 (20:36 +0100)]
drm/amd/amdgpu: fix locking in bo creation error path
Unlock the resv lock only if we were the ones to lock it in the first
place.
Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Nicolai Hähnle [Tue, 10 Jan 2017 18:06:00 +0000 (19:06 +0100)]
drm/amd/amdgpu: lock reservation object while creating shadow bo
ttm_bo_init checks that the reservation object is locked. This is
the caller's responsibility when resv != NULL. Otherwise, the inline
reservation object of the newly allocated buffer is used and must
explicitly be locked.
Uninterruptible w/w locks without an acquire context are always
successful.
v2: use ww_mutex_lock
Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> (v1) Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Xiangliang Yu [Sat, 17 Dec 2016 14:48:57 +0000 (22:48 +0800)]
drm/amdgpu: do not reset gpu for virtualization
Current amdgpu reset process only works on bare-metal and for
SRIOV many inside it need re-work to adapt to vf device.
This is a temporary workaround to skip gpu reset.
Signed-off-by: Monk Liu <Monk.Liu@amd.com> Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Xiangliang Yu [Wed, 11 Jan 2017 09:18:40 +0000 (17:18 +0800)]
drm/amdgpu/virt: enable virtual display
Virtual display is default setting for virtualization, enable it.
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Monk Liu <Monk.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Xiangliang Yu [Thu, 12 Jan 2017 07:22:18 +0000 (15:22 +0800)]
drm/amdgpu/vi: add support virtualization
Call VI virtualization functions if device is Vf.
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Xiangliang Yu [Thu, 12 Jan 2017 07:14:36 +0000 (15:14 +0800)]
drm/amdgpu: request/release full gpu access if device is vf
For gpu vf device, first need to request full gpu access before
accessing gpu registers, and release full gpu access after the
access is done.
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Xiangliang Yu [Thu, 12 Jan 2017 07:00:41 +0000 (15:00 +0800)]
drm/amdgpu/virt: implement VI virt operation interfaces
VI has asic specific virt support, which including mailbox and
golden registers init.
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Monk Liu <Monk.Liu@amd.com> Signed-off-by: shaoyunl <Shaoyun.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Xiangliang Yu [Thu, 12 Jan 2017 06:53:08 +0000 (14:53 +0800)]
drm/amdgpu/virt: add high level interfaces for virt
Add high level interfaces that is not relate to specific asic. So
asic files just need to implement the interfaces to support
virtualization.
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Monk Liu <Monk.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Xiangliang Yu [Thu, 12 Jan 2017 06:11:53 +0000 (14:11 +0800)]
drm/amdgpu/virt: add runtime flag
Add new flag to define gpu runtime that is out of full gpu access.
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Xiangliang Yu [Thu, 12 Jan 2017 05:57:48 +0000 (13:57 +0800)]
drm/amdgpu/gfx8: implement emit_rreg/wreg function
Implement emit_rreg/wreg function for kiq ring.
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Xiangliang Yu [Tue, 10 Jan 2017 04:53:52 +0000 (12:53 +0800)]
drm/amdgpu/ring: add two interfaces to support r/w registers with kiq
During virtual runtime, need to send command to kiq ring to
read/write GPU registers. Add two interface to support the two
actions.
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Monk Linu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Mon, 9 Jan 2017 07:54:32 +0000 (15:54 +0800)]
drm/amdgpu:invoke CSA functions (v2)
Make sure the CSA is mapped.
v2: agd: rebase.
Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Mon, 9 Jan 2017 07:21:13 +0000 (15:21 +0800)]
drm/amdgpu:add new file for SRIOV
for SRIOV usage, CSA is only used per device and each
VM will map on it.
Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Mon, 9 Jan 2017 07:23:17 +0000 (15:23 +0800)]
drm/amdgpu:new field members for SRIOV
and implement CSA functions in this file
Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Nicolai Hähnle [Mon, 12 Dec 2016 11:09:12 +0000 (12:09 +0100)]
drm/amd/amdgpu: add check that shadow page directory is GPU-accessible
Skip amdgpu_gem_va_update_vm when shadow the page directory is swapped out.
Clean up the check for non-shadow BOs as well using the new helper function.
Nicolai Hähnle [Thu, 15 Dec 2016 16:26:42 +0000 (17:26 +0100)]
drm/amd/amdgpu: move eviction counting to amdgpu_bo_move_notify
This catches evictions of shadow page tables from the GART. Since shadow
page tables are always stored in system memory, amdgpu_bo_move is never
called for them.
This fixes a crash during command submission that occurs when only a shadow
page table and no other BOs were evicted since the last submission.
Fixes: 1baa439fb2f4e586 ("drm/amdgpu: allocate shadow for pd/pt bo V2") Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Tue, 10 Jan 2017 11:54:25 +0000 (19:54 +0800)]
drm/amdgpu: refine vce3.0 initialize.
1. disable vce cg when vce hw initialize.
2. initizlize vce clock to 10KHz fo dgpu,
so no need to set bypass clock to vce.
Change-Id: I934c2c4820cc95c1bfa2fa41ff0f40a0d3cd1c40 Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Fri, 6 Jan 2017 05:32:49 +0000 (13:32 +0800)]
drm/amdgpu: extend profiling mode.
in profiling mode, powerplay will fix power state
as stable as possible.and disable gfx cg and LBPW feature.
profile_standard: as a prerequisite, ensure power and thermal
sustainable, set clocks ratio as close to the highest clock
ratio as possible.
profile_min_sclk: fix mclk as profile_normal, set lowest sclk
profile_min_mclk: fix sclk as profile_normal, set lowest mclk
profile_peak: set highest sclk and mclk, power and thermal not
sustainable
profile_exit: exit profile mode. enable gfx cg/lbpw feature.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Thu, 5 Jan 2017 13:27:31 +0000 (21:27 +0800)]
drm/amdgpu: add get clockgating_state method for vce v3
Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Thu, 5 Jan 2017 13:07:02 +0000 (21:07 +0800)]
drm/amdgpu: add get clockgating_state method for uvd v5&v6
Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Thu, 5 Jan 2017 11:17:13 +0000 (19:17 +0800)]
drm/amdgpu: add parse clock gating state
Suggested-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Cc: William Lewis <minutemaidpark@hotmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Call detection function driectly, so remove the interface.
V2: ci and si also need to call the detect function.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Move the detection forward into vi_set_ip_blocks function, then
add ip blocks virtualization need if device is VF.
V2: add ip blocks according to asic type.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Xiangliang Yu [Fri, 23 Dec 2016 07:00:01 +0000 (15:00 +0800)]
drm/amdgpu/gfx8: add support kernel interface queue(KIQ)
KIQ is queue-memory based initialization method: setup KIQ queue
firstly, then send command to KIQ to setup other queues, without
accessing registers.
For virtualization, need KIQ to access virtual function registers
when running on guest mode.
V2: use amdgpu_bo_create/free_kernel to allocate BO.
Signed-off-by: Monk Liu <Monk.Liu@amd.com> Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Amber Lin [Wed, 4 Jan 2017 13:06:58 +0000 (08:06 -0500)]
drm/amdgpu: PCI I/O bar can be disabled
PCI I/O bar can be disabled in VBIOS to save the resource. It is often
disabled in large aperture VBIOS. Don't call it an error.
Signed-off-by: Amber Lin <Amber.Lin@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Thu, 29 Dec 2016 07:23:44 +0000 (15:23 +0800)]
drm/amd/powerplay: refine smumgr code
1. delete asic_smum_init functions, export asic private functions
to smumgr directly, make code more readable.
2. create asic private data in asic_init_func.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Wed, 28 Dec 2016 11:43:23 +0000 (19:43 +0800)]
drm/amd/powerplay: refine powerplay interface.
v2: add pp_check function to check pp_instance
valid.
1. powerplay export two new interface to amdgpu,
amd_powerplay_create/amd_powerplay_destroy.
2. create pp_instance/smumgr/hwmgr/eventmgr in
early init, destroy them when lata_fini.
3. in sw_init, create and init asic private smumgr
data, and free them when sw_fini.
4. in hw_init, create and init asic private hwmgr
data, and free them when hw_fini.
5. export powerplay state: PP_DPM_DISABLED.
when user disabled powerplay or hwmgr/eventmgr
init failed, powerplay return this state to amdgpu.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Fri, 23 Dec 2016 07:24:37 +0000 (15:24 +0800)]
drm/amd/powerplay: add profiling mode in dpm level
In some case, App need to run under max stable clock.
so export profiling mode: GFX CG was disabled.
and user can select the max stable clock of the device.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Mon, 26 Dec 2016 06:05:30 +0000 (14:05 +0800)]
drm/amd/powerplay: reshuffle headers to make pr_fmt macro before <linux/xxx.h>
This patch reshuffles headers to define pr_fmt before <linux/xxx.h>.
It can avoid pr_fmt redefine warnning from linux/xxx.h like below:
CC [M] /home/ray/gpu/BUILD/x86_64/linux/drivers/gpu/drm/amd/amdgpu//../powerplay/amd_powerplay.o
/home/ray/gpu/BUILD/x86_64/linux/drivers/gpu/drm/amd/amdgpu//../powerplay/amd_powerplay.c:24:0: warning: "pr_fmt" redefined
#define pr_fmt(fmt) "[powerplay] " fmt
^
In file included from include/linux/kernel.h:13:0,
from include/linux/list.h:8,
from include/linux/agp_backend.h:33,
Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Ken Xue [Wed, 21 Dec 2016 10:35:28 +0000 (18:35 +0800)]
drm/amdgpu: Refine the way to get atom bios
There are several ways to check out a ATOMBIOS. In previous codes, try
a new way to fetch out vbios/rom, until current vbios/rom is started with
0x55aa, then check if this vbios is ATOMBIOS. Now, try a new way to fetch
out vbios until all flags of ATOMBIOS are verified.
Signed-off-by: Ken Xue <Ken.Xue@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Kees Cook [Sat, 17 Dec 2016 01:02:32 +0000 (17:02 -0800)]
drm/amdgpu: use designated initializers
Prepare to mark sensitive kernel structures for randomization by making
sure they're using designated initializers. These were identified during
allyesconfig builds of x86, arm, and arm64, with most initializer fixes
extracted from grsecurity.
Signed-off-by: Kees Cook <keescook@chromium.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Nils Wallménius [Wed, 14 Dec 2016 20:52:45 +0000 (21:52 +0100)]
drm/amdgpu: Remove checking for atombios
This is a left over from radeon, amdgpu doesn't support any
non-atombios parts and amdgpu_device_init would bail if the
check for atombios failed anyway.
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Support wider address spaces, make it 32-bit so we don't have to
revisit this for a while.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Arindam Nath [Mon, 12 Dec 2016 09:59:33 +0000 (15:29 +0530)]
drm/amd/amdgpu: get maximum and used UVD handles (v4)
Change History
--------------
v4: Changes suggested by Emil, Christian
- return -ENODATA for asics with unlimited sessions
v3: changes suggested by Christian
- Add a check for UVD IP block using AMDGPU_HW_IP_UVD
query type.
- Add a check for asic_type to be less than
CHIP_POLARIS10 since starting Polaris, we support
unlimited UVD instances.
- Add kerneldoc style comment for
amdgpu_uvd_used_handles().
v2: as suggested by Christian
- Add a new query AMDGPU_INFO_NUM_HANDLES
- Create a helper function to return the number
of currently used UVD handles.
- Modify the logic to count the number of used
UVD handles since handles can be freed in
non-linear fashion.
v1:
- User might want to query the maximum number of UVD
instances supported by firmware. In addition to that,
if there are multiple applications using UVD handles
at the same time, he might also want to query the
currently used number of handles.
For this we add two variables max_handles and
used_handles inside drm_amdgpu_info_hw_ip. So now
an application (or libdrm) can use AMDGPU_INFO IOCTL
with AMDGPU_INFO_HW_IP_INFO query type to get these
values.
Signed-off-by: Arindam Nath <arindam.nath@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Fri, 16 Dec 2016 13:08:27 +0000 (08:08 -0500)]
drm/amd/amdgpu: De-numberify golden SI registers
Where possible replace numeric constants in the table
with their register names.
Compile tested + executed on a Tahiti.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chris Wilson [Wed, 25 Jan 2017 10:10:44 +0000 (10:10 +0000)]
drm/sti: Fix compilation failure for drm_framebuffer.pixel_format
drivers/gpu/drm/sti/sti_plane.c:76:33: error: ‘struct drm_framebuffer’
has no member named ‘pixel_format’; did you mean ‘format’?
I didn't look to hard at the casting to a char * and just did a
mechanical transformation of s/pixel_format/format->format/ as given in
commit 438b74a5497c ("drm: Nuke fb->pixel_format").
Fixes: 438b74a5497c ("drm: Nuke fb->pixel_format") Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Benjamin Gaignard <benjamin.gaignard@linaro.org> Cc: Vincent Abriou <vincent.abriou@st.com> Acked-by: Vincent Abriou <vincent.abriou@st.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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