Paul Mackerras [Wed, 7 Feb 2007 02:13:26 +0000 (13:13 +1100)]
[POWERPC] Clear RI bit in MSR before restoring r13 when returning to userspace
Some instruction tracing tools use the RI (recoverable interrupt) bit
in the MSR to indicate when it's safe to single-step. Currently we
clear RI after restoring r13 when returning to userspace. However,
if we single-step past the point where r13 is restored, we'll corrupt
r13 in the exception entry code and not restore it. This moves the
clearing of RI to just before r13 is restored so this doesn't happen.
Livio Soares [Wed, 7 Feb 2007 01:51:36 +0000 (12:51 +1100)]
[POWERPC] Fix performance monitor exception
To the issue: some point during 2.6.20 development, Paul Mackerras
introduced the "lazy IRQ disabling" patch (very cool work, BTW).
In that patch, the performance monitor unit exception was marked as
"maskable", in the sense that if interrupts were soft-disabled, that
exception could be ignored. This broke my PowerPC profiling code.
The symptom that I see is that a varying number of interrupts
(from 0 to $n$, typically closer to 0) get delivered, when, in
reality, it should always be very close to $n$.
The issue stems from the way masking is being done. Masking in
this fashion seems to work well with the decrementer and external
interrupts, because they are raised again until "really" handled.
For the PMU, however, this does not apply (at least on my Xserver
machine with a 970FX processor). If the PMU exception is not handled,
it will _not_ be re-raised (at least on my machine). The documentation
states that the PMXE bit in MMCR0 is set to 0 when the PMU exception
is raised. However, software must re-set the bit to re-enable PMU
exceptions. If the exception is ignored (as currently) not only is
that interrupt lost, but because software does not re-set PMXE, the
PMU registers are "frozen" forever.
[This patch means that performance monitor exceptions are taken and
handled even if irqs are off, as long as some other interrupt hasn't
come along and caused interrupts to be hard-disabled. In this sense
the PMU exception becomes like an NMI. The oprofile code for most
powerpc processors does nothing that is unsafe in an NMI context, but
the Cell oprofile code does a spin_lock_irqsave. However, that turns
out to be OK because Cell doesn't actually use the performance
monitor exception; performance monitor interrupts come in as a
regular interrupt on Cell, so will be disabled when irqs are off.
-- paulus.]
Nathan Lynch [Tue, 6 Feb 2007 02:01:15 +0000 (20:01 -0600)]
[POWERPC] Maple: use mmio nvram
Some systems supported by the maple platform (e.g. JS2x blades running
SLOF) are able to use the mmio_nvram backend for reading and writing
nvram. This is an improvement over the current situation -- no nvram
access from userspace at all.
Select MMIO_NVRAM for the maple platform.
Initialize the mmio_nvram backend from maple setup code.
Signed-off-by: Nathan Lynch <ntl@pobox.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
The DMA controller on PWRficient is somewhat special -- has a PCI header
so it looks like it's on the root PCI (-Express) root bus, but it uses
more than the default number of interrupts (and they are hardwired).
We need to wire up all interrupts for the DMA controller. The generic
IRQ code will only map the primary interrupt from the PCI header (128),
so add 129->211 by hand.
Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
Pavel Roskin [Sun, 4 Feb 2007 08:16:08 +0000 (03:16 -0500)]
[POWERPC] Assign all PCI busses on G3 Blue & White
G3 Blue & White is misconfigured by default so that CardBus controllers
in PCI slots don't work. The PCI bridge is programmed to only allow
access to bus 1 but not higher busses.
The patch forces the PCI busses to be reassigned if a Grackle controller
is found and the machine identifies itself as "PowerMac1,1"
Signed-off-by: Pavel Roskin <proski@gnu.org> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
Ishizaki Kou [Fri, 2 Feb 2007 07:45:33 +0000 (16:45 +0900)]
[POWERPC] Celleb: consolidate spu management ops
Spu management ops in arch/platforms/cell/spu_priv1_mmio.h can be used
commonly in of based platform. This patch separates spu management ops
from native cell code and uses on celleb platform.
Vitaly Bordug [Tue, 30 Jan 2007 23:09:06 +0000 (02:09 +0300)]
[POWERPC] mpc8272ads: defconfig
Default config file for mpc8272ads (powerpc port).Though relevant bits went
in, it is required to keep proper default configuration for the target,
which seems to be missed initially.
Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
Vitaly Bordug [Tue, 30 Jan 2007 23:09:00 +0000 (02:09 +0300)]
[POWERPC] Fix kernel build errors for mpc8272ads and mpc8560ads
Recent update of asm-powerpc/io.h caused cpm-related stuff to break in the
current kernel. Current patch fixes it, as well as other inconsistencies
expressed, that do not permit targets from working properly:
- Updated dts with a chosen node with interrupt controller,
- fixed messed device IDs among CPM2 SoC devices,
- corrected odd header name and fixed type in defines,
- Added 82xx subdir to the powerpc/platforms Makefile, missed during
initial commit,
- new solely-powerpc header file for 8260 family (was using one from
arch/ppc, this one cleaned up from the extra stuff), in fact for now
a placeholder to get the board-specific includes for stuff not yet
capable to live with devicetree peeks only
- Fixed couple of misprints in reference mpc8272 dts.
Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
Vitaly Bordug [Tue, 30 Jan 2007 23:08:54 +0000 (02:08 +0300)]
[POWERPC] cpm2: CPM2 interrupt controller fix
This contains important fixes for the CPM2 PIC code. Eliminated
CPM_IRQ_OFFSET, pulling the respective interrupt numbers from the interrupt
mapping. Updated devicetree files to reflect that. Changed direct
IC-related IO accesses to the IO accessors. Fixed all the sense values to
keep coherency with ipic. In the current code, CPM2 stuff will have no IRQs
and hence could be hardly usable.
Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
Robert P. J. Day [Tue, 30 Jan 2007 11:06:00 +0000 (06:06 -0500)]
[POWERPC] Add "is_power_of_2" checking to log2.h.
Add the inline function "is_power_of_2()" to log2.h, where the value
zero is *not* considered to be a power of two.
Signed-off-by: Robert P. J. Day <rpjday@mindspring.com> Acked-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
Olof Johansson [Mon, 29 Jan 2007 03:23:54 +0000 (21:23 -0600)]
[POWERPC] Add PMC type to cputable
Add cputable entries for which type of PMC implementation the processor
has.
I've only filled in the current 64-bit processors, the unfilled default
value will have same behaviour as before so it can be done over time
as needed.
Also tidy up the dummy_perf implementation a bit, aggregating it into
one function with ifdefs instead of several.
Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
Olof Johansson [Mon, 29 Jan 2007 03:23:14 +0000 (21:23 -0600)]
[POWERPC] Oprofile cleanup
Clean up the ctr_read/write a bit. It's currently defined in the
include but only used in one C file each. The only exception is the
classic version, so keep that in the include and define in the C file
as appropriate.
Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
Timur Tabi [Sat, 27 Jan 2007 23:41:49 +0000 (17:41 -0600)]
[POWERPC] Fix array indexing error in rheap grow()
The grow() function in the rheap library allocates a larger array of blocks,
copies the contents of the old blocks array to the newly allocated array and
fixes the list_head pointers after the copy. At the end, the new blocks must
be enqueued to the empty_list of the rh_info_t structure. This patch fixes
a bug where the code was indexing past the end of the array when enqueueing
blocks. The UCC ethernet driver, which uses the rheap allocator, experiences
kernel panics because of this bug.
Signed-off-by: Ionut Nicu <ionut.nicu@freescale.com> Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
PS3 interrupt core update:
- Add ps3_alloc_irq() and ps3_free_irq(), to allocate a virtual interrupt
number for an interrupt outlet, which is needed by the PS3 GPU frame
buffer device and audio drivers
Geoff Levand [Sat, 27 Jan 2007 03:08:02 +0000 (19:08 -0800)]
[POWERPC] ps3: smp interrupt fixes
PS3 fixups for interrups on SMP.
Fixes the alignment of the interrupt status bitmap, changes the hypervisor
interrupt calls to the '_ext' versions that take an explicit processor
thread ID.
Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
Fix two minor bugs in the PS3 system bus mmio region code. First, on error or
when freeing a region, retain the bus_addr and len fields to allow subsequent
calls to create the region. Second, correct the region address argument to the
lv1_unmap_device_mmio_region() call.
Fixes modprobe/rmmod of some drivers.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Acked-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
Geoff Levand [Sat, 27 Jan 2007 03:07:47 +0000 (19:07 -0800)]
[POWERPC] ps3: repository misc fixes
Various fixes for the PS3 repository code:
- Sync signatures of function prototypes and implementations (enum vs.
unsigned int)
- Correct references to `regions' as `registers':
o Correct enum ps3_region_type as enum ps3_reg_type,
o Correct PS3_REGION_TYPE_* as PS3_REG_TYPE_*,
o Correct ps3_repository_find_region() as ps3_repository_find_reg().
- Correct function name in pr_debug() call
- Minor error condition improvements.
Linas Vepstas [Fri, 26 Jan 2007 20:55:03 +0000 (14:55 -0600)]
[POWERPC] pSeries: EEH improperly enabled for some Power4 systems
It appears that EEH is improperly enabled for some Power4 systems.
On these systems, the ibm,set-eeh-option returns a value of success
even when EEH is not supported on the given node. Thus, an explicit
check for support is required.
During boot, on power4, without this patch, one sees messages
similar to:
EEH: event on unsupported device, rc=0 dn=/pci@400000000110/IBM,sp@1
EEH: event on unsupported device, rc=0 dn=/pci@400000000110/pci@2
EEH: event on unsupported device, rc=0 dn=/pci@400000000110/pci@2,2
etc.
The patch makes these go away.
Without this patch, EEH recovery does seem to work correctly for
at least some devices (I tested ethernet e1000), but fails to
recover others (the Emulex LightPulse LPFC, most notably).
Off the top of my head, I don't remember why some devices are
affected, but not others.
The PAPR indicates that the correct way to test for EEH is as
done in this patch; its not clear to me if this was in the PAPR
all along, or recently added; if it was there all along, its not
clear to me why this hadn't been fixed long ago. I suspect only
certain firmware levels are affected.
Signed-off-by: Linas Vepstas <linas@austin.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
Replace an apparent typo of CONFIG_SERIAL_CPM_SMC with
CONFIG_SERIAL_CPM_SMC2.
Signed-off-by: Robert P. J. Day <rpjday@mindspring.com> Acked-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
Vitaly Bordug [Wed, 24 Jan 2007 19:42:10 +0000 (22:42 +0300)]
[POWERPC] Add mpc866ads board-specific bits to arch/powerpc
This add support of the Freescale mpc86xads reference board to
arch/powerpc. Supported SMC1 and SMC2 (UART and serial console), FEC
100Mbps Ethernet, SCC1 Ethernet (10Mbps hdx)
Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
Vitaly Bordug [Wed, 24 Jan 2007 19:41:42 +0000 (22:41 +0300)]
[POWERPC] 8xx: Add mpc885ads support and common mpc8xx files
This adds the core 8xx stuff and specifically mpc885ads board-specific
bits to arch/powerpc. Respective Kconfig has been cleaned up from the stuff
not yet ported over to avoid confusion. Updated and cleaned version.
Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
Vitaly Bordug [Wed, 24 Jan 2007 19:41:24 +0000 (22:41 +0300)]
[POWERPC] 8xx: powerpc port of core CPM PIC
This covers common CPM access functions, CPM interrupt controller code,
micropatch and a few compatibility things to kee the same driver base
working with arch/ppc. This version is refined with all the comments
(mostly PIC-related) addressed.
Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
Vitaly Bordug [Wed, 24 Jan 2007 19:41:15 +0000 (22:41 +0300)]
[POWERPC] 8xx: platform related changes to the fsl_soc
Added 8xx SoC peripherials: fec for Ethernet and smc for UARTs.
Ordinary routines to extract values from the device tree and insert
respective platform devices
Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
Vitaly Bordug [Wed, 24 Jan 2007 19:41:06 +0000 (22:41 +0300)]
[POWERPC] 8xx: generic 8xx code arch/powerpc port
Including support for non-coherent cache, some mm-related things +
relevant field in Kconfig and Makefiles. Also included rheap.o compilation
if 8xx is defined.
Non-coherent mapping were refined and renamed according to Cristoph
Hellwig. Orphaned functions were cleaned up.
[Also removed arch/ppc/kernel/dma-mapping.c, because otherwise
compiling with ARCH=ppc for a non DMA-cache-coherent platform ends up
with two copies of __dma_alloc_coherent etc.
-- paulus.]
Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
Vitaly Bordug [Wed, 24 Jan 2007 19:40:57 +0000 (22:40 +0300)]
[POWERPC] 8xx: platform specific mmu updates
This is just a straight port of the same done in arch/ppc
by Marcelo Tosatti. One used to be
[PATCH] ppc32 8xx: update_mmu_cache() needs unconditional tlbie,
commit eb07d964b4491d1bb5864cd3d7e7633ccdda9a53
In a nutshell, the board is nearly stuck without this, yet without any
visible failure - being just very slow.
Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
Vitaly Bordug [Wed, 24 Jan 2007 19:40:49 +0000 (22:40 +0300)]
[POWERPC] cpm_uart: OF-related fix for CPM1
This makes cpm uart able to work using OF-passed parameters
in case of CPM stuff (found on most mpc8xx reference and custom
boards). The idea is to keep ppc stuff working yet making it able to be
used for powerpc.
Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
Kim Phillips [Tue, 30 Jan 2007 22:09:13 +0000 (16:09 -0600)]
[POWERPC] 83xx: Add the mpc8323emds.dts
Add the mpc8323emds device tree source (dts)
Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Fri, 26 Jan 2007 07:45:32 +0000 (01:45 -0600)]
[POWERPC] 83xx: Return a point to the struct ipic from ipic_init()
It's useful to have access to struct ipic handle that just got created
in ipic_init().
For example, if we want to setup an external IRQ with out
a device node we need access ipic->irqhost to create the virtual to HW
IRQ mapping and to set the IRQ sense. With this we can mimic the old
sense array concept that existed in arch/ppc.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Fri, 26 Jan 2007 06:37:11 +0000 (00:37 -0600)]
[POWERPC] 83xx: Don't call ioremap in the reset function
It's possibly that we get an reset requestion when interrupts are disabled.
(For example an oops in an interrupt handler). Therefor, we can't call
ioremap in the reset function. Moving the ioremap of the registers we
need access to an arch_initcall helps the problem.
However we still have a window between boot and the arch_initcall in
which the register pointer will not be setup and thus we spin if the reset
function is called. If one needs to ensure even this case is covered, look
at use of the watchdog provided on 83xx to reset the processor.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Fri, 26 Jan 2007 06:23:34 +0000 (00:23 -0600)]
[POWERPC] 83xx: Fix Kconfig to only enable FP math emulation for the MPC832x
Updated MATH_EMULATION depends to be on PPC_MPC832x instead of PPC_83xx. Only
the the MPC832x has no floating point unit in the core. Updated the other
83xx defconfigs that got math emulation turned on incorrectly.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Ishizaki Kou [Fri, 12 Jan 2007 00:58:39 +0000 (09:58 +0900)]
[POWERPC] Add IRQ remapping hook
This patch adds irq remapping hook. On interrupt mechanism on Beat,
when an irq outlet which has an id which is formerly used is created,
remapping the irq is required.
Signed-off-by: Kou Ishizaki <kou.ishizaki@toshiba.co.jp> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
David Woodhouse [Sun, 14 Jan 2007 01:38:18 +0000 (09:38 +0800)]
[POWERPC] Mask 32-bit system call arguments to 32 bits on PPC64 in audit code
The system call entry code will clear the high bits of argument
registers before invoking the system call; don't report whatever noise
happens to be in the high bits of the register before that happens.
Signed-off-by: David Woodhouse <dwmw2@infradead.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
Identify CPC9x5 PCI Express, AGP, and HT host bridges using
device_type and compatible properties, which is a more flexible method
than using the name property (which can differ between firmwares and
models).
Signed-off-by: Nathan Lynch <ntl@pobox.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
Remove redundant argument check for of_node_get().
It's ok to remove 'node' check because in real life cpm2_pic_init()
never gets called with node == NULL.
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl> Signed-off-by: Paul Mackerras <paulus@samba.org>
Michal Ostrowski [Thu, 28 Dec 2006 04:14:43 +0000 (22:14 -0600)]
[POWERPC] Do not write virq back to PCI config space
- Drivers will not rely on the PCI config space value, as they've
already been conditioned to rely on the irq field in "struct pci_dev".
- The virq value may not be < 256 as it has been remapped.
- The PCI config space should reflect the hardware configuration, which
is not being changed. We are only creating a virtual irq mapping that
exists in the kernel only. One would never expect the PCI hardware to
generate the "virq" interrupt.
Signed-off-by: Michal Ostrowski <mostrows@watson.ibm.com> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
One test case ended up SEGV'ing. Upon closer inspection ld.so was loaded
at 0x8000000 (128MB) with the heap right after it. Since we normally
link binaries at 0x10000000 (256MB) we only had about 128MB of space for
the heap:
One way to fix this is move ELF_ET_DYN_BASE from 0x08000000 to 0x20000000.
This allows 128MB for the binary (hopefully enough for even the most
crazy c++ apps), and with our current layout we will grow the heap up
and the stack down, allowing potentially gigabytes of heap:
projects / linux-beck.git / log