Lothar Waßmann [Fri, 9 Mar 2012 08:23:32 +0000 (09:23 +0100)]
- Implement missing get_ticks(), get_timer() and get_tbclk() functions
to fix build error
- Simplify the implementation of __udelay() and fix an OBIWAN error in
the bogus rollover handling
The period of the MX28_HW_DIGCTL_MICROSECONDS counter is 2^32, thus
in the rollover case the correct calculation would be:
incr = 0x100000000 - old;
incr += new;
instead of:
incr = 0xffffffff - old;
incr += new;
But in 32bit arithmetic that is the same as:
incr = 0 - old;
incr += new;
which is in no way different from the else path:
incr += new - old;
Thus the 'if' clause is absolutely useless!
Whoever invented this routine should read up on two's complement
arithmetic!
Subtracting two unsigned integers with a finite number of bits in
two's complement arithmetic will _ALWAYS_ yield the difference
between the two numbers (thus the number of ticks between two timer
reads). There is NO NEED for any fancy rollover checks if one only
deals with differences between timer ticks rather than absolute
tick values!
- Add some debug code to verify the rollover handling
- Remove unused us_to_tick()
Lothar Waßmann [Fri, 9 Mar 2012 08:02:11 +0000 (09:02 +0100)]
- check for CONDIF_SYS_DCACHE_OFF or CONFIG_SYS_ARM_CACHE_WRITETHROUGH
to prevent driver from being used with WB cache and add an
explanatory comment
- invalidate cache for packet buffers in fec_rbd_init()
- move cache flush/invalidate operations closer to the point where
they are actually required
- use correct parameters for cache operations
Lothar Waßmann [Fri, 9 Mar 2012 07:39:39 +0000 (08:39 +0100)]
- fix the range of the cache flush/invalidate operations
- don't reset the BCH if it is already operational during NAND-boot,
since doing this will lead to random read errors on boot
- use CONFIG_SYS_NAND_USE_FLASH_BBT
Lothar Waßmann [Tue, 6 Mar 2012 15:39:31 +0000 (16:39 +0100)]
Don't set up the CPSR for SPL_BUILD
In SPL_BUILD the ROM code will have set up the CPSR correctly and
Booting from USB may require interrupts to be enabled.
Also enhance the comment to reflect the fact, that interrupts will be
disabled when setting up the CPSR.
Remove bits that will be asserted from the clear mask
Lothar Waßmann [Tue, 6 Mar 2012 15:33:06 +0000 (16:33 +0100)]
- fix typo
- change early_delay() to use a rollover safe check even if it is not
strictly necessary. If someone copies the code for other purposes
it's better to be safe.
Lothar Waßmann [Tue, 6 Mar 2012 15:09:20 +0000 (16:09 +0100)]
Misc cleanups:
- remove unused return value from fec_[rt]x_task_(en|dis)able()
- remove useless casts
- change type of variable 'base' in fec_init() to (void *) to
eliminate excessive type casts
- use ALIGN() macro where appropriate
- use calloc() to eliminate need for memset()
Wolfgang Denk [Fri, 17 Feb 2012 22:54:46 +0000 (23:54 +0100)]
Merge branch 'master' of git://git.denx.de/u-boot-mmc
* 'master' of git://git.denx.de/u-boot-mmc:
mmc: make mmc_send_status() more reliable
mmc: fix card busy polling
Tegra: mmc: Fixed handling of interrupts in timeouts.
omap_hsmmc: Wait for CMDI to be clear
Wolfgang Denk [Fri, 17 Feb 2012 22:54:17 +0000 (23:54 +0100)]
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
* 'master' of git://git.denx.de/u-boot-mpc85xx:
powerpc/8xxx:Add MPH controller support in USB device-tree fixup
powerpc/8xxx: Cleanup USB device-tree fixup
Wolfgang Denk [Fri, 17 Feb 2012 22:47:29 +0000 (23:47 +0100)]
Merge branch 'master' of git://git.denx.de/u-boot-x86
* 'master' of git://git.denx.de/u-boot-x86:
x86: Convert board_init_f_r to a processing loop
x86: Split init functions out of board.c
x86: Move relocation code out of board.c
x86: Move setup_pcat_compatibility() out of board.c
x86: Move do_go_exec() out of board.c
CHECKPATCH: arch/x86/lib/*
x86: Tweak IDT and GDT for alignment and readability
x86: Allow cache before copy to RAM
x86: Create weak init_cache() and default enable_caches() functions
x86: Set GD_FLG_RELOC after entering in-RAM copy of U-Boot
x86: Use fs for global data
x86: Rework relocation calculations
x86: Simplify Flash-to-RAM code execution transition
x86: Rework Global Descriptor Table loading
x86: Remove GDR related magic numbers
x86: Speed up copy-to-RAM and clear BSS operations
x86: Import glibc memcpy implementation
Jan Kloetzke [Sun, 5 Feb 2012 22:29:12 +0000 (22:29 +0000)]
mmc: make mmc_send_status() more reliable
Align the card status polling with the Linux kernel and retry the
command at least five times. Also some cards apparently mishandle the
status bits, so make sure to check the card state too.
Signed-off-by: Jan Kloetzke <jan.kloetzke@dspg.com> Cc: Andy Fleming <afleming@gmail.com>
Jan Kloetzke [Sun, 5 Feb 2012 22:29:11 +0000 (22:29 +0000)]
mmc: fix card busy polling
A MMC/SD card may always go into the programming state (and hence be
busy) after a block write. Therefore always check the card state, even
after single block writes. On the other hand there is no need to check
the card status after a read.
Also make sure that errors during busy polling are propagated upwards.
Signed-off-by: Jan Kloetzke <jan.kloetzke@dspg.com> Cc: Andy Fleming <afleming@gmail.com>
Tom Warren [Tue, 7 Feb 2012 06:17:16 +0000 (06:17 +0000)]
Tegra: mmc: Fixed handling of interrupts in timeouts.
We are seeing occasional timeouts in the Tegra mmc code when
we are reading from external MMC cards. These don't seem to be
detrimental if they are handled properly. This CL properly
clears the "normal interrupt status register" (norintsts) in
error conditions. If we don't do this, when we come back into
mmc_send_cmd() the register will still contain status from the
last transaction.
Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
Tom Rini [Mon, 30 Jan 2012 11:22:25 +0000 (11:22 +0000)]
omap_hsmmc: Wait for CMDI to be clear
Before we can send a command we need both the DATI (command inhibit on
mmc_dat line) bit and CMDI (command inhibit on mmc_cmd line) are clear.
The previous behavior of only checking on DATI was insufficient on some
cards and incorrect behavior in any case. This makes the code check
for both bits being clear and makes the error print more clear as
to what happened. DATI_CMDDIS is removed as it was unused elsewhere
in the code and stood for 'DATI is set, cmds are disabled still'.
Fix originally spotted by Peter Bigot.
Tested-by: Peter A. Bigot <bigotp@acm.org> Tested-by: Robert Nelson <robertcnelson@gmail.com> Signed-off-by: Tom Rini <trini@ti.com> Tested-by: Andreas Müller <schnitzeltony@googlemail.com>
ramneek mehresh [Fri, 10 Feb 2012 00:36:43 +0000 (00:36 +0000)]
powerpc/8xxx:Add MPH controller support in USB device-tree fixup
Add support for fixing usb mode and phy type for
MPH(Multi Port Host) USB controllers in device-tree nodes.
Required for socs like P3060, P5020, etc having MPH USB controller
ramneek mehresh [Mon, 6 Feb 2012 19:17:29 +0000 (19:17 +0000)]
powerpc/8xxx: Cleanup USB device-tree fixup
Some code cleanup done for USB device-tree fixup:
- handling error value returned from fdt_fixup_usb_mode_phy_type()
- using ARRAY_SIZE macro
- using snprintf instead of sprintf
Peter Meerwald [Wed, 8 Feb 2012 05:31:52 +0000 (05:31 +0000)]
doc: complete, typos
mention repeatable to README.commands and fix some typos
Signed-off-by: Peter Meerwald <p.meerwald@bct-electronic.com> Acked-by: Mike Frysinger <vapier@gentoo.org> Tested-by: Marek Vasut <marek.vasut@gmail.com>
Wolfgang Denk [Mon, 13 Feb 2012 22:15:25 +0000 (23:15 +0100)]
Merge branch 'sf' of git://git.denx.de/u-boot-blackfin
* 'sf' of git://git.denx.de/u-boot-blackfin:
README: Add description of SPI Flash (SF) command configuration
sf command: allow default bus and chip selects
sf: eeprom_m95xxx: set a sane default timeout
sf: eeprom_m95xxx: fix up style
Wolfgang Denk [Mon, 13 Feb 2012 22:13:22 +0000 (23:13 +0100)]
Merge branch 'master' of git://git.denx.de/u-boot-blackfin
* 'master' of git://git.denx.de/u-boot-blackfin:
Blackfin: pata_bfin: fix printf warning
Blackfin: bfin_nand: mark local func static
linkage.h: move from blackfin to common includes
Blackfin: br4: new board port
Blackfin: add in/out le32 variants
post: add blackfin to the post_time_ms list
Blackfin: bf537-stamp: drop board reset workaround
Blackfin: pr1: new board port
Eric Nelson [Tue, 31 Jan 2012 17:52:08 +0000 (10:52 -0700)]
README: Add description of SPI Flash (SF) command configuration
Acked-by: Jason Liu <jason.hui@linaro.org> Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Eric Nelson [Tue, 31 Jan 2012 17:52:07 +0000 (10:52 -0700)]
sf command: allow default bus and chip selects
This patch allows a board configuration file to provide default bus
and chip-selects for SPI flash so that first argument to the 'sf' command
is optional.
On boards that use the mxc_spi driver and a GPIO for chip select, this allows
a much simpler command line:
U-Boot> sf probe
instead of
U-Boot> sf probe 0x5300
Tested-by: Jason Liu <jason.hui@linaro.org> Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Macpaul Lin [Thu, 1 Dec 2011 04:32:10 +0000 (12:32 +0800)]
linkage.h: move from blackfin to common includes
1. Add linkage.h support from blackfin to common include,
which is a reduced version from Linux.
2. Add architecture part support of linkage.h into blackfin
3. Fix include path of in blackfin related to linkage.h
due to header file movement.
Signed-off-by: Macpaul Lin <macpaul@andestech.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Sat, 19 Nov 2011 20:38:06 +0000 (15:38 -0500)]
Blackfin: bf537-stamp: drop board reset workaround
The bf537-stamp shouldn't need this SPI flash workaround. It was added
by accident a long time ago through a convoluted series of steps which
originated from a customer board (not the bf537-stamp). So drop it to
keep people from incorrectly adding it to their own boards.
arm, davinci: Add support for the Calimain board from OMICRON electronics
This patch adds support for the Calimain board from
OMICRON electronics GmbH. The board features a Texas Instruments AM1808
SoC, 128 MB DDR2 memory, and 64 MB NOR flash memory connected to CS2 and
CS3.
Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
Sughosh Ganu [Thu, 2 Feb 2012 00:44:41 +0000 (00:44 +0000)]
Changes to move hawkboard to the new spl infrastructure
This patch moves hawkboard to the new spl infrastructure from the
older nand_spl one.
Removed the hawkboard_nand_config build option -- The spl code now
gets compiled with hawkboard_config, after building the main u-boot
image, using the CONFIG_SPL_TEXT_BASE. Modified the README.hawkboard
to reflect the same.
Signed-off-by: Sughosh Ganu <urwithsughosh@gmail.com> Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Christian Riesch <christian.riesch@omicron.at> Cc: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Cc: Tom Rini <trini@ti.com> Acked-by: Christian Riesch <christian.riesch@omicron.at>
The V bit of the c1 register of CP15 should not be cleared on DA850
SoCs since they have no valid memory at 0x00000000. This patch
introduces a configuration option CONFIG_SYS_EXCEPTION_VECTORS_HIGH
that allows setting the correct value for the V bit.
Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Reported-by: Sughosh Ganu <urwithsughosh@gmail.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Sughosh Ganu <urwithsughosh@gmail.com> Cc: Heiko Schocher <hs@denx.de>
Sughosh Ganu [Thu, 2 Feb 2012 00:44:38 +0000 (00:44 +0000)]
arm, arm926ejs: Flush the data cache before disabling it
The current implementation invalidates the data cache before turning it
off and causes problems on the hawkboard. See the discussion in
http://lists.denx.de/pipermail/u-boot/2012-January/115212.html
According to the ARM926EJ-S Technical Reference Manual, the cache should
be flushed instead.
Also fix the comments to match code.
Signed-off-by: Sughosh Ganu <urwithsughosh@gmail.com>
Rebased and corrected commit message.
Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Acked-by: Heiko Schocher <hs@denx.de> Tested-by: Heiko Schocher <hs@denx.de>
arm, arm926ejs: Do cpu critical inits only for boards that require it
This patch reverts commit ca4b55800ed74207c35271bf7335a092d4955416
"arm, arm926ejs: always do cpu critical inits" since it impacts all
arm926ejs based configurations and caused problems, e.g., with
the hawkboard.
Instead the patch removes the CONFIG_SKIP_LOWLEVEL_INIT defines
from the board configurations that need low level initialization.
Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Heiko Schocher <hs@denx.de> Acked-by: Heiko Schocher <hs@denx.de> Tested-by: Heiko Schocher <hs@denx.de>
arm, davinci: Add lowlevel_init for SoCs other than DM644X
The low level initialization code in
arch/arm/cpu/arm926ejs/davinci/lowlevel_init.S was written for
DM644X SoCs only. This patch makes the lowlevel_init function in this
file a dummy function for SoCs other than DM644X.
Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Tom Rini <trini@ti.com> Cc: Sergey Kubushyn <ksi@koi8.net> Acked-by: Heiko Schocher <hs@denx.de> Tested-by: Heiko Schocher <hs@denx.de>
Peter Barada [Tue, 7 Feb 2012 11:02:40 +0000 (11:02 +0000)]
ARMV7: Fix duplicate use of "b" parameter in ACTIM_CTRLA definition
ACTIM_CTRLA macro errently passes "b" parameter to ACTIM_CTRLA_TRAS()
instead of "c". To make usage more clear, replace all single-letter
macro parameters with more descriptive parameter names.
Signed-off-by: Peter Barada <peter.barada@logicpd.com>
Aneesh V [Mon, 6 Feb 2012 05:07:43 +0000 (05:07 +0000)]
OMAP4460: Reduce MPU clock speed from 920 to 700
We do not have thermal management or Smartreflex
enabled at U-Boot level. So, it's better to stick
to OPP100 for MPU instead of the OPP Turbo that is
used now. Adjust the VDD_MPU accordingly.
Tested-by: Sebastien Jan <s-jan@ti.com> Signed-off-by: Aneesh V <aneesh@ti.com>
add support for printing various clock frequency info found
in SOC such as ARM core frequency, DSP core frequency and DDR
frequency as part of bdinfo command.
Signed-off-by: Manjunath Hadli <manjunath.hadli@ti.com> Cc: Tom Rini <trini@ti.com>
remove the macro CONFIG_DISPLAY_CPUINFO as it is no longer
required. This is because clock info will be printed as part
'bdinfo' command and also remove support print_cpuinfo() as it will
no longer be called.
Signed-off-by: Manjunath Hadli <manjunath.hadli@ti.com> Cc: Tom Rini <trini@ti.com>
Govindraj.R [Mon, 6 Feb 2012 03:55:36 +0000 (03:55 +0000)]
OMAP4: clock-common: Move the usb dppl configuration to new func
usb dpll configuration is done only part of non-essential
dppl configuration however if CONFIG_USB_EHCI_OMAP is defined
we may have to configure usb dpll's for proper functioning
of usb modules. So move the usb dppl configuration to a new func.
and utilise the same during essential dpll configuration.
Govindraj.R [Mon, 6 Feb 2012 03:55:35 +0000 (03:55 +0000)]
OMAP3+: Clock: Adding ehci clock enabling
Adding ehci clock enabling mechanism part of clock framework.
When essential clocks are enabled during init phase usb host
clocks can also be enabled from clock framework.
Govindraj.R [Mon, 6 Feb 2012 03:55:34 +0000 (03:55 +0000)]
ehci-omap: Clean up added ehci-omap.c
Clean up added ehci-omap.c and make it generic for re-use across
omap-soc having same ehci ip block. Also pass the modes to be configured
from board file and configure the ports accordingly. All usb layers
are not cache aligned, till then keep cache off for usb ops as ehci will use
internally dma for all usb ops.
* Add a generic common header ehci-omap.h having common ip block
data and reg shifts.
* Rename and modify ehci-omap3 to ehci.h retain only conflicting
sysc reg shifts remove others and move to common header file.
* pass the board data for beagle/panda accordinly to use
ehci ports.
Acked-by: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
Govindraj.R [Mon, 6 Feb 2012 03:55:32 +0000 (03:55 +0000)]
usb: ulpi: Add omap-ulpi-view port support
Based on discussion from this thread [1].
Adding omap-view port that helps us in using the generic ulpi
framework for any ulpi phy ops using the INSNREG05_ULPI viewport
reg available on omap platform.
Currently ehci ports are available on omap3/4 platforms so enable the same
for beagle and panda, patch is tested on the same boards.
Thanks to Igor Grinberg <grinberg@compulab.co.il> for reviewing the
omap-ehci patches and suggesting this approach.
Chander Kashyap [Sun, 5 Feb 2012 23:01:45 +0000 (23:01 +0000)]
Exynos: Clock.c: Use CONFIG_SYS_CLK_FREQ macro
CONFIG_SYS_CLK_FREQ_C210 macro giving notion of S5PC2XX (Exynos4)
architecture. Replace CONFIG_SYS_CLK_FREQ_C210 with CONFIG_SYS_CLK_FREQ
to make it generic for exynos architecture.
Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Minkyu Kang [Wed, 18 Jan 2012 06:56:47 +0000 (15:56 +0900)]
TRATS: use the generic watchdog timer
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Cc: HeungJun, Kim <riverful.kim@samsung.com>
Minkyu Kang [Wed, 18 Jan 2012 06:55:05 +0000 (15:55 +0900)]
S5P: support generic watchdog timer
This patch adds support the generic watchdog timer for s5pc1xx and exynos4
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Cc: HeungJun, Kim <riverful.kim@samsung.com>
HeungJun, Kim [Mon, 16 Jan 2012 21:13:05 +0000 (21:13 +0000)]
ARMV7: Exynos4: Add support for TRATS board
This patch adds support for Samsung TRATS board
Signed-off-by: HeungJun, Kim <riverful.kim@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
HeungJun, Kim [Mon, 16 Jan 2012 21:13:04 +0000 (21:13 +0000)]
ARMV7: Exynos4: Add supoort power for Exynos4
This patch adds power.h and SAMSUNG_BASE() macro for using Exynos4 power.
Signed-off-by: HeungJun, Kim <riverful.kim@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
HeungJun, Kim [Mon, 16 Jan 2012 21:13:03 +0000 (21:13 +0000)]
ARMV7: Exynos4: Add watchdog.h for Exynos4
This patch add watchdog.h for Exynos4
Signed-off-by: HeungJun, Kim <riverful.kim@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Chander Kashyap [Sun, 18 Dec 2011 22:56:44 +0000 (22:56 +0000)]
Exynos: Fix ARM Clock frequency calculation
Earliar ARM clock frequency was calculated by:
MOUTAPLL/(DIVAPLL + 1) which is actually returning SCLKAPLL.
It is fixed by calculating it as follows:
ARMCLK=MOUTCORE / (DIVCORE + 1) / (DIVCORE2 + 1)
Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Holger Brunck [Wed, 14 Dec 2011 05:31:19 +0000 (05:31 +0000)]
arm/km: speed up i2c access for keymile boards
We don't need 3us delay for our i2c bus. Decrease it to 1us.
It would also be possible to use 100ns in the future, but
currently kirkwood has no ndelay implementation.
bugfix: all Marvell specific build fails due to undefined reference to `get_ticks'
after http://patchwork.ozlabs.org/patch/136415/ was applied. All Marvell
build fails with below error
common/libcommon.o: In function `cread_line':
/home/uboot/src/u-boot-arm/common/main.c:717: undefined reference to `get_ticks'
/home/uboot/src/u-boot-arm/common/main.c:717: undefined reference to `get_tbclk'
/home/uboot/src/u-boot-arm/common/main.c:720: undefined reference to `get_ticks'
The same is fixed for Kirkwood, ARMADA100, pantheon and orion5x SoCs