Sage Weil [Tue, 9 Aug 2011 22:05:07 +0000 (15:05 -0700)]
libceph: warn on msg allocation failures
Any non-masked msg allocation failure should generate a warning and stack
trace to the console. All of these need to eventually be replaced by
safe preallocation or msgpools.
Sage Weil [Tue, 9 Aug 2011 22:03:46 +0000 (15:03 -0700)]
libceph: don't complain on msgpool alloc failures
The pool allocation failures are masked by the pool; there is no need to
spam the console about them. (That's the whole point of having the pool
in the first place.)
Mark msg allocations whose failure is safely handled as such.
Sage Weil [Thu, 4 Aug 2011 15:21:30 +0000 (08:21 -0700)]
ceph: implement (optional) max read size
The 'rsize' mount option limits the maximum size of an individual
read(ahead) operation that is sent off to an OSD. This is distinct from
'rasize', which controls the size of the readahead window.
Sage Weil [Wed, 3 Aug 2011 16:58:09 +0000 (09:58 -0700)]
ceph: make readpages fully async
When we get a ->readpages() aop, submit async reads for all page ranges
in the provided page list. Lock the pages immediately, so that VFS/MM
will block until the reads complete.
Sage Weil [Tue, 9 Aug 2011 21:48:11 +0000 (14:48 -0700)]
libceph: fix msgpool
There were several problems here:
1- we weren't tagging allocations with the pool, so they were never
returned to the pool.
2- msgpool_put didn't add back to the mempool, even it were called.
3- msgpool_release didn't clear the pool pointer, so it would have looped
had #1 not been broken.
These may or may not have been responsible for #1136 or #1381 (BUG due to
non-empty mempool on umount). I can't seem to trigger the crash now using
the method I was using before.
Bob Copeland [Sun, 7 Aug 2011 23:36:07 +0000 (19:36 -0400)]
ath5k: fix error handling in ath5k_beacon_send
This cleans up error handling for the beacon in case of dma mapping
failure. We need to free the skb when dma mapping fails instead of
nulling and leaking the pointer, and we should bail out to avoid
giving the hardware the bad descriptor.
Finally, we need to perform the null check after trying to update
the beacon, or else beacons will never be sent after a single
mapping failure.
Cc: stable@kernel.org Signed-off-by: Bob Copeland <me@bobcopeland.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This patch add a device id for the wifi usb keys shiped by DVICO with
some of their tvix hardware.
Signed-off-by: Anthony Bourguignon <contact+kernel@toniob.net> Acked-by: Ivo van Doorn <IvDoorn@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Ivo van Doorn [Wed, 3 Aug 2011 19:09:49 +0000 (21:09 +0200)]
rt2x00: Add new rt73 buffalo USB id
Reported-by: Maik-Holger Freudenberg <hhfeuer@gmx.de> Signed-off-by: Ivo van Doorn <IvDoorn@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
ath9k_hw: Fix incorrect Tx control power in AR9003 template
CTL power data incorrect in ctlPowerData_2G field of ar9300_eeprom.
Setting incorrect CTL power in calibration is causing lower tx power.
Tx power was reported as 3dBm while operating in channel 6 HT40+/
in channel 11 HT40- due to CTL powers in the calibration is set to
zero.
Cc: stable@kernel.org Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Steve French [Tue, 9 Aug 2011 18:44:44 +0000 (18:44 +0000)]
[CIFS] Cleanup use of CONFIG_CIFS_STATS2 ifdef to make transport routines more readable
Christoph had requested that the stats related code (in
CONFIG_CIFS_STATS2) be moved into helpers to make code flow more
readable. This patch should help. For example the following
section from transport.c
Reviewed-by: Jeff Layton <jlayton@redhat.com> CC: Christoph Hellwig <hch@infradead.org> Signed-off-by: Steve French <sfrench@us.ibm.com> Reviewed-by: Pavel Shilovsky <piastry@etersoft.ru>
Julia Lawall [Tue, 9 Aug 2011 15:10:56 +0000 (11:10 -0400)]
hwmon: (ibmaem) add missing kfree
rs_resp is dynamically allocated in aem_read_sensor(), so it should be freed
before exiting in every case. This collects the kfree and the return at
the end of the function.
Linus Torvalds [Tue, 9 Aug 2011 15:42:16 +0000 (08:42 -0700)]
Merge branch 'slab/urgent' of git://git.kernel.org/pub/scm/linux/kernel/git/penberg/slab-2.6
* 'slab/urgent' of git://git.kernel.org/pub/scm/linux/kernel/git/penberg/slab-2.6:
slub: fix check_bytes() for slub debugging
slub: Fix full list corruption if debugging is on
Linus Torvalds [Tue, 9 Aug 2011 15:41:36 +0000 (08:41 -0700)]
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound-2.6
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound-2.6:
sound: pss - don't use the deprecated function check_region
ALSA: timer - Add NULL-check for invalid slave timer
ALSA: timer - Fix Oops at closing slave timer
ASoC: Acknowledge WM8996 interrupts before acting on them
ASoC: Rename WM8915 to WM8996
ALSA: Fix dependency of CONFIG_SND_TEA575X
ALSA: asihpi - use kzalloc()
ALSA: snd-usb-caiaq: Fix keymap for RigKontrol3
ALSA: snd-usb: Fix uninitialized variable usage
ALSA: hda - Fix a complile warning in patch_via.c
ALSA: hdspm - Fix uninitialized compile warnings
ALSA: usb-audio - add quirk for Keith McMillen StringPort
ALSA: snd-usb: operate on given mixer interface only
ALSA: snd-usb: avoid dividing by zero on invalid input
ALSA: snd-usb: Accept UAC2 FORMAT_TYPE descriptors with bLength > 6
sound: oss/pas2: Remove CLOCK_TICK_RATE dependency from PAS16 driver
ALSA: hda - Use auto-parser for ASUS UX50, Eee PC P901, S101 and P1005
ALSA: hda - Fix digital-mic mono recording on ASUS Eee PC
ASoC: sgtl5000: fix cache handling
ASoC: Disable wm_hubs periodic DC servo update
Will Deacon [Mon, 31 Jan 2011 13:50:46 +0000 (13:50 +0000)]
ARM: LPAE: mark memory banks with start > ULONG_MAX as highmem
Memory banks living outside of the 32-bit physical address
space do not have a 1:1 pa <-> va mapping and therefore the
__va macro may wrap.
This patch ensures that such banks are marked as highmem so
that the Kernel doesn't try to split them up when it sees that
the wrapped virtual address overlaps the vmalloc space.
Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Catalin Marinas [Mon, 31 Jan 2011 13:50:44 +0000 (13:50 +0000)]
ARM: LPAE: Add identity mapping support for the 3-level page table format
With LPAE, the pgd is a separate page table with entries pointing to the
pmd. The identity_mapping_add() function needs to ensure that the pgd is
populated before populating the pmd level. The do..while blocks now loop
over the pmd in order to have the same implementation for the two page
table formats. The pmd_addr_end() definition has been removed and the
generic one used instead. The pmd clean-up is done in the pgd_free()
function.
Catalin Marinas [Mon, 31 Jan 2011 13:50:44 +0000 (13:50 +0000)]
ARM: LPAE: Add context switching support
With LPAE, TTBRx registers are 64-bit. The ASID is stored in TTBR0
rather than a separate Context ID register. This patch makes the
necessary changes to handle context switching on LPAE.
Catalin Marinas [Mon, 31 Jan 2011 13:50:43 +0000 (13:50 +0000)]
ARM: LPAE: Add fault handling support
The DFSR and IFSR register format is different when LPAE is enabled. In
addition, DFSR and IFSR have the similar definitions for the fault type.
This modifies modifies the fault code to correctly handle the new
format.
Catalin Marinas [Tue, 10 May 2011 16:48:36 +0000 (17:48 +0100)]
ARM: LPAE: Invalidate the TLB before freeing the PMD
Similar to the PTE freeing, this patch introduced __pmd_free_tlb() which
invalidates the TLB before freeing a PMD page. This is needed because on
newer processors the entry in the upper page table may be cached by the
TLB and point to random data after the PMD has been freed.
Catalin Marinas [Mon, 31 Jan 2011 13:50:43 +0000 (13:50 +0000)]
ARM: LPAE: MMU setup for the 3-level page table format
This patch adds the MMU initialisation for the LPAE page table format.
The swapper_pg_dir size with LPAE is 5 rather than 4 pages. A new
proc-v7lpae.S file contains the initialisation, context switch and
save/restore code for ARMv7 with the LPAE. The TTBRx split is based on
the PAGE_OFFSET with TTBR1 used for the kernel mappings. The 36-bit
mappings (supersections) and a few other memory types in mmu.c are
conditionally compiled.
Catalin Marinas [Mon, 31 Jan 2011 13:50:42 +0000 (13:50 +0000)]
ARM: LPAE: Page table maintenance for the 3-level format
This patch modifies the pgd/pmd/pte manipulation functions to support
the 3-level page table format. Since there is no need for an 'ext'
argument to cpu_set_pte_ext(), this patch conditionally defines a
different prototype for this function when CONFIG_ARM_LPAE.
The patch also introduces the L_PGD_SWAPPER flag to mark pgd entries
pointing to pmd tables pre-allocated in the swapper_pg_dir and avoid
trying to free them at run-time. This flag is 0 with the classic page
table format.
Catalin Marinas [Mon, 31 Jan 2011 13:50:41 +0000 (13:50 +0000)]
ARM: LPAE: Introduce the 3-level page table format definitions
This patch introduces the pgtable-3level*.h files with definitions
specific to the LPAE page table format (3 levels of page tables).
Each table is 4KB and has 512 64-bit entries. An entry can point to a
40-bit physical address. The young, write and exec software bits share
the corresponding hardware bits (negated). Other software bits use spare
bits in the PTE.
The patch also changes some variable types from unsigned long or int to
pteval_t or pgprot_t.
Catalin Marinas [Mon, 31 Jan 2011 13:50:41 +0000 (13:50 +0000)]
ARM: LPAE: Use a mask for physical addresses in page table entries
With LPAE, the physical address mask is 40-bit while the page table
entry is 64-bit. This patch introduces PHYS_MASK for the 2-level page
table format, defined as ~0UL.
Catalin Marinas [Mon, 31 Jan 2011 13:50:40 +0000 (13:50 +0000)]
ARM: LPAE: Add (pte|pmd)val_t type definitions as u32
This patch defines the (pte|pmd)val_t as u32 and changes the page table
types to be based on these. The PMD bits are converted to the
corresponding type using the _AT macro.
The flush_pmd_entry/clean_pmd_entry argument was changed to (void *) to
allow them to be used with both PGD and PMD pointers and avoid code
duplication.
Catalin Marinas [Mon, 31 Jan 2011 13:50:39 +0000 (13:50 +0000)]
ARM: LPAE: Use PMD_(SHIFT|SIZE|MASK) instead of PGDIR_*
PGDIR_SHIFT and PMD_SHIFT for the classic 2-level page table format have
the same value (21). This patch converts the PGDIR_* uses in the kernel
to the PMD_* equivalent so that LPAE builds can reuse the same code.
Akinobu Mita [Sun, 7 Aug 2011 09:30:38 +0000 (18:30 +0900)]
slub: fix check_bytes() for slub debugging
The check_bytes() function is used by slub debugging. It returns a pointer
to the first unmatching byte for a character in the given memory area.
If the character for matching byte is greater than 0x80, check_bytes()
doesn't work. Becuase 64-bit pattern is generated as below.
value64 = value | value << 8 | value << 16 | value << 24;
value64 = value64 | value64 << 32;
The integer promotions are performed and sign-extended as the type of value
is u8. The upper 32 bits of value64 is 0xffffffff in the first line, and
the second line has no effect.
This fixes the 64-bit pattern generation.
Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Cc: Christoph Lameter <cl@linux-foundation.org> Cc: Matt Mackall <mpm@selenic.com> Reviewed-by: Marcin Slusarz <marcin.slusarz@gmail.com> Acked-by: Eric Dumazet <eric.dumazet@gmail.com> Signed-off-by: Pekka Enberg <penberg@kernel.org>
When a slab is freed by __slab_free() and the slab can only contain a
single object ever then it was full (and therefore not on the partial
lists but on the full list in the debug case) before we reached
slab_empty.
This caused the following full list corruption when SLUB debugging was enabled:
[ Full discussion here: https://lkml.org/lkml/2011/8/4/375 ]
Make sure that we remove such a slab also from the full lists.
Reported-and-tested-by: Dave Jones <davej@redhat.com> Reported-and-tested-by: Xiaotian Feng <xtfeng@gmail.com> Signed-off-by: Christoph Lameter <cl@linux.com> Signed-off-by: Pekka Enberg <penberg@kernel.org>
Will Deacon [Thu, 7 Apr 2011 15:29:22 +0000 (16:29 +0100)]
ARM: LPAE: add ISBs around MMU enabling code
Before we enable the MMU, we must ensure that the TTBR registers contain
sane values. After the MMU has been enabled, we jump to the *virtual*
address of the following function, so we also need to ensure that the
SCTLR write has taken effect.
This patch adds ISB instructions around the SCTLR write to ensure the
visibility of the above.
Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Russell King [Sun, 21 Nov 2010 16:37:42 +0000 (16:37 +0000)]
ARM: pgtable: switch to use pgtable-nopud.h
Nick Piggin noted upon introducing 4level-fixup.h:
| Add a temporary "fallback" header so architectures can run with
| the 4level pagetables patch without modification. All architectures
| should be converted to use the folding headers (include/asm-generic/
| pgtable-nop?d.h) as soon as possible, and the fallback header removed.
This makes ARM compliant with this statement.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Dave Martin [Thu, 28 Jul 2011 13:29:40 +0000 (14:29 +0100)]
ARM: 7008/1: alignment: Make SIGBUS sent to userspace POSIXly correct
With the UM_SIGNAL alignment fault mode, no siginfo structure is
passed to userspace.
POSIX specifies how siginfo_t should be populated for alignment
faults, so this patch does just that:
* si_signo = SIGBUS
* si_code = BUS_ADRALN
* si_addr = misaligned data address at which access was attempted
Signed-off-by: Dave Martin <dave.martin@linaro.org> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Acked-by: Kirill A. Shutemov <kirill@shutemov.name> Reviewed-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Dave Martin [Thu, 28 Jul 2011 13:28:52 +0000 (14:28 +0100)]
ARM: 7007/1: alignment: Prevent ignoring of faults with ARMv6 unaligned access model
Currently, it's possible to set the kernel to ignore alignment
faults when changing the alignment fault handling mode at runtime
via /proc/sys/alignment, even though this is undesirable on ARMv6
and above, where it can result in infinite spins where an un-fixed-
up instruction repeatedly faults.
In addition, the kernel clobbers any alignment mode specified on
the command-line if running on ARMv6 or above.
This patch factors out the necessary safety check into a couple of
new helper functions, and checks and modifies the fault handling
mode as appropriate on boot and on writes to /proc/cpu/alignment.
Prior to ARMv6, the behaviour is unchanged.
For ARMv6 and above, the behaviour changes as follows:
* Attempting to ignore faults on ARMv6 results in the mode being
forced to UM_FIXUP instead. A warning is printed if this
happened as a result of a write to /proc/cpu/alignment. The
user's UM_WARN bit (if present) is still honoured.
* An alignment= argument from the kernel command-line is now
honoured, except that the kernel will modify the specified mode
as described above. This is allows modes such as UM_SIGNAL and
UM_WARN to be active immediately from boot, which is useful for
debugging purposes.
Signed-off-by: Dave Martin <dave.martin@linaro.org> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Jamie Iles [Thu, 4 Aug 2011 08:39:31 +0000 (09:39 +0100)]
ARM: 7010/1: mm: fix invalid loop for poison_init_mem
poison_init_mem() used a loop of:
while ((count = count - 4))
which has 2 problems - an off by one error so that we do one less word
than we should, and the other is that if count == 0 then we loop forever
and poison too much. On a platform with HAVE_TCM=y but nothing in the
TCM's, this caused corruption and the platform failed to boot.
Acked-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Jamie Iles <jamie@jamieiles.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Brian S. Julin [Sun, 24 Jul 2011 15:53:50 +0000 (16:53 +0100)]
ARM: 7005/1: freshen up mm/proc-arm946.S
The file mm/proc-arm946.S contains a typo and is missing a structure
member in __arm946_proc_info. The former prevents compilation
and the latter causes problems during boot. It is likely this
file was manually copied from a similar file and not tested, then
later updates to the *_proc_info structures missed this file.
This patch will apply (with offset) with or without the
recent macro unification work that has been done in this directory.
This was verified against linux-next/stable last week.
See arm-linux-kernel thread:
http://lists.arm.linux.org.uk/lurker/message/20110718.103237.0106d468.en.html
Signed-off-by: Brian S. Julin <bri@abrij.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Russell King [Sat, 6 Aug 2011 08:34:26 +0000 (09:34 +0100)]
dmaengine: PL08x: Fix trivial build error
Something changed during the 3.1 merge window in the include files
which now causes the pl08x DMA engine driver to fail to build. Fix
this by adding the now necessary dma-mapping.h include:
drivers/dma/amba-pl08x.c: In function ■pl08x_unmap_buffers■:
drivers/dma/amba-pl08x.c:1524: error: implicit declaration of function ■dma_unmap_single■
drivers/dma/amba-pl08x.c:1527: error: implicit declaration of function ■dma_unmap_page■
Acked-by: Vinod Koul <vinod.koul@intel.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Input: bcm5974 - add support for touchpads found in MacBookAir4,2
Added USB device IDs for MacBookAir4,2 trackpad. Device constants were
copied from the MacBookAir3,2 constants. The 4,2 device specification is
reportedly unchanged from the 3,2 predecessor and seems to work well.
Signed-off-by: Joshua V Dillon <jvdillon@gmail.com> Signed-off-by: Chase Douglas <chase.douglas@canonical.com> Signed-off-by: Dmitry Torokhov <dtor@mail.ru>
Peter Turczak [Tue, 9 Aug 2011 04:11:19 +0000 (14:11 +1000)]
m68knommu: fix problems with SPI/GPIO on ColdFire 520x
The problem has its root in the calculation of the set-port offsets (macro
MCFGPIO_SETR() in arch/m68k/include/asm/gpio.h), this assumes that all ports
have the same offset from the base port address (MCFGPIO_SETR) which is
defined in mcf520xsim.h as an alias of MCFGIO_PSETR_BUSCTL. Because the BUSCTL
and BE port do not have a set-register (see MCF5208 Reference Manual Page
13-10, Table 13-3) the offset calculations went wrong.
Because the BE and BUSCTL port do not seem useful in these parts, as they
lack a set register, I removed them and adapted the gpio chip bases which
are also used for the offset-calculations. Now both setting and resetting
the chip selects works as expected from userland and from the kernelspace.
Signed-off-by: Peter Turczak <peter@turczak.de> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Greg Ungerer [Fri, 5 Aug 2011 04:41:29 +0000 (14:41 +1000)]
m68k: fix memcpy to unmatched/unaligned source and dest on 68000
The original 68000 processors cannot copy 16bit or larger quantities from
odd addresses. All newer members of the 68k family (including ColdFire)
can do this.
In the current memcpy implementation after trying to align the destination
address to a 16bit boundary if we end up with an odd source address we go
off and try to copy multi-byte quantities from it. This will trap on the
68000.
The only solution if we end with an odd source address is to byte wise
copy the whole memcpy region. We only need to do this if we are supporting
original 68000 processors.
projects / karo-tx-linux.git / log