Daniel Vetter [Thu, 17 Nov 2016 13:46:39 +0000 (14:46 +0100)]
Merge tag 'gvt-next-2016-11-17' of https://github.com/01org/gvt-linux into drm-intel-next-queued
From Zhenyu Wang:
gvt-next-2016-11-17
- Fix lock order issue found in guest stress test
- Fix several MMIO handlers to correct behavior
- Fix crash for vgpu execlist reset and memleak
- Fix a possible conflict for unresolved vfio mdev dependency
- other misc fixes
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Tvrtko Ursulin [Thu, 17 Nov 2016 09:02:43 +0000 (09:02 +0000)]
drm/i915: Fix gen9 forcewake range table
Commit 0dd356bb6ff5 ("drm/i915: Eliminate Gen9 special case")
accidentaly dropped a MMIO range between 0xc000 to 0xcfff out
of the blitter forcewake domain. Fix it.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Fixes: 0dd356bb6ff5 ("drm/i915: Eliminate Gen9 special case") Reported-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Link: http://patchwork.freedesktop.org/patch/msgid/1479373363-16528-1-git-send-email-tvrtko.ursulin@linux.intel.com
drm/i915: set DIDL using the ACPI video output device _ADR method return.
which went out of its way to cater to a specific BIOS, setting up DIDL
based on _ADR method. Perhaps that approach worked on that specific
machine, but on the machines I checked the _ADR method invents the
device identifiers out of thin air if DIDL has not been set. The source
for _ADR is also supposed to be the DIDL set by the driver, not the
other way around.
With this, we'll also limit the number of outputs to what the driver
actually has.
A side effect of this change is that the DIDL, and by proxy CADL, will
be initialized in the order of the connector list. That, in turn, has
internal panels in front, ensuring they're included in the DIDL and CADL
lists. Hopefully this ensures the BIOS does not block backlight hotkey
events, thinking the internal panel is off.
v2: do not set ACPI_DEVICE_ID_SCHEME in the device id (Peter Wu)
v3: Rebase
Cc: Peter Wu <peter@lekensteyn.nl> Cc: Rainer Koenig <Rainer.Koenig@ts.fujitsu.com> Cc: Jan-Marek Glogowski <glogow@fbihome.de> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Marcos Paulo de Souza <marcos.souza.org@gmail.com> Cc: Paolo Stivanin <paolostivanin@fastmail.fm> Tested-by: Rainer Koenig <Rainer.Koenig@ts.fujitsu.com> Tested-by: Paolo Stivanin <paolostivanin@fastmail.fm> Tested-by: Marcos Paulo de Souza <marcos.souza.org@gmail.com> Reviewed-and-tested-by: Peter Wu <peter@lekensteyn.nl> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/9660d29cf310c17bbf4d58c0e09d5b047446e2d5.1479295490.git.jani.nikula@intel.com
Min He [Wed, 16 Nov 2016 14:05:04 +0000 (22:05 +0800)]
drm/i915: fix the dequeue logic for single_port_submission context
For a single_port_submission context, GVT expects that it can only be
submitted to port 0, and there shouldn't be any other context in port 1
at the same time. This is required by GVT-g context to have an opportunity
to save/restore some non-hw context render registers.
This patch is to workaround GVT-g.
v2: optimized code by following Chris's advice, and added more comments to
explain the patch.
v3: followed the coding style.
Instead of partially depending on vfio pin/unpin pages interface if
mdev is available, which would result in failure if vfio is not
on. But replace with a wrapper which need to be fixed till mdev
support got fully merged.
Cc: Jike Song <jike.song@intel.com> Cc: Xiaoguang Chen <xiaoguang.chen@intel.com> Reviewed-by: Xiaoguang Chen <Xiaoguang.chen@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Dave Airlie [Wed, 16 Nov 2016 22:02:46 +0000 (08:02 +1000)]
Merge tag 'drm-misc-next-2016-11-16' of git://anongit.freedesktop.org/git/drm-misc into drm-next
Another pile of misc:
- Explicit fencing for atomic! Big thanks to Gustavo, Sean, Rob 3x, Brian
and anyone else I've forgotten to make this happen.
- roll out fbdev helper ops to drivers (Stefan Christ)
- last bits of drm_crtc split-up&kerneldoc
- some drm_irq.c crtc functions cleanup
- prepare_fb helper for cma, works correctly with explicit fencing (Marek
Vasut)
- misc small patches all over
* tag 'drm-misc-next-2016-11-16' of git://anongit.freedesktop.org/git/drm-misc: (51 commits)
drm/fence: add out-fences support
drm/fence: add fence timeline to drm_crtc
drm/fence: add in-fences support
drm/bridge: analogix_dp: return error if transfer none byte
drm: drm_irq.h header cleanup
drm/irq: Unexport drm_vblank_on/off
drm/irq: Unexport drm_vblank_count
drm/irq: Make drm_vblank_pre/post_modeset internal
drm/nouveau: Use drm_crtc_vblank_off/on
drm/amdgpu: Use drm_crtc_vblank_on/off for dce6
drm/color: document NULL values and default settings better
drm: Drop externs from drm_crtc.h
drm: Move tile group code into drm_connector.c
drm: Extract drm_mode_config.[hc]
Revert "drm: Add aspect ratio parsing in DRM layer"
Revert "drm: Add and handle new aspect ratios in DRM layer"
drm/print: Move kerneldoc next to definition
drm: Consolidate dumb buffer docs
drm: Clean up kerneldoc for struct drm_driver
drm: Extract drm_drv.h
...
Jonas Pfeil [Mon, 7 Nov 2016 23:18:39 +0000 (00:18 +0100)]
drm/vc4: Add fragment shader threading support
FS threading brings performance improvements of 0-20% in glmark2.
The validation code checks for thread switch signals and ensures that
the registers of the other thread are not touched, and that our clamps
are not live across thread switches. It also checks that the
threading and branching instructions do not interfere.
(Original patch by Jonas, changes by anholt for style cleanup,
removing validation the kernel doesn't need to do, and adding the flag
for userspace).
v2: Minor style fixes from checkpatch.
Signed-off-by: Jonas Pfeil <pfeiljonas@gmx.de> Signed-off-by: Eric Anholt <eric@anholt.net>
Chris Wilson [Wed, 16 Nov 2016 15:27:21 +0000 (15:27 +0000)]
drm/i915/execlists: Use a local lock for dfs_link access
Avoid requiring struct_mutex for exclusive access to the temporary
dfs_link inside the i915_dependency as not all callers may want to touch
struct_mutex. So rather than force them to take a highly contended
lock, introduce a local lock for the execlists schedule operation.
Reported-by: David Weinehall <david.weinehall@linux.intel.com> Fixes: 9a151987d709 ("drm/i915: Add execution priority boosting for mmioflips") Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: David Weinehall <david.weinehall@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20161116152721.11053-1-chris@chris-wilson.co.uk Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Gustavo Padovan [Wed, 16 Nov 2016 13:00:21 +0000 (22:00 +0900)]
drm/fence: add out-fences support
Support DRM out-fences by creating a sync_file with a fence for each CRTC
that sets the OUT_FENCE_PTR property.
We use the out_fence pointer received in the OUT_FENCE_PTR prop to send
the sync_file fd back to userspace.
The sync_file and fd are allocated/created before commit, but the
fd_install operation only happens after we know that commit succeed.
v2: Comment by Rob Clark:
- Squash commit that adds DRM_MODE_ATOMIC_OUT_FENCE flag here.
Comment by Daniel Vetter:
- Add clean up code for out_fences
v3: Comments by Daniel Vetter:
- create DRM_MODE_ATOMIC_EVENT_MASK
- userspace should fill out_fences_ptr with the crtc_ids for which
it wants fences back.
v4: Create OUT_FENCE_PTR properties and remove old approach.
v5: Comments by Brian Starkey:
- Remove extra fence_get() in atomic_ioctl()
- Check ret before iterating on the crtc_state
- check ret before fd_install
- set fence_state to NULL at the beginning
- check fence_state->out_fence_ptr before put_user()
- change order of fput() and put_unused_fd() on failure
- Add access_ok() check to the out_fence_ptr received
- Rebase after fence -> dma_fence rename
- Store out_fence_ptr in the drm_atomic_state
- Split crtc_setup_out_fence()
- return -1 as out_fence with TEST_ONLY flag
v6: Comments by Daniel Vetter
- Add prepare/unprepare_crtc_signaling()
- move struct drm_out_fence_state to drm_atomic.c
- mark get_crtc_fence() as static
Comments by Brian Starkey
- proper set fence_ptr fence_state array
- isolate fence_idx increment
- improve error handling
v7: Comments by Daniel Vetter
- remove prefix from internal functions
- make out_fence_ptr an s64 pointer
- degrade DRM_INFO to DRM_DEBUG_ATOMIC when put_user fail
- fix doc issues
- filter out OUT_FENCE_PTR == NULL and do not fail in this case
- add complete_crtc_signalling()
- krealloc fence_state on demand
Comment by Brian Starkey
- remove unused crtc_state arg from get_out_fence()
v8: Comment by Brian Starkey
- cancel events before check for !fence_state
- convert a few lefovers u64 types for out_fence_ptr
- fix memleak by assign fence_state earlier after realloc
- proper accout num_fences in case of error
v9: Comment by Brian Starkey
- memset last position of fence_state after krealloc
Comments by Sean Paul
- pass install_fds in complete_crtc_signaling() instead of ret
- put_user(-1, fence_ptr) when decoding props
v10: Comment by Brian Starkey
- remove unneeded num_fences increment on error path
- kfree fence_state after installing fences fd
v11: rebase against latest drm-misc
v12: rebase again against latest drm-misc
Signed-off-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk> Reviewed-by: Brian Starkey <brian.starkey@arm.com> (v10) Reviewed-by: Sean Paul <seanpaul@chromium.org> Tested-by: Robert Foss <robert.foss@collabora.com> (v10)
[danvet: Appease checkpatch.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/1479301221-13056-1-git-send-email-gustavo@padovan.org
Gustavo Padovan [Tue, 15 Nov 2016 14:37:08 +0000 (23:37 +0900)]
drm/fence: add fence timeline to drm_crtc
Create one timeline context for each CRTC to be able to handle out-fences
and signal them. It adds a few members to struct drm_crtc: fence_context,
where we store the context we get from fence_context_alloc(), the
fence seqno and the fence lock, that we pass in fence_init() to be
used by the fence.
v2: Comment by Daniel Stone:
- add BUG_ON() to fence_to_crtc() macro
v3: Comment by Ville Syrjälä
- Use more meaningful name as crtc timeline name
v4: Comments by Brian Starkey
- Use even more meaninful name for the crtc timeline
- add doc for timeline_name
Comment by Daniel Vetter
- use in-line style for comments
- rebase after fence -> dma_fence rename
v5: Comment by Daniel Vetter
- Add doc for drm_crtc_fence_ops
v6: Comment by Chris Wilson
- Move fence_to_crtc to drm_crtc.c
- Move export of drm_crtc_fence_ops to drm_crtc_internal.h
Praveen Paneri [Tue, 15 Nov 2016 17:19:20 +0000 (22:49 +0530)]
drm/i915/bxt: Broxton decoupled MMIO
Decoupled MMIO is an alternative way to access forcewake domain
registers, which requires less cycles for a single read/write and
avoids frequent software forcewake.
This certainly gives advantage over the forcewake as this new
mechanism “decouples” CPU cycles and allow them to complete even
when GT is in a CPD (frequency change) or C6 state.
This can co-exist with forcewake and we will continue to use forcewake
as appropriate. E.g. 64-bit register writes to avoid writing 2 dwords
separately and land into funny situations.
v2:
- Moved platform check out of the function and got rid of duplicate
functions to find out decoupled power domain (Chris)
- Added a check for forcewake already held and skipped decoupled
access (Chris)
- Skipped writing 64 bit registers through decoupled MMIO (Chris)
v3:
- Improved commit message with more info on decoupled mmio (Tvrtko)
- Changed decoupled operation to enum and used u32 instead of
uint_32 data type for register offset (Tvrtko)
- Moved HAS_DECOUPLED_MMIO to device info (Tvrtko)
- Added lookup table for converting fw_engine to pd_engine (Tvrtko)
- Improved __gen9_decoupled_read and __gen9_decoupled_write
routines (Tvrtko)
v4:
- Fixed alignment and variable names (Chris)
- Write GEN9_DECOUPLED_REG0_DW1 register in just one go (Zhe Wang)
v5:
- Changed HAS_DECOUPLED_MMIO() argument name to dev_priv (Tvrtko)
- Sanitize info->had_decoupled_mmio at init (Chris)
Gustavo Padovan [Tue, 15 Nov 2016 13:06:39 +0000 (22:06 +0900)]
drm/fence: add in-fences support
There is now a new property called IN_FENCE_FD attached to every plane
state that receives sync_file fds from userspace via the atomic commit
IOCTL.
The fd is then translated to a fence (that may be a fence_array
subclass or just a normal fence) and then used by DRM to fence_wait() for
all fences in the sync_file to signal. So it only commits when all
framebuffers are ready to scanout.
v2: Comments by Daniel Vetter:
- remove set state->fence = NULL in destroy phase
- accept fence -1 as valid and just return 0
- do not call fence_get() - sync_file_fences_get() already calls it
- fence_put() if state->fence is already set, in case userspace
set the property more than once.
v3: WARN_ON if fence is set but state has no FB
v4: Comment from Maarten Lankhorst
- allow set fence with no related fb
v5: rename FENCE_FD to IN_FENCE_FD
v6: Comments by Daniel Vetter:
- rename plane_state->in_fence back to "fence"
- re-introduce WARN_ON if fence set but no fb
- rebase after fence -> dma_fence rename
v7: Comments by Brian Starkey
- set state->fence to NULL when duplicating the state
- fail if IN_FENCE_FD was already set
v8: rebase against latest drm-misc
Signed-off-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk> Reviewed-by: Brian Starkey <brian.starkey@arm.com> Reviewed-by: Sean Paul <seanpaul@chromium.org> Tested-by: Robert Foss <robert.foss@collabora.com>
[danvet: Rebase onto extracted drm_mode_config.[hc].] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Jianqun Xu [Wed, 16 Nov 2016 00:13:39 +0000 (08:13 +0800)]
drm/bridge: analogix_dp: return error if transfer none byte
Reference from drm_dp_aux description (about transfer):
Upon success, the implementation should return the number of payload bytes
that were transferred, or a negative error-code on failure. Helpers
propagate errors from the .transfer() function, with the exception of
the -EBUSY error, which causes a transaction to be retried. On a short,
helpers will return -EPROTO to make it simpler to check for failure.
The analogix_dp_transfer will return num_transferred, but if there is none
byte been transferred, the return value will be 0, which means success, we
should return error-code if transfer none byte.
for (retry = 0; retry < 32; retry++) {
err = aux->transfer(aux, &msg);
if (err < 0) {
if (err == -EBUSY)
continue;
Pei Zhang [Wed, 16 Nov 2016 11:05:50 +0000 (19:05 +0800)]
drm/i915/gvt: check workload empty before real scan
This patch will fix warning log print during command scan caused by
empty workload (ring head equals tail). This patch avoid going into
real scan process if workload is empty. It's guest's responsibility
to make sure if an empty workload is proper to submit to HW.
[v2] modify the patch description. It's a fix, not a w/a.
Signed-off-by: Pei Zhang <pei.zhang@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Dave Airlie [Tue, 15 Nov 2016 23:39:55 +0000 (09:39 +1000)]
Merge tag 'sunxi-drm-for-4.10' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into drm-next
sun4i-drm changes for 4.10
Support for the Allwinner A31 SoC display engine using the sun4i-drm
driver.
* tag 'sunxi-drm-for-4.10' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
drm/sun4i: Add a few formats
drm/sun4i: Add compatible strings for A31/A31s display pipelines
drm/sun4i: Add compatible string for A31/A31s TCON (timing controller)
drm/sun4i: tcon: Move SoC specific quirks to a DT matched data structure
drm/sun4i: sun6i-drc: Support DRC on A31 and A31s
Daniel Vetter [Mon, 14 Nov 2016 09:02:53 +0000 (10:02 +0100)]
drm/irq: Unexport drm_vblank_count
No one outside of drm_irq.c should ever need this. The correct way to
implement get_vblank_count for hw lacking a vblank counter is
drm_vblank_no_hw_counter. Fix this up in mtk, which is the only
offender left over.
Daniel Vetter [Mon, 14 Nov 2016 09:02:52 +0000 (10:02 +0100)]
drm/irq: Make drm_vblank_pre/post_modeset internal
Now that all drivers are switched over to drm_crtc_vblank_on/off we
can relegate pre/post_modeset to the purely drm_irq.c internal role of
supporting old ums userspace.
As usual switch to the drm_legacy_ prefix to make it clear this is
for old drivers only.
v2: Rebase on top of Thierry's s/int crtc/unsigned int pipe/ changes.
Cc: Ben Skeggs <bskeggs@redhat.com> Cc: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Daniel Vetter [Tue, 15 Nov 2016 21:58:19 +0000 (22:58 +0100)]
drm/nouveau: Use drm_crtc_vblank_off/on
With atomic nv50+ is already converted over to them, but the old
display code is still using it. Found in a 2 year old patch I have
lying around to un-export these old helpers!
v2: Drop the hand-rolled versions from resume/suspend code. Now that
crtc callbacks do this, we don't need a special case for s/r anymore.
v3: Remove unused variables.
v4: Don't remove drm_crtc_vblank_off from suspend paths, non-atomic
nouveau still needs that. But still switch to drm_crtc_vblank_off
since drm_vblank_off will disappear.
Daniel Vetter [Mon, 14 Nov 2016 09:02:50 +0000 (10:02 +0100)]
drm/amdgpu: Use drm_crtc_vblank_on/off for dce6
This old code pattern was reintroduced in
Author: Ken Wang <Qingqing.Wang@amd.com>
Date: Tue Jan 19 14:03:24 2016 +0800
drm/amdgpu: add display controller implementation for si v10
Realign it with later display code. Tsk, tsk for massive copypasting
;-)
Cc: Christian König <christian.koenig@amd.com> Cc: Ken Wang <Qingqing.Wang@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> for the whole series. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20161114090255.31595-1-daniel.vetter@ffwll.ch
Adding new mode flags willy nilly breaks existing userspace. We need to
coordinate this better, potentially with a new client cap that only
exposes the aspect ratio flags when userspace is prepared for them
(similar to what we do with stereo 3D modes).
This also broke things so that we would always send out VIC==0 in
the AVI infoframe unless the user specified an aspect ratio via
the mode flags. And the automagic RGB full vs. limited range
handling was similartly broken as the user mode would never match
any CEA mode.
Cc: Shashank Sharma <shashank.sharma@intel.com> Cc: Lin, Jia <lin.a.jia@intel.com> Cc: Akashdeep Sharma <akashdeep.sharma@intel.com> Cc: Jim Bride <jim.bride@linux.intel.com> Cc: Jose Abreu <Jose.Abreu@synopsys.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Emil Velikov <emil.l.velikov@gmail.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/1478176304-6743-2-git-send-email-ville.syrjala@linux.intel.com
Adding new mode flags willy nilly breaks existing userspace. We need to
coordinate this better, potentially with a new client cap that only
exposes the aspect ratio flags when userspace is prepared for them
(similar to what we do with stereo 3D modes).
Cc: Shashank Sharma <shashank.sharma@intel.com> Cc: Lin, Jia <lin.a.jia@intel.com> Cc: Akashdeep Sharma <akashdeep.sharma@intel.com> Cc: Jim Bride <jim.bride@linux.intel.com> Cc: Jose Abreu <Jose.Abreu@synopsys.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Emil Velikov <emil.l.velikov@gmail.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/1478176304-6743-1-git-send-email-ville.syrjala@linux.intel.com
dev_priv->hw_ddb is only used by skl_update_crtcs, but the ddb
allocation for each pipe is calculated in crtc_state.
We can rid of the global member by looking at crtc_state.
Do this by saving all active old ddb allocations from the old crtc_state
in an array, and then point them to the new allocation every time we update
a crtc.
This will allow us to keep track of the intermediate ddb allocations,
which is what hw_ddb was previously used for. With hw_ddb gone all
SKL-style watermark values are properly maintained only in crtc_state.
Daniel Vetter [Mon, 14 Nov 2016 11:58:19 +0000 (12:58 +0100)]
drm: Extract drm_drv.h
I want to move dumb buffer documentation into the right vfuncs, and
for that I first need to be able to pull that into kerneldoc without
having to clean up all of drmP.h. Also, header-splitting is nice.
While at it shuffle all the function declarations for drm_drv.c into
the right spots, and drop the kerneldoc for drm_minor_acquire/release
since it's only used internally.
v2: Keep all existing copyright notices (Chris).
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Daniel Vetter [Mon, 14 Nov 2016 11:58:18 +0000 (12:58 +0100)]
doc/dma-buf: Fix up include directives
Would be great if everony could add
$ make DOCBOOKS="" htmldocs
to their build scripts to catch these. 0day should also report them,
not sure why it failed to spot this.
Fixes: f54d1867005c ("dma-buf: Rename struct fence to dma_fence") Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Gustavo Padovan <gustavo.padovan@collabora.co.uk> Cc: Sumit Semwal <sumit.semwal@linaro.org> Cc: Christian König <christian.koenig@amd.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20161114115825.22050-4-daniel.vetter@ffwll.ch
Daniel Vetter [Mon, 14 Nov 2016 11:58:17 +0000 (12:58 +0100)]
drm/i915: Fixup kerneldoc includes
Would be great if everony could add
$ make DOCBOOKS="" htmldocs
to their build scripts to catch these. 0day should also report them,
not sure why it failed to spot this.
Fixes: b42fe9ca0a1e ("drm/i915: Split out i915_vma.c") Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20161114115825.22050-3-daniel.vetter@ffwll.ch
Add missing forward declaration for struct drm_plane and drm_plane_state,
which causes the following warning in the VC4 driver (can be replicated
by building using bcm2835_defconfig):
In file included from drivers/gpu/drm/vc4/vc4_drv.c:18:0:
include/drm/drm_fb_cma_helper.h:45:13: warning: ‘struct drm_plane_state’ declared inside parameter list will not be visible outside of this definition or declaration
struct drm_plane_state *state);
^~~~~~~~~~~~~~~
include/drm/drm_fb_cma_helper.h:44:34: warning: ‘struct drm_plane’ declared inside parameter list will not be visible outside of this definition or declaration
int drm_fb_cma_prepare_fb(struct drm_plane *plane,
drm/i915/gen9+: Preserve old allocation from crtc_state.
This is the last bit required for making nonblocking modesets work
correctly. The state in intel_crtc->hw_ddb is updated in the
nonblocking part of a nonblocking commit.
This means that even attempting a commit before a nonblocking modeset
completes will fail, because intel_crtc->hw_ddb still has stale values.
The stale values are 0 if the crtc is being enabled resulting in a
failure during atomic check, but it may also result in double use of
ddb allocations.
Fix this by explicitly copying the ddb allocation from the old state.
This has to be done explicitly, because a modeset that doesn't change
active pipes, or a modeset converted to a fastset will will clear the
current state.
drm/i915/gen9+: Program watermarks as a separate step during evasion, v3.
The watermark updates for SKL style watermarks are no longer done
in the plane callbacks, but are now called in a separate watermark
update function that's called during the same vblank evasion,
before the plane updates.
This also gets rid of the global skl_results, which was required for
keeping track of the current atomic commit.
Changes since v1:
- Move line unwrap to correct patch. (Lyude)
- Make sure we don't regress ILK watermarks. (Matt)
- Rephrase commit message. (Matt)
Changes since v2:
- Fix disable watermark check to use the correct way to determine single
step watermark support.
drm/i915: Add an atomic evasion step to watermark programming, v4.
Allow the driver to write watermarks during atomic evasion.
This will make it possible to write the watermarks in a cleaner
way on gen9+.
intel_atomic_state is not used here yet, but will be used when
we program all watermarks as a separate step during evasion.
This also writes linetime all the time, while before it was only
done during plane updates. This looks like this could be a bugfix,
but I'm not sure what it affects.
Changes since v1:
- Add comment about atomic evasion to commit message.
- Unwrap I915_WRITE call. (Lyude)
Changes since v2:
- Rename atomic_evade_watermarks to atomic_update_watermarks. (Ville)
- Add line wraps where appropriate, fix grammar in commit message. (Matt)
Changes since v3:
- Actually fix commit message. (Matt)
- Line wrap calls to watermark update functions. (Matt)
Chris Wilson [Tue, 15 Nov 2016 09:22:49 +0000 (09:22 +0000)]
drm/i915: Add execution priority boosting for mmioflips
Commit 6b5e90f58c56 ("drm/i915/scheduler: Boost priorities for flips")
added priority boosting for the modern atomic pageflips (and modesets),
but we should do the same for existing users of mmioflips (we don't yet
need to consider csflips as they are not used by execlists and so do not
have any support for a scheduler).
Really the only reason for crtc_ww_class not being internal to
drm_modeset_lock.c is that drm_modeset_lock_init() was static-inline
(for no particularly good reason).
Fix that, and move crtc_ww_class into drm_modeset_lock.c.
This is fixed by using the kref_get_unless_zero() as a full memory
barrier to validate the fence is still the current exclusive fence before
returning it back to the caller. (Note the fix only requires using
dma_fence_get_rcu() and correct handling, but we may as well use the
helper rather than inline equivalent code.)
Note: Issue can only be hit with the i915 driver.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Sumit Semwal <sumit.semwal@linaro.org Fixes: d07f0e59b2c7 ("drm/i915: Move GEM activity tracking into a common struct reservation_object") Reviewed-by: Christian König <christian.koenig@amd.com>. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/20161114115540.31155-1-chris@chris-wilson.co.uk
Koji Matsuoka [Mon, 16 May 2016 02:28:15 +0000 (11:28 +0900)]
drm: rcar-du: Fix H/V sync signal polarity configuration
The VSL and HSL bits in the DSMR register set the corresponding
horizontal and vertical sync signal polarity to active high. The code
got it the wrong way around, fix it.
Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
There is a bug in the setting of the DES (Display Enable Signal)
register. This current setting occurs 1 dot left shift. The DES
register should be set minus one value about the specifying value
with H/W specification. This patch corrects it.
Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Laurent Pinchart [Sat, 22 Oct 2016 16:05:53 +0000 (19:05 +0300)]
drm: rcar-du: Fix dot clock routing configuration
Dot clock routing is setup through different registers depending on the
DU generation. The code has been designed for Gen2 and hasn't been
updated since. This works thanks to good reset default value, but isn't
very safe. Fix it.
Laurent Pinchart [Tue, 18 Oct 2016 21:51:35 +0000 (00:51 +0300)]
drm: rcar-du: Simplify and fix probe error handling
It isn't safe to call drm_dev_unregister() without first initializing
mode setting with drm_mode_config_init(). This leads to a crash if
either IO memory can't be remapped or vblank initialization fails.
Fix this by reordering the initialization sequence. Move vblank
initialization after the drm_mode_config_init() call, and move IO
remapping before drm_dev_alloc() to avoid the need to perform clean up
in case of failure.
While at it remove the explicit drm_vblank_cleanup() call from
rcar_du_remove() as the drm_dev_unregister() function already cleans up
vblank.
Chris Wilson [Mon, 14 Nov 2016 20:41:05 +0000 (20:41 +0000)]
drm/i915/scheduler: Boost priorities for flips
Boost the priority of any rendering required to show the next pageflip
as we want to avoid missing the vblank by being delayed by invisible
workload. We prioritise avoiding jank and jitter in the GUI over
starving background tasks.
v2: Descend dma_fence_array when boosting priorities.
Chris Wilson [Mon, 14 Nov 2016 20:41:04 +0000 (20:41 +0000)]
drm/i915: Store the execution priority on the context
In order to support userspace defining different levels of importance to
different contexts, and in particular the preferred order of execution,
store a priority value on each context. By default, the kernel's
context, which is used for idling and other background tasks, is given
minimum priority (i.e. all user contexts will execute before the kernel).
Chris Wilson [Mon, 14 Nov 2016 20:41:03 +0000 (20:41 +0000)]
drm/i915/scheduler: Execute requests in order of priorities
Track the priority of each request and use it to determine the order in
which we submit requests to the hardware via execlists.
The priority of the request is determined by the user (eventually via
the context) but may be overridden at any time by the driver. When we set
the priority of the request, we bump the priority of all of its
dependencies to match - so that a high priority drawing operation is not
stuck behind a background task.
When the request is ready to execute (i.e. we have signaled the submit
fence following completion of all its dependencies, including third
party fences), we put the request into a priority sorted rbtree to be
submitted to the hardware. If the request is higher priority than all
pending requests, it will be submitted on the next context-switch
interrupt as soon as the hardware has completed the current request. We
do not currently preempt any current execution to immediately run a very
high priority request, at least not yet.
One more limitation, is that this is first implementation is for
execlists only so currently limited to gen8/gen9.
v2: Replace recursive priority inheritance bumping with an iterative
depth-first search list.
v3: list_next_entry() for walking lists
v4: Explain how the dfs solves the recursion problem with PI.
Chris Wilson [Mon, 14 Nov 2016 20:41:02 +0000 (20:41 +0000)]
drm/i915/scheduler: Record all dependencies upon request construction
The scheduler needs to know the dependencies of each request for the
lifetime of the request, as it may choose to reschedule the requests at
any time and must ensure the dependency tree is not broken. This is in
additional to using the fence to only allow execution after all
dependencies have been completed.
One option was to extend the fence to support the bidirectional
dependency tracking required by the scheduler. However the mismatch in
lifetimes between the submit fence and the request essentially meant
that we had to build a completely separate struct (and we could not
simply reuse the existing waitqueue in the fence for one half of the
dependency tracking). The extra dependency tracking simply did not mesh
well with the fence, and keeping it separate both keeps the fence
implementation simpler and allows us to extend the dependency tracking
into a priority tree (whilst maintaining support for reordering the
tree).
To avoid the additional allocations and list manipulations, the use of
the priotree is disabled when there are no schedulers to use it.
v2: Create a dedicated slab for i915_dependency.
Rename the lists.
Chris Wilson [Mon, 14 Nov 2016 20:40:59 +0000 (20:40 +0000)]
drm/i915: Defer transfer onto execution timeline to actual hw submission
Defer the transfer from the client's timeline onto the execution
timeline from the point of readiness to the point of actual submission.
For example, in execlists, a request is finally submitted to hardware
when the hardware is ready, and only put onto the hardware queue when
the request is ready. By deferring the transfer, we ensure that the
timeline is maintained in retirement order if we decide to queue the
requests onto the hardware in a different order than fifo.
v2: Rebased onto distinct global/user timeline lock classes.
v3: Play with the position of the spin_lock().
v4: Nesting finally resolved with distinct sw_fence lock classes.
Chris Wilson [Mon, 14 Nov 2016 20:40:58 +0000 (20:40 +0000)]
drm/i915: Split request submit/execute phase into two
In order to support deferred scheduling, we need to differentiate
between when the request is ready to run (i.e. the submit fence is
signaled) and when the request is actually run (a new execute fence).
This is typically split between the request itself wanting to wait upon
others (for which we use the submit fence) and the CPU wanting to wait
upon the request, for which we use the execute fence to be sure the
hardware is ready to signal completion.
Chris Wilson [Mon, 14 Nov 2016 20:40:57 +0000 (20:40 +0000)]
drm/i915: Create distinct lockclasses for execution vs user timelines
In order to simplify the lockdep annotation, as they become more complex
in the future with deferred execution and multiple paths through the
same functions, create a separate lockclass for the user timeline and
the hardware execution timeline.
We should only ever be locking the user timeline and the execution
timeline in parallel so we only need to create two lock classes, rather
than a separate class for every timeline.
v2: Rename the lock classes to be more consistent with other lockdep.
Chris Wilson [Mon, 14 Nov 2016 20:40:56 +0000 (20:40 +0000)]
drm/i915: Give each sw_fence its own lockclass
Localise the static struct lock_class_key to the caller of
i915_sw_fence_init() so that we create a lock_class instance for each
unique sw_fence rather than all sw_fences sharing the same
lock_class. This eliminate some lockdep false positive when using fences
from within fence callbacks.
For the relatively small number of fences currently in use [2], this adds
160 bytes of unused text/code when lockdep is disabled. This seems
quite high, but fully reducing it via ifdeffery is also quite ugly.
Removing the #fence strings saves 72 bytes with just a single #ifdef.
Ville Syrjälä [Tue, 8 Nov 2016 14:47:11 +0000 (16:47 +0200)]
drm/i915: Remove some duplicated plane swapping logic
On pre-gen4 we connect plane A to pipe B and vice versa to get an FBC
capable plane feeding the LVDS port by default. We have the logic for
the plane swapping duplicated in many places. Let's remove a bit of the
duplication by having the crtc look up the thing from the primary plane.
Ville Syrjälä [Mon, 14 Nov 2016 17:44:07 +0000 (19:44 +0200)]
drm/i915: Simplify DP port limited color range bit platform checks
Instead of checking for everything not supporting the limited color
range bit in the DP port register, let's check for the one thing
that does have it (g4x).
Ville Syrjälä [Mon, 14 Nov 2016 16:53:59 +0000 (18:53 +0200)]
drm/i915: Clean up rotation DSPCNTR/DVSCNTR/etc. setup
Move the plane control register rotation setup away from the
coordinate munging code. This will result in neater looking
code once we add reflection support for CHV.
Ville Syrjälä [Mon, 14 Nov 2016 16:53:58 +0000 (18:53 +0200)]
drm/i915: Use & instead if == to check for rotations
Using == to check for 180 degree rotation only works as long as the
reflection bits aren't set. That will change soon enough for CHV, so
let's stop doing things the wrong way.
Paulo Zanoni [Fri, 11 Nov 2016 16:57:41 +0000 (14:57 -0200)]
drm/i915/fbc: convert intel_fbc.c to use INTEL_GEN()
Because it's shorter, easier to read, newer and cooler. And I don't
think anybody else has pending FBC patches right now, so the conflicts
should be minimal.
Paulo Zanoni [Fri, 11 Nov 2016 16:57:38 +0000 (14:57 -0200)]
drm/i915/fbc: inline intel_fbc_can_choose()
It only has two checks now, so it makes sense to just move the code to
the caller.
Also take this opportunity to make no_fbc_reason make more sense: now
we'll only list "no suitable CRTC for FBC" instead of maybe giving a
reason why the last CRTC we checked was not selected, and we'll more
consistently set the reason (e.g., if no primary planes are visible).
Paulo Zanoni [Fri, 11 Nov 2016 16:57:37 +0000 (14:57 -0200)]
drm/i915/fbc: extract intel_fbc_can_enable()
Extract that part of the code to a new function and call this function
only once during intel_fbc_choose_crtc() instead of once per plane.
Those checks are independent from planes/CRTCs.
Paulo Zanoni [Fri, 11 Nov 2016 16:57:35 +0000 (14:57 -0200)]
drm/i915/fbc: move the intel_fbc_can_choose() call out of the loop
We can just call it earlier, so do it. The goal of the loop is to get
the plane's CRTC state, and we don't need it in order to call
intel_fbc_can_choose().
Chris Wilson [Thu, 3 Nov 2016 20:08:52 +0000 (20:08 +0000)]
drm/i915: Fix test on inputs for vma_compare()
When supplying a view to vma_compare() it is required that the supplied
i915_address_space is the global GTT. I tested the VMA instead (which is
the current position in the rbtree and maybe from any address space).
(This reapplies commit a44342acde30 ("drm/i915: Fix test on inputs for
vma_compare()") as it was lost in the vma split)
Reported-by: Matthew Auld <matthew.auld@intel.com> Tested-by: Matthew Auld <matthew.auld@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98579 Fixes: db6c2b4151f2 ("drm/i915: Store the vma in an rbtree...") Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: Matthew Auld <matthew.auld@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20161103200852.23431-1-chris@chris-wilson.co.uk Reviewed-by: Matthew Auld <matthew.auld@intel.com> Reported-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Fixes: b42fe9ca0a1e ("drm/i915: Split out i915_vma.c") Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Paulo Zanoni [Tue, 8 Nov 2016 20:22:11 +0000 (18:22 -0200)]
drm/i915/gen9: fix the WM memory bandwidth WA for Y tiling cases
The previous spec version said "double Ytile planes minimum lines",
and I interpreted this as referring to what the spec calls "Y tile
minimum", but in fact it was referring to what the spec calls "Minimum
Scanlines for Y tile". I noticed that Mahesh Kumar had a different
interpretation, so I sent and email to the spec authors and got
clarification on the correct meaning. Also, BSpec was updated and
should be clear now.
Ville Syrjälä [Fri, 11 Nov 2016 17:14:24 +0000 (19:14 +0200)]
drm/i915: Assume non-DP++ port if dvo_port is HDMI and there's no AUX ch specified in the VBT
My heuristic for detecting type 1 DVI DP++ adaptors based on the VBT
port information apparently didn't survive the reality of buggy VBTs.
In this particular case we have a machine with a natice HDMI port, but
the VBT tells us it's a DP++ port based on its capabilities.
The dvo_port information in VBT does claim that we're dealing with a
HDMI port though, but we have other machines which do the same even
when they actually have DP++ ports. So that piece of information alone
isn't sufficient to tell the two apart.
After staring at a bunch of VBTs from various machines, I have to
conclude that the only other semi-reliable clue we can use is the
presence of the AUX channel in the VBT. On this particular machine
AUX channel is specified as zero, whereas on some of the other machines
which listed the DP++ port as HDMI have a non-zero AUX channel.
I've also seen VBTs which have dvo_port a DP but have a zero AUX
channel. I believe those we need to treat as DP ports, so we'll limit
the AUX channel check to just the cases where dvo_port is HDMI.
If we encounter any more serious failures with this heuristic I think
we'll have to have to throw it out entirely. But that could mean that
there is a risk of type 1 DVI dongle users getting greeted by a
black screen, so I'd rather not go there unless absolutely necessary.
v2: Remove the duplicate PORT_A check (Daniel)
Fix some typos in the commit message
Cc: Daniel Otero <daniel.otero@outlook.com> Cc: stable@vger.kernel.org Tested-by: Daniel Otero <daniel.otero@outlook.com> Fixes: d61992565bd3 ("drm/i915: Determine DP++ type 1 DVI adaptor presence based on VBT")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97994 Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1478884464-14251-1-git-send-email-ville.syrjala@linux.intel.com Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Jani Nikula [Mon, 31 Oct 2016 10:18:28 +0000 (12:18 +0200)]
drm/i915: rename preliminary_hw_support to alpha_support
The term "preliminary hardware support" has always caused confusion both
among users and developers. It has always been about preliminary driver
support for new hardware, and not so much about preliminary hardware. Of
course, initially both the software and hardware are in early stages,
but the distinction becomes more clear when the user picks up production
hardware and an older kernel to go with it, with just the early support
we had for the hardware at the time the kernel was released. The user
has to specifically enable the alpha quality *driver* support for the
hardware in that specific kernel version.
Rename preliminary_hw_support to alpha_support to emphasize that the
module parameter, config option, and flag are about software, not about
hardware. Improve the language in help texts and debug logging as well.
This appears to be a good time to do the change, as there are currently
no platforms with preliminary^W alpha support.
Add new drm_fb_cma_prepare_fb() helper function extracted from the
imx-drm driver. This function checks if the plane has DMABUF attached
to it, extracts the exclusive fence from it and attaches it to the
plane state for the atomic helper to wait on it.
Du, Changbin [Fri, 11 Nov 2016 02:31:37 +0000 (10:31 +0800)]
drm/i915/gvt: fix mem leakage in setup_vgpu_mmio for vgpu reset
Gvt gdrst handler handle_device_reset() invoke function
setup_vgpu_mmio() to reset mmio status. In this case,
the virtual mmio memory has been allocated already. The
new allocation just cause old mmio memory leakage.
Signed-off-by: Du, Changbin <changbin.du@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Du, Changbin [Fri, 11 Nov 2016 08:33:06 +0000 (16:33 +0800)]
drm/i915/gvt: fix crash in vgpu_reset_execlist
We initiate vgpu->workload_q_head via for_each_engine
macro which may skip unavailable engines. So we should
follow this rule anywhere. The function
intel_vgpu_reset_execlist is not aware of this. Kernel
crash when touch a uninitiated vgpu->workload_q_head[x].
Let's fix it by using for_each_engine_masked and skip
unavailable engine ID. Meanwhile rename ring_bitmap to
general name engine_mask.
Pei Zhang [Mon, 14 Nov 2016 10:02:57 +0000 (18:02 +0800)]
drm/i915/gvt: fix deadlock in workload_thread
It's a classical abba type deadlock when using 2 mutex objects, which
are gvt.lock(a) and drm.struct_mutex(b). Deadlock happens in threads:
1. intel_gvt_create/destroy_vgpu: P(a)->P(b)
2. workload_thread: P(b)->P(a)
Fix solution is align the lock acquire sequence in both threads. This
patch choose to adjust the sequence in workload_thread function.
This fixed lockup symptom for guest-reboot stress test.
v2: adjust sequence in workload_thread based on zhenyu's suggestion.
adjust sequence in create/destroy_vgpu function.
v3: fix to still require struct_mutex for dispatch_workload()
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