Arnd Bergmann [Fri, 13 Mar 2015 21:08:58 +0000 (22:08 +0100)]
Merge tag 'at91-cleanup2' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91 into next/cleanup
Pull "Second batch of cleanup for 4.1" from Nicolas Ferre:
- remove unused matrix header files
- dbgu + chip identification: new driver for SoC detection
this allow to remove all additional io mapping
- remove old non-standard AT91 setup code
First batch of cleanup for 4.1:
- little phy fixup that is not needed anymore
- hudge cleanup of the PM code:
- removal of "use slow clock" option => always use this for suspend to RAM
- quicker suspend as the asm function is copied only once to SRAM
- use of the same asm function for "standby" and "mem" types of suspend
actions
- adaptation to the ARMv7 processors
* tag 'at91-cleanup2' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91: (44 commits)
ARM: at91: remove old setup
ARM: at91: sama5d4: remove useless map_io
ARM: at91: sama5 use SoC detection infrastructure
ARM: at91: at91sam9: use SoC detection infrastructure
ARM: at91: at91rm9200 use SoC detection infrastructure
ARM: at91: add soc detection infrastructure
ARM: at91/dt: introduce atmel,<chip>-dbgu
ARM: at91: remove unused _matrix.h headers
ARM: at91: remove unused at91_ioremap_matrix and header
ARM: at91: remove NEED_MACH_IO_H
ARM: at91/pm: flush data cache and clean, invalidate and disable the L2 cache
ARM: at91/pm_suspend: add the WFI instruction support for ARMv7
ARM: at91/pm: remove unused void (*at91_pm_standby)(void)
ARM: at91/pm: rename function name: at91_slow_clock() --> at91_pm_suspend_sram_fn()
ARM: at91/pm: rename file name: pm_slowclock.S --> pm_suspend.S
ARM: at91/pm: standby mode uses same sram function as suspend to memory mode
ARM: at91/pm: move the copying the sram function to the sram initialization phase
ARM: at91/pm_slowclock: create the procedure to handle the sdram self-refresh
ARM: at91/pm_slowclock: remove clocks which are already stopped when entering slow clock mode
ARM: at91/pm: remove CONFIG_AT91_SLOW_CLOCK config option
...
Arnd Bergmann [Thu, 12 Mar 2015 14:54:23 +0000 (15:54 +0100)]
ARM: at91: remove NEED_MACH_IO_H
The mach/io.h header on at91 is used to support a nonstandard I/O space
window for the cf card driver. This changes the driver to use pci_ioremap_io
in order to have the standard location, and then removes the custom
mach/io.h.
Wenyou Yang [Mon, 9 Mar 2015 03:54:26 +0000 (11:54 +0800)]
ARM: at91/pm: flush data cache and clean, invalidate and disable the L2 cache
Flush data cache, and clean, invalidate and disable the L2 cache before going to suspend.
Restore the L2 cache configuration and re-enable the L2 cache after waking up.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Tested-by: Sylvain Rochet <sylvain.rochet@finsecur.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Wenyou Yang [Mon, 9 Mar 2015 03:51:09 +0000 (11:51 +0800)]
ARM: at91/pm: rename function name: at91_slow_clock() --> at91_pm_suspend_sram_fn()
As the file name is renamed, rename the function name at91_slow_clock()
--> at91_pm_suspend_sram_fn(), rename the function handler's name at the
same time.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Tested-by: Sylvain Rochet <sylvain.rochet@finsecur.com>
[nicolas.ferre@atmel.com: little update of the commit message] Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Wenyou Yang [Mon, 9 Mar 2015 03:49:46 +0000 (11:49 +0800)]
ARM: at91/pm: standby mode uses same sram function as suspend to memory mode
To simply the PM code, the suspend to standby mode uses same sram function
as the suspend to memory mode, running in the internal SRAM, instead of the
respective code for each mode.
For the suspend to standby mode, the master clock doesn't switch to the slow
clock, and PLLA and the main oscillator doesn't turn off as well.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Tested-by: Sylvain Rochet <sylvain.rochet@finsecur.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
The slow clock always exists, selecting CONFIG_AT91_SLOW_CLOCK config
is unnecessary for the suspend to memory mode.
For this mode the master clock should always switch to the slow clock.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Tested-by: Sylvain Rochet <sylvain.rochet@finsecur.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Wenyou Yang [Mon, 9 Mar 2015 03:44:50 +0000 (11:44 +0800)]
ARM: at91: move "select SRAM" under SOC_AT91SAM9 and SOC_SAMA5
To simply the PM config the CONFIG_AT91_SLOW_CLOCK option will be removed,
so move "select SRAM" from under AT91_SLOW_CLOCK, add "select SRAM if PM"
under SOC_AT91SAM9 and SOC_SAMA5
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Tested-by: Sylvain Rochet <sylvain.rochet@finsecur.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Boris Brezillon [Wed, 4 Mar 2015 11:20:12 +0000 (12:20 +0100)]
ARM: at91: remove ksz8081 phy fixup registration for sama5d4ek board
Commit 2b0ba96cea60 ("net: phy: micrel: disable NAND-tree for KSZ8021,
KSZ8031, KSZ8051, KSZ8081") automated the NAND-tree mode deactivation
process, thus making this phy fixup useless.
Remove it along with the associated headers inclusion.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
[nicolas.ferre@atmel.com: remove selection of PHYLIB in at91 Kconfig] Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Nicolas Ferre [Thu, 12 Mar 2015 14:30:03 +0000 (15:30 +0100)]
Merge tag 'at91-fixes3' into at91-4.1-cleanup
Third fixes batch for AT91 on 4.0:
- clock fixes for USB
- compatible string changes for handling USB IP differences
(+ needed AHB matrix syscon)
- fix of a compilation error in PM code
Nicolas Ferre [Thu, 12 Mar 2015 14:30:00 +0000 (15:30 +0100)]
Merge tag 'at91-fixes2' into at91-4.1-cleanup
Second fixes batch for AT91 on 4.0:
- little fix for !MMU debug: may also help for randconfig
- fix of 2 errors in LCD clock definitions
- in PM code, not writing the key leads to not execute the action
Nicolas Ferre [Thu, 12 Mar 2015 14:29:56 +0000 (15:29 +0100)]
Merge tag 'at91-fixes' into at91-4.1-cleanup
First fixes batch for AT91 on 4.0:
- PM slowclock fixes for DDR and timeouts
- fix some DT entries
- little defconfig updates
- the removal of a harmful watchdog option + its detailed documentation
Arnd Bergmann [Wed, 11 Mar 2015 22:16:58 +0000 (23:16 +0100)]
Merge branches 'next/soc', 'next/defconfig', 'next/dt', 'next/arm64', 'next/cleanup', 'fixes' and 'next/multiplatform' into for-next
* next/soc:
Documentation: arm: update supported Marvell EBU processors
ARM: mvebu: add core support for Armada 39x
devicetree: bindings: add new SMP enable method for Marvell Armada 39x
devicetree: bindings: add DT binding for the Marvell Armada 39x SoC family
* next/defconfig:
ARM: mvebu: enable Armada 39x in mvebu_v7_defconfig
* next/dt: (58 commits)
ARM: BCM5301X: Fix default state of power LEDs on Netgear R6250
ARM: BCM5301X: Add DT for Netgear R8000
ARM: shmobile: ape6evm dts: Configure the custom switch as wake-up source
ARM: shmobile: ape6evm dts: Enable pull-up for GPIO switches
ARM: at91/dt: sama5d4: add ISI dt support
ARM: at91/dt: sama5d4: add pwm0 device node
ARM: at91/dt: sama5d4: add aes, sha and tdes nodes
ARM: at91: dt: sama5d4ek: enable audio
ARM: at91: dt: sama5d4ek: add and enable wm8904
ARM: at91: dt: sama5d4ek: enable ssc0
ARM: at91: dt: sama5d4: add ssc nodes
ARM: at91/dt: sama5d4 xplained: add i2c0
ARM: at91/dt: sama5d4: add dts for sama5d4 xplained board
ARM: at91/dt: sama5d4: add #{address, size}_cells properties for macb0
ARM: at91/dt: sama5d4ek: add leds in DT node
ARM: at91/dt: add i2c1 declaration to sama5d4
ARM: at91/dt: gpio-keys: address-cells and size-cells properties are not needed
ARM: at91/dt: at91-sama5d3_xplained: add gpio-key pinctrl property
ARM: at91/dt/trivial: correct file headers for SAMA5D3 SoC peripherals
ARM: at91/dt: at91sam9n12ek: enable udp
...
* next/arm64:
arm64: Add support for Spreadtrum's Sharkl64 Platform in Kconfig and defconfig
arm64: dts: Add support for Spreadtrum SC9836 SoC in dts and Makefile
ARM64: Add new Xilinx ZynqMP SoC
Arnd Bergmann [Wed, 11 Mar 2015 22:14:28 +0000 (23:14 +0100)]
Merge tag 'mvebu-soc-4.1' of git://git.infradead.org/linux-mvebu into next/soc
Pull "mvebu soc changes for v4.1 (part #1)" from Gregory CLEMENT:
- Add support for a new SoC: Armada 39x
* tag 'mvebu-soc-4.1' of git://git.infradead.org/linux-mvebu:
Documentation: arm: update supported Marvell EBU processors
ARM: mvebu: add core support for Armada 39x
devicetree: bindings: add new SMP enable method for Marvell Armada 39x
devicetree: bindings: add DT binding for the Marvell Armada 39x SoC family
Arnd Bergmann [Wed, 11 Mar 2015 21:53:16 +0000 (22:53 +0100)]
Merge tag 'mvebu-dt-4.1' of git://git.infradead.org/linux-mvebu into next/dt
Pull "mvebu dt changes for v4.1 (part #1)" from Gregory CLEMENT:
- fix SDHCI nodes on Armada 38x
- add Linksys WRT1900AC (Mamba) support (including the Ethernet switch)
- add several fixes and improvement for dove
- enable GPIO fan alarm support for 2Big Network v2
- add several fixes about unit address
- add support for Armada 39x SoC and board
* tag 'mvebu-dt-4.1' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: add Device Tree files for Armada 39x SoC and board
ARM: mvebu: fix unit address of MPIC nodes
ARM: mvebu: use stdout-path in all armada-*.dts
ARM: mvebu: add serial port aliases on Armada 370/375/38x/XP
ARM: mvebu: remove aliases for Ethernet devices on Armada 370/375/38x/XP
ARM: mvebu: add UART labels to Armada 375
ARM: mvebu: add missing UART labels on Armada 38x
ARM: mvebu: fix usb@ unit address on Armada 38x to match register address
ARM: mvebu: a385-db-ap: Enable the NAND
ARM: ARMADA XP: WRT1900AC: Add support for the Ethernet switch
ARM: Kirkwood: enable GPIO fan alarm support for 2Big Network v2
ARM: mvebu: Fix MPIC unit address
ARM: dts: dove: Add some more common pinctrl settings
ARM: dts: dove: Add node labels for PCIe ports 0 and 1
ARM: dts: dove: Always include gpio and interrupt-controller headers
ARM: dts: dove: Fix uart[23] reg property
ARM: mvebu: add Linksys WRT1900AC (Mamba) support
ARM: mvebu: Add Device Tree description of SDHCI for Armada 388 RD
ARM: mvebu: Update the SDHCI node on Armada 38x
ARM: mvebu: Use macros for interrupt flags on Armada 38x sdhci node
Arnd Bergmann [Wed, 11 Mar 2015 21:51:11 +0000 (22:51 +0100)]
Merge tag 'arm-soc/for-4.1/devicetree' of http://github.com/broadcom/stblinux into next/dt
Pull "Broadcom Device Tree changes for 4.1 #1" from Florian Fainelli:
This pull request contains the following Broadcom SoCs Device Tree changes:
- Jonathan adds support for the Broadcom Cygnus BCM958305K board
- Rafal adds support for Netgear R8000 and fixes the default for power LEDs
on Netgear R6250
* tag 'arm-soc/for-4.1/devicetree' of http://github.com/broadcom/stblinux:
ARM: BCM5301X: Fix default state of power LEDs on Netgear R6250
ARM: BCM5301X: Add DT for Netgear R8000
ARM: dts: Enable Broadcom Cygnus BCM958305K
Arnd Bergmann [Wed, 11 Mar 2015 19:46:52 +0000 (20:46 +0100)]
Merge tag 'at91-fixes3' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91 into fixes
Pull "Third fixes batch for AT91 on 4.0" from Nicolas Ferre:
- clock fixes for USB
- compatible string changes for handling USB IP differences
(+ needed AHB matrix syscon)
- fix of a compilation error in PM code
* tag 'at91-fixes3' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91:
ARM: at91: pm_slowclock: fix the compilation error
ARM: at91/dt: fix USB high-speed clock to select UTMI
ARM: at91/dt: fix at91 udc compatible strings
ARM: at91/dt: declare matrix node as a syscon device
ARM: at91/dt: at91sam9261: fix clocks and clock-names in udc definition
Nicolas Ferre [Mon, 9 Mar 2015 15:51:13 +0000 (16:51 +0100)]
ARM: at91/dt: fix USB high-speed clock to select UTMI
The UTMI clock must be selected by any high-speed USB IP. The logic behind it
needs this particular clock.
So, correct the clock in the device tree files affected.
Reported-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: <stable@vger.kernel.org> #3.18
Boris Brezillon [Wed, 3 Dec 2014 11:32:10 +0000 (12:32 +0100)]
ARM: at91/dt: fix at91 udc compatible strings
The at91rm9200, at91sam9260, at91sam9261 and at91sam9263 SoCs have slightly
different UDC IPs.
Those differences were previously handled with cpu_is_at91xx macro which
are about to be dropped for multi-platform support, thus we need to
change compatible strings.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Boris Brezillon [Wed, 3 Dec 2014 11:32:09 +0000 (12:32 +0100)]
ARM: at91/dt: declare matrix node as a syscon device
There is no specific driver handling the AHB matrix, this is a simple syscon
device. the matrix is needed by several other drivers including the USB on some
SoCs (at91sam9261 for instance).
Without this definition, the USB will not work on these SoCs.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Arnd Bergmann [Wed, 11 Mar 2015 14:38:11 +0000 (15:38 +0100)]
Merge tag 'imx-fixes-4.0' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes
Pull "The i.MX fixes for 4.0" from Shawn Guo:
It includes a couple of i.MX6 dts fixes, which set an input supply to
vbus regulator. Without the fixes, the voltage of vbus is incorrect
after system boots up.
* tag 'imx-fixes-4.0' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: imx6sl-evk: set swbst_reg as vbus's parent reg
ARM: imx6qdl-sabresd: set swbst_reg as vbus's parent reg
Sudeep Holla [Mon, 9 Mar 2015 18:27:49 +0000 (18:27 +0000)]
ARM: vexpress: update CONFIG_USB_ISP1760 option
Commit 7ef077a8ad35 ("usb: isp1760: Move driver from drivers/usb/host/
to drivers/usb/isp1760/") moved the isp1760 driver and changed the
Kconfig option. This makes CONFIG_USB_ISP1760_HCD not selectable
directly anymore. This results in driver being not compiled in when
using vexpress_defconfig and the USB is non-functional.
This patch updates the CONFIG_USB_ISP1760_HCD to CONFIG_USB_ISP1760 to
get back USB functional on vexpress platforms.
Arnd Bergmann [Wed, 11 Mar 2015 14:35:28 +0000 (15:35 +0100)]
Merge tag 'fixes-v4.0-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Pull "omap fixes against v4.0-rc2" from Tony Lindgren:
Fixes for various omap variants, mostly minor fixes for various SoCs
with the bigger changes being for the dra7 clocks and hwmod data:
- Fix wl12xx for dm3730-evm
- Fix omap4 prm save and clea
- Fix hwmod clkdm use count
- Fix hwmod data for pcie on dra7
- Fix lockdep for hwmod
- Fix USB on most omap3 boars by enabling it in the defconfig
- Fix the bypass clock source for omap5 and dra7
- Fix the ehrpwm clock for am33xx and am43xx
- Enable AES and SHAM for BeagleBone white
- Use rmii clock for am335x-lxm
- Fix polling intervals for omap5 thermal zones
- Fix slewctrl for am33xx and am43xx
- Fix dra7-evm dcan pinctrl
* tag 'fixes-v4.0-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: Fix wl12xx on dm3730-evm with mainline u-boot
ARM: OMAP: enable TWL4030_USB in omap2plus_defconfig
ARM: dts: dra7x-evm: avoid possible contention while muxing on CAN lines
ARM: dts: dra7x-evm: Don't use dcan1_rx.gpio1_15 in DCAN pinctrl
ARM: dts: am43xx: fix SLEWCTRL_FAST pinctrl binding
ARM: dts: am33xx: fix SLEWCTRL_FAST pinctrl binding
ARM: dts: OMAP5: fix polling intervals for thermal zones
ARM: dts: am335x-lxm: Use rmii-clock-ext
ARM: dts: am335x-bone-common: enable aes and sham
ARM: dts: am43xx-clocks: Fix ehrpwm tbclk data on am43xx
ARM: dts: am33xx-clocks: Fix ehrpwm tbclk data on am33xx
ARM: dts: OMAP5: Fix the bypass clock source for dpll_iva and others
ARM: dts: DRA7x: Fix the bypass clock source for dpll_iva and others
ARM: OMAP4+: PRM: fix omap4 version of prm_save_and_clear_irqen
ARM: OMAP2+: hwmod: fix deassert hardreset clkdm usecounting
ARM: DRA7: hwmod_data: Fix hwmod data for pcie
ARM: omap2+: omap_hwmod: Set unique lock_class_key per hwmod
Fabrice GASNIER [Thu, 5 Mar 2015 15:53:54 +0000 (16:53 +0100)]
ARM: STi: Add STiH410 SoC support
This patch adds support to STiH410 SoC.
Please note "st,stih410" is already present in device tree.
The problem is that it is missing the entry in the match table,
and so the L2 cache and other cpus than 0 don't get initialized.
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Tested-by: Maxime Coquelin <maxime.coquelin@st.com> Acked-by: Peter Griffin <peter.griffin@linaro.org> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Wed, 11 Mar 2015 14:33:41 +0000 (15:33 +0100)]
Merge tag 'at91-fixes2' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91 into fixes
Pull "Second fixes batch for AT91 on 4.0" from Nicolas Ferre:
- little fix for !MMU debug: may also help for randconfig
- fix of 2 errors in LCD clock definitions
- in PM code, not writing the key leads to not execute the action
* tag 'at91-fixes2' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91:
ARM: at91/pm: MOR register KEY was missing
ARM: at91/dt: sama5d4: fix lcdck clock definition
ARM: at91/dt: sama5d4: rename lcd_clk into lcdc_clk
ARM: at91: debug: fix non MMU debug
Stefan Agner [Sun, 1 Mar 2015 23:09:02 +0000 (00:09 +0100)]
MAINTAINERS: add Freescale Vybrid SoC
Add Freescale Vybrid family as a own entry, along with an entry for
the so far orphan Vybrid device tree files. Also add myself as
a designated reviewer.
Peter Chen [Fri, 6 Mar 2015 08:04:21 +0000 (16:04 +0800)]
ARM: imx6sl-evk: set swbst_reg as vbus's parent reg
USB vbus 5V is from PMIC SWBST, so set swbst_reg as vbus's
parent reg, it fixed a bug that the voltage of vbus is incorrect
due to swbst_reg is disabled after boots up.
Cc: stable@vger.kernel.org Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Peter Chen [Fri, 6 Mar 2015 08:04:20 +0000 (16:04 +0800)]
ARM: imx6qdl-sabresd: set swbst_reg as vbus's parent reg
USB vbus 5V is from PMIC SWBST, so set swbst_reg as vbus's
parent reg, it fixed a bug that the voltage of vbus is incorrect
due to swbst_reg is disabled after boots up.
Cc: stable@vger.kernel.org Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
ARM: shmobile: ape6evm dts: Enable pull-up for GPIO switches
The switches on r8a73a4/ape6evm do not have pull-up registers. The
schematics say: "Need to use APE6 internal PullUp", hence enable pull-up
using pinctrl.
Without this, the switches don't really work, as the GPIO inputs are
more likely to pick up ghost signals through capacitive coupling than
actual keypresses.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Tony Lindgren [Fri, 6 Mar 2015 18:37:34 +0000 (10:37 -0800)]
ARM: OMAP2+: Fix wl12xx on dm3730-evm with mainline u-boot
I upgraded my u-boot and noticed that wl12xx stopped working.
Turns out the kernel is not setting the quirk for the MMC2
copy clock while the eariler bootloader I had was setting it.
Tony Lindgren [Fri, 6 Mar 2015 17:54:02 +0000 (09:54 -0800)]
Merge tag 'for-v4.0-rc/omap-fixes-a' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v4.0/fixes
ARM: OMAP2+: first set of hwmod and PRCM fixes for v4.0-rc
This series fixes the following bugs:
- a lockdep problem with the OMAP hwmod code;
- incorrect PCIe hwmod data for the DRA7xx chips;
- the clockdomain handling in the hardreset deassertion code,
preventing idle;
- the use of an IRQ status register rather than an IRQ enable register
in the OMAP4 PRM code.
Basic build, boot, and PM test results are available here:
Roger Quadros [Thu, 5 Mar 2015 13:32:43 +0000 (15:32 +0200)]
ARM: dts: dra7x-evm: avoid possible contention while muxing on CAN lines
DCAN1 RX and TX lines are internally pulled high according to [1].
While muxing between DCAN mode and SAFE mode we make sure
that the same pull direction is set to minimize opposite
pull contention during the switching window.
[1] in DRA7 data manual, Ball characteristics table 4-2, DSIS colum shows
the state driven to the peripheral input while in the deselcted mode.
DSIS - De-Selected Input State.
Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
According to AM437x TRM, Document SPRUHL7B, Revised December 2014,
Section 7.2.1 Pad Control Registers, setting bit 19 of the pad control
registers actually sets the SLEWCTRL value to slow rather than fast as
the current macro indicates. Introduce a new macro, SLEWCTRL_SLOW, that
sets the bit, and modify SLEWCTRL_FAST to 0 but keep it for
completeness.
Current users of the macro (i2c, mdio, and uart) are left unmodified as
SLEWCTRL_FAST was the macro used and actual desired state. Tested on
am437x-gp-evm with no difference in software performance seen.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
According to AM335x TRM, Document spruh73l, Revised February 2015,
Section 9.2.2 Pad Control Registers, setting bit 6 of the pad control
registers actually sets the SLEWCTRL value to slow rather than fast as
the current macro indicates. Introduce a new macro, SLEWCTRL_SLOW, that
sets the bit, and modify SLEWCTRL_FAST to 0 but keep it for
completeness.
Current users of the macro (i2c and mdio) are left unmodified as
SLEWCTRL_FAST was the macro used and actual desired state. Tested on
am335x-gp-evm with no difference in software performance seen.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Tero Kristo [Fri, 27 Feb 2015 13:59:03 +0000 (15:59 +0200)]
ARM: dts: OMAP5: fix polling intervals for thermal zones
OMAP4 has a finer counter granularity, which allows for a delay of 1000ms
in the thermal zone polling intervals. OMAP5 has a different counter
mechanism, which allows at maximum a 500ms timer. Adjust the cpu thermal
zone polling interval accordingly.
Without this patch, the polling interval information is simply ignored,
and the following thermal warnings are printed during boot (assuming
thermal is enabled);
[ 1.545343] ti-soc-thermal 4a0021e0.bandgap: Delay 1000 ms is not supported
[ 1.552691] ti-soc-thermal 4a0021e0.bandgap: Delay 1000 ms is not supported
[ 1.560029] ti-soc-thermal 4a0021e0.bandgap: Delay 1000 ms is not supported
Signed-off-by: Tero Kristo <t-kristo@ti.com> Cc: Tony Lindgren <tony@atomide.com> Acked-by: Eduardo Valentin <edubezval@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Matt Porter [Wed, 25 Feb 2015 18:52:41 +0000 (13:52 -0500)]
ARM: dts: am335x-bone-common: enable aes and sham
Beaglebone Black doesn't have AES and SHAM enabled like the
original Beaglebone White dts. This breaks applications that
leverage the crypto blocks so fix this by enabling these nodes
in the am335x-bone-common.dtsi. With this change, enabling the
nodes in am335x-bone.dts is no longer required so remove them.
Signed-off-by: Matt Porter <mporter@konsulko.com> Acked-by: Robert Nelson <robertcnelson@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Vignesh R [Tue, 10 Feb 2015 05:35:42 +0000 (11:05 +0530)]
ARM: dts: am43xx-clocks: Fix ehrpwm tbclk data on am43xx
ehrpwm tbclk is wrongly modelled as deriving from dpll_per_m2_ck.
The TRM says tbclk is derived from SYSCLKOUT. SYSCLKOUT nothing but the
functional clock of pwmss (l4ls_gclk).
Fix this by changing source of ehrpwmx_tbclk to l4ls_gclk.
Fixes: 4da1c67719f61 ("add tbclk data for ehrpwm") Signed-off-by: Vignesh R <vigneshr@ti.com> Acked-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Vignesh R [Tue, 10 Feb 2015 05:35:41 +0000 (11:05 +0530)]
ARM: dts: am33xx-clocks: Fix ehrpwm tbclk data on am33xx
ehrpwm tbclk is wrongly modelled as deriving from dpll_per_m2_ck.
The TRM says tbclk is derived from SYSCLKOUT. SYSCLKOUT nothing but the
functional clock of pwmss (l4ls_gclk).
Fix this by changing source of ehrpwmx_tbclk to l4ls_gclk.
Fixes: 9e100ebafb91: ("Fix ehrpwm tbclk data") Signed-off-by: Vignesh R <vigneshr@ti.com> Acked-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
On OMAP54xx, For DPLL_IVA, the ref clock(CLKINP) is connected to sys_clk1 and
the bypass input(CLKINPULOW) is connected to iva_dpll_hs_clk_div clock.
But the bypass input is not directly routed to bypass clkout instead
both CLKINP and CLKINPULOW are connected to bypass clkout via a mux.
This mux is controlled by the bit - CM_CLKSEL_DPLL_IVA[23]:DPLL_BYP_CLKSEL
and it's POR value is zero which selects the CLKINP as bypass clkout.
which means iva_dpll_hs_clk_div is not the bypass clock for dpll_iva_ck
Fix this by adding another mux clock as parent in bypass mode.
This design is common to most of the PLLs and the rest have only one bypass
clock. Below is a list of the DPLLs that need this fix:
DPLL_IVA,
DPLL_PER,
DPLL_USB and DPLL_CORE
Signed-off-by: Ravikumar Kattekola <rk@ti.com> Acked-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
ARM: dts: DRA7x: Fix the bypass clock source for dpll_iva and others
Fixes: ee6c750761 (ARM: dts: dra7 clock data)
On DRA7x, For DPLL_IVA, the ref clock(CLKINP) is connected to sys_clk1 and
the bypass input(CLKINPULOW) is connected to iva_dpll_hs_clk_div clock.
But the bypass input is not directly routed to bypass clkout instead
both CLKINP and CLKINPULOW are connected to bypass clkout via a mux.
This mux is controlled by the bit - CM_CLKSEL_DPLL_IVA[23]:DPLL_BYP_CLKSEL
and it's POR value is zero which selects the CLKINP as bypass clkout.
which means iva_dpll_hs_clk_div is not the bypass clock for dpll_iva_ck
Fix this by adding another mux clock as parent in bypass mode.
This design is common to most of the PLLs and the rest have only one bypass
clock. Below is a list of the DPLLs that need this fix:
DPLL_IVA, DPLL_DDR,
DPLL_DSP, DPLL_EVE,
DPLL_GMAC, DPLL_PER,
DPLL_USB and DPLL_CORE
Signed-off-by: Ravikumar Kattekola <rk@ti.com> Acked-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Boris BREZILLON [Fri, 1 Aug 2014 07:41:46 +0000 (09:41 +0200)]
ARM: at91/dt: sama5d4: fix lcdck clock definition
lcdck takes mck (not smd) as its parent. It is also assigned id 3 and not 4.
Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
[nicolas.ferre@atmel.com: squashed 2 related patches] Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Arnd Bergmann [Wed, 4 Mar 2015 22:51:30 +0000 (23:51 +0100)]
Merge branches 'fixes' and 'next/dt' into for-next
* fixes:
ARM: multi_v7_defconfig: increase the number of maximum number of CPUs to 16
ARM: sunxi_defconfig: increase the number of maximum number of CPUs to 8
* next/dt:
devicetree: Add TI-NSPIRE USB OTG support to device tree
Tyler Baker [Wed, 11 Feb 2015 03:52:27 +0000 (19:52 -0800)]
ARM: multi_v7_defconfig: increase the number of maximum number of CPUs to 16
The HiSilicon HiP04 has 16 CPUs. I propose we increase the maximum number of CPUs to 16 to avoid the following warning identified during automated boot testing [1].
------------[ cut here ]------------
WARNING: CPU: 0 PID: 0 at ../arch/arm/kernel/devtree.c:144 arm_dt_init_cpu_maps+0x118/0x1e8()
DT /cpu 9 nodes greater than max cores 8, capping them
Modules linked in:
CPU: 0 PID: 0 Comm: swapper Not tainted 3.19.0-00528-gbdccc4edeb03 #1
Hardware name: Hisilicon HiP04 (Flattened Device Tree)
[] (unwind_backtrace) from [] (show_stack+0x10/0x14)
[] (show_stack) from [] (dump_stack+0x78/0x94)
[] (dump_stack) from [] (warn_slowpath_common+0x74/0xb0)
[] (warn_slowpath_common) from [] (warn_slowpath_fmt+0x30/0x40)
[] (warn_slowpath_fmt) from [] (arm_dt_init_cpu_maps+0x118/0x1e8)
[] (arm_dt_init_cpu_maps) from [] (setup_arch+0x638/0x9a0)
[] (setup_arch) from [] (start_kernel+0x8c/0x3b4)
[] (start_kernel) from [<10208074>] (0x10208074)
---[ end trace cb88537fdc8fa200 ]---
Tyler Baker [Wed, 11 Feb 2015 03:52:28 +0000 (19:52 -0800)]
ARM: sunxi_defconfig: increase the number of maximum number of CPUs to 8
The a80 optimus has 8 CPUs. I propose we increase the maximum number of CPUs to 8 to avoid the following warning identified during automated boot testing [1].
------------[ cut here ]------------
WARNING: CPU: 0 PID: 0 at ../arch/arm/kernel/devtree.c:144 arm_dt_init_cpu_maps+0x110/0x1e0()
DT /cpu 5 nodes greater than max cores 4, capping them
CPU: 0 PID: 0 Comm: swapper Not tainted 3.19.0-00528-gbdccc4edeb03 #1
Hardware name: Allwinner sun9i Family
[] (unwind_backtrace) from [] (show_stack+0x10/0x14)
[] (show_stack) from [] (dump_stack+0x74/0x90)
[] (dump_stack) from [] (warn_slowpath_common+0x70/0xac)
[] (warn_slowpath_common) from [] (warn_slowpath_fmt+0x30/0x40)
[] (warn_slowpath_fmt) from [] (arm_dt_init_cpu_maps+0x110/0x1e0)
[] (arm_dt_init_cpu_maps) from [] (setup_arch+0x634/0x8d4)
[] (setup_arch) from [] (start_kernel+0x88/0x3ac)
[] (start_kernel) from [<20008074>] (0x20008074)
---[ end trace cb88537fdc8fa200 ]---
Arnd Bergmann [Wed, 4 Mar 2015 22:06:49 +0000 (23:06 +0100)]
Merge tag 'for-v4.0-rc/meson-soc' of https://github.com/carlocaione/linux-meson into next/soc
Pull "meson SoC changes" from Carlo Caione:
- Add some forgotten documentation
- Kconfig changes to enable PINCTRL
* tag 'for-v4.0-rc/meson-soc' of https://github.com/carlocaione/linux-meson:
of: Define board compatible for MINIX NEO-X8
of: Add vendor prefix for MINIX
ARM: meson: select PINCTRL_MESON and ARCH_REQUIRE_GPIOLIB
Arnd Bergmann [Wed, 4 Mar 2015 21:59:23 +0000 (22:59 +0100)]
Merge tag 'renesas-dt-for-v4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Pull "Renesas ARM Based SoC DT Updates for v4.1" from Simon Horman:
* Increase hardware coverage of DT for various SoCs
* Add PFC information for emev2 SoC
* Remap entire APMU region for r8a7791 and r8a7790 SoCs
* Declare the full 512 MiB of RAM for kzm9g board
* Add selectable sources to DIV6 clocks to sh73a0 SoC
* Add missing INTCA0 clock for irqpin module on sh73a0 SoC
* Set control-parent for all irqpin node on sh73a0 SoC
* tag 'renesas-dt-for-v4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (32 commits)
ARM: shmobile: r8a7794: add SDHI DT support
ARM: shmobile: r8a7790: add ADSP clocks
ARM: shmobile: r8a7791: add ADSP clocks
ARM: shmobile: henninger: add CAN0 DT support
ARM: shmobile: r8a7791: add CAN DT support
ARM: shmobile: r8a7791: add CAN clocks
ARM: shmobile: r8a7790: add CAN DT support
ARM: shmobile: r8a7790: add CAN clocks
ARM: shmobile: emev2-kzm9d dts: Add PFC information for uart1
ARM: shmobile: emev2 dtsi: Add PFC information
ARM: shmobile: r8a7791: smp: remap whole apmu region
ARM: shmobile: r8a7790: smp: remap whole apmu region
ARM: shmobile: koelsch: Add DU HDMI output support
ARM: shmobile: r8a7791: Correct SDHI clock labels and output-names
ARM: shmobile: r8a7794: Correct SDHI clock base address, labels and output-names
ARM: shmobile: r8a7794: alt: Enable ethernet controller
ARM: shmobile: r8a7794: Add ethernet controller to device tree
ARM: shmobile: r8a7794: Add IPMMU DT nodes
ARM: shmobile: r8a7791: Add IPMMU DT nodes
ARM: shmobile: r8a7790: Add IPMMU DT nodes
...
[arnd: The sh7372 platform is rather dated and is believed to
have no active users on modern kernels. It stands in the way
of converting all of mach-shmobile to be multiplatform capable,
as adding pinctrl and common-clock support for it would be more
work than it's worth. As always, should any legitimate upstream
users show up in the future, we will revert this removal]
Arnd Bergmann [Wed, 4 Mar 2015 20:23:20 +0000 (21:23 +0100)]
Merge tag 'renesas-soc-for-v4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
Pull "Renesas ARM Based SoC Updates for v4.1" from Simon Horman:
* Do not make CMA reservation for R-Car Gen2 when HIGHMEM=n
* tag 'renesas-soc-for-v4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: No R-Car Gen2 CMA reservation when HIGHMEM=n
Arnd Bergmann [Wed, 4 Mar 2015 20:14:47 +0000 (21:14 +0100)]
Merge tag 'at91-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91 into fixes
Merge "First fixes batch for AT91 on 4.0" from Nicolas Ferre:
- PM slowclock fixes for DDR and timeouts
- fix some DT entries
- little defconfig updates
- the removal of a harmful watchdog option + its detailed documentation
* tag 'at91-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91:
ARM: at91/dt: keep watchdog running in idle mode
dts: Documentation: AT91 Watchdog, explain what atmel,idle-halt property really do
ARM: at91/defconfig: add at91rm9200 ethernet support
ARM: at91/defconfig: remove CONFIG_SYSFS_DEPRECATED
ARM: at91/dt: at91sam9260: fix usart pinctrl
ARM: at91/dt: sama5d4: add missing alias for i2c0
ARM: at91/dt: at91sam9263: Fixup sram1 device tree node
ARM: at91: pm: fix SRAM allocation
ARM: at91: pm: fix at91rm9200 standby
pm: at91: Workaround DDRSDRC self-refresh bug with LPDDR1 memories.
pm: at91: pm_slowclock: fix suspend/resume hang up in timeouts
Arnd Bergmann [Wed, 4 Mar 2015 20:00:51 +0000 (21:00 +0100)]
Merge tag 'samsung-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into fixes
Merge "Samsung fixes for v4.0" from Kukjin Kim:
* tag samsung-fixes-1:
ARM: EXYNOS: Fix wrong hwirq of RTC interrupt for Exynos3250 SoC
ARM: EXYNOS: Don't use LDREX and STREX after disabling cache coherency
Arnd Bergmann [Wed, 4 Mar 2015 19:59:03 +0000 (20:59 +0100)]
Merge tag 'samsung-fixes-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into fixes
Merge "Samsung tmu and hdmi regression fixes for v4.0" from Kukjin Kim:
- The thermal management unit and HDMI (drm mixer driver) related
reworks have been merged in v4.0 merge window. So if this DT changes
are missed for v4.0, we regressions in v4.0 release for exynos
platforms such as exynos5250, exynos5420, exynos4 SoCs.
- Note since there was a dependency with driver side, this cannot
be sent to upstream during preivous merge window and now it has been
resolved.
* tag 'samsung-fixes-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: dts: add display power domain for exynos5250
ARM: dts: add 'hdmi' clock to mixer nodes for exynos5250 and exynos5420
ARM: dts: enable hdmi support for exynos4210-universal_c210
ARM: dts: enable hdmi support for exynos4412-odroid-common
ARM: dts: add dependency between TV and LCD0 power domains for exynos4
ARM: dts: add hdmi related nodes for exynos4 SoCs
ARM: EXYNOS: add support for sub-power domains
dt-bindings: document a note about power domain subdomains
ARM: dts: Provide dt bindings identical for Exynos TMU
ARM: dts: Trip points and sensor configuration data for exynos5440
ARM: dts: define default thermal-zones for exynos4
ARM: dts: default trip points definition for exynos5420
ARM: dts: add TMU default definitions for exynos4412
ARM: dts: Adding CPU cooling binding for Exynos SoCs
ARM: dts: Enable TMU for exynos4412-odriod-common
ARM: dts: Add LDO10 for TMU for exynos4412-odroid-common
ARM: dts: Enable TMU for exynos4210-trats
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