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11 years agoserial/imx: support to handle break character
Hui Wang [Wed, 24 Aug 2011 09:41:47 +0000 (17:41 +0800)]
serial/imx: support to handle break character

The imx UART hardware controller can identify BREAK character and the
imx_set_termios() can accept BRKINT set by users, but current existing
imx_rxint() can't pass BREAK character and TTY_BREAK to the tty layer
as other serial drivers do (8250.c omap_serial.c).

Here add code to handle BREAK character and pass it to tty layer.

To detect error occurrence, i use URXD_ERR to replace (URXD_OVRRUN |
URXD_FRMERR | ...) because any kind of error occurs, URXD_ERR will
always be set to 1.

I put the URXD_BRK to the first place to check since when BREAK error
occurs, not only URXD_BRK is set to 1, but also URXD_PRERR and
URXD_FRMERR are all set to 1. This arrangement can filter out fake
parity and frame errors when BREAK error occurs.

Signed-off-by: Hui Wang <jason77.wang@gmail.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
(cherry picked from commit 019dc9ea8d528eb3640bbba604e1e5a2f6994b1f)

11 years agoENGR00178932 USB: fix two USB otg common bug for i.MX6
make shi [Thu, 5 Apr 2012 05:09:18 +0000 (13:09 +0800)]
ENGR00178932 USB: fix two USB otg common bug for i.MX6

 - Built in gadget device driver, plug in USB cable  with no response,
  the reason is USB VBUS wakeup is not enable after OTG switch,make
  sure pdata->port_enables is 1 even if the pdata is otg device pdata.

 -Without modprobe or built in  gadget device driver,after plug out
  the USB otg cable,will output "wait otg vbus change timeout!".The
  reason is we get error otgsc data  after USB enter low power mode.

Signed-off-by: make shi <b15407@freescale.com>
11 years agoENGR00177281-5 WM8962: add record feature
Gary Zhang [Thu, 5 Apr 2012 08:23:39 +0000 (16:23 +0800)]
ENGR00177281-5 WM8962: add record feature

1. add amic and dmic support.
2. update wm8962 codec driver

Signed-off-by: Gary Zhang <b13634@freescale.com>
11 years agoENGR00177581-4 MX6: add wm8962 mic support
Gary Zhang [Thu, 5 Apr 2012 08:19:32 +0000 (16:19 +0800)]
ENGR00177581-4 MX6: add wm8962 mic support

1. add amic_detect pin
2. add dmic_gpio init

Signed-off-by: Gary Zhang <b13634@freescale.com>
11 years agoENGR00160472 - MX6: add Ethernet ANSI/IEEE 802.2 LLC support in defconfig.
Fugang Duan [Thu, 5 Apr 2012 09:15:30 +0000 (17:15 +0800)]
ENGR00160472 - MX6: add Ethernet ANSI/IEEE 802.2 LLC support in defconfig.

- Add Ethernet ANSI/IEEE 802.2 LLC support. And the packet with
  IP head "ETH_P_802_2" will be processed in Ethernet stack L3 layer.
- If disable the feature, ethernet stack will drop the LLC packets.

Signed-off-by: Fugang Duan <B38611@freescale.com>
11 years agoENGR00178646-2 [MX6]Add SD1 and SD2 to interactive governor
Anson Huang [Sun, 1 Apr 2012 10:37:10 +0000 (18:37 +0800)]
ENGR00178646-2 [MX6]Add SD1 and SD2 to interactive governor

Different have different SD ports, need to add all SD irqs to
be condition of CPUfreq change and adjust the default irq threshold.

Signed-off-by: Anson Huang <b20788@freescale.com>
11 years agoENGR00178646-1 [CPUFreq]Fix interactive governor bug
Anson Huang [Sun, 1 Apr 2012 10:33:58 +0000 (18:33 +0800)]
ENGR00178646-1 [CPUFreq]Fix interactive governor bug

1. When system not boot up all cores, interactive governor
   will not work;
2. Adjust the default timer_rate to 50ms instead of 20ms to
   avoid too many freq up/down change.

Signed-off-by: Anson Huang <b20788@freescale.com>
11 years agoENGR00175724-2 IPU: change ipu_device thread process mode to interrupt mode.
Wayne Zou [Wed, 29 Feb 2012 08:39:58 +0000 (16:39 +0800)]
ENGR00175724-2 IPU: change ipu_device thread process mode to interrupt mode.

IPU: change ipu_device thread process method to interrupt drive mode
to get better IPU post-processing load balance.

Signed-off-by: Wayne Zou <b36644@freescale.com>
11 years agoENGR00175724-1 IPU: change ipu_device thread process mode to interrupt mode.
Wayne Zou [Wed, 29 Feb 2012 08:38:00 +0000 (16:38 +0800)]
ENGR00175724-1 IPU: change ipu_device thread process mode to interrupt mode.

IPU: change ipu_device thread process method to interrupt drive mode
to get better IPU post-processing load balance.

Signed-off-by: Wayne Zou <b36644@freescale.com>
11 years agoENGR00178763: MX6-Fix TO1.0 boot-fail issue
Ranjani Vaidyanathan [Mon, 2 Apr 2012 21:19:29 +0000 (16:19 -0500)]
ENGR00178763: MX6-Fix TO1.0 boot-fail issue

TO1.0 parts donot boot properly after the following commit:
88d3af87222b37e454acd6a8de3b0cf18180da32
MX6-Switch ARM_CLK to PLL2_400MHz when ARM freq
is below 400MHz.

Correct gpt_clk was not getting enabled. Fix by adding the
appropriate gpt_clk.

Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
11 years agoENGR00178584 uart3 pins configuration
Alejandro Sierra [Mon, 2 Apr 2012 20:28:38 +0000 (15:28 -0500)]
ENGR00178584 uart3 pins configuration

Uart 3 and NFC pins are shared.
Uart 3 enablement is done by passing an early parameter
called "uart3" from uboot. Both interfaces (Uart3 and NFC)
can NOT coexist on the same configuration at the same time.

Signed-off-by: Alejandro Sierra <b18039@freescale.com>
11 years agoENGR00178642-1 gpu-viv: fix suspend/resume issue for #304
Richard Zhao [Sun, 1 Apr 2012 08:49:30 +0000 (16:49 +0800)]
ENGR00178642-1 gpu-viv: fix suspend/resume issue for #304

Signed-off-by: Richard Zhao <richard.zhao@freescale.com>
Acked-by: Lily Zhang
11 years agoENGR00178631 MX6: fix audmux build error
Gary Zhang [Sun, 1 Apr 2012 05:37:55 +0000 (13:37 +0800)]
ENGR00178631 MX6: fix audmux build error

fix the build error for audmux located at
drivers\mxc\dam

Signed-off-by: Gary Zhang <b13634@freescale.com>
11 years agoENGR00178629 i.MX6 sabresd:support software power off by SNVS setting
Robin Gong [Sun, 1 Apr 2012 04:38:22 +0000 (12:38 +0800)]
ENGR00178629 i.MX6 sabresd:support software power off by SNVS setting

On sabresd board, PMIC_ON_REQ control pmic power on/off, we can set TOP and
DP_EN of SNVS_LPCR to implement power off by software. On this way,SNVS RTC
alarm can work after power off. The description of register can be found on
other SNVS block document which provided by IC team, not i.MX6 RM.

Signed-off-by: Robin Gong <B38343@freescale.com>
11 years agoENGR00178582 Remove uart2 early parameter
Alejandro Sierra [Sat, 31 Mar 2012 02:08:21 +0000 (20:08 -0600)]
ENGR00178582 Remove uart2 early parameter

UART2 and CAN interface do not have pins in common.
Therefore uart2 early parameter is not required.

Signed-off-by: Alejandro Sierra <b18039@freescale.com>
11 years agoENGR00178581 - EPDC fb: Fix regulator-related EPDC failure on SabreSD
Danny Nold [Fri, 30 Mar 2012 20:25:33 +0000 (15:25 -0500)]
ENGR00178581 - EPDC fb: Fix regulator-related EPDC failure on SabreSD

Remove call to regulator_has_full_constraints() from Max17135 EPD PMIC
initialization code, since leaving it enabled results in a failure of
system to load properly - key regulators are disabled when 'epdc' is added
to the kernel command line.

Signed-off-by: Danny Nold <dannynold@freescale.com>
11 years agoENGR00176366: MX6-Switch ARM_CLK to PLL2_400MHz when ARM freq is below 400MHz.
Ranjani Vaidyanathan [Wed, 7 Mar 2012 18:48:21 +0000 (12:48 -0600)]
ENGR00176366: MX6-Switch ARM_CLK to PLL2_400MHz when ARM freq is below 400MHz.

PLL1 can be disabled whenever ARM_CLK is below 400MHz since
ARM_CLK can be sourced from PLL2_PFD_400MHz.

Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
11 years agoENGR00178552 MX6XX_SABRESD: update pin mux for revB board.
Zhang Jiejing [Fri, 30 Mar 2012 10:33:17 +0000 (18:33 +0800)]
ENGR00178552 MX6XX_SABRESD: update pin mux for revB board.

update some pin mux of revB board.
fix i2c3 not work on sabre6q board, and change related pins.

Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
11 years agommc: block: fixed NULL pointer dereference
Jaehoon Chung [Wed, 13 Jul 2011 08:02:16 +0000 (17:02 +0900)]
mmc: block: fixed NULL pointer dereference

We already check for ongoing async transfers when handling discard
requests, but not in mmc_blk_issue_flush().  This patch fixes that
omission.

Tested with an SDHCI controller and eMMC4.41.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Per Forlin <per.forlin@linaro.org>
Cc: <stable@kernel.org>
Signed-off-by: Chris Ball <cjb@laptop.org>
11 years agoENGR00178505 [MX6]Enable performance and ondemand governor
Anson Huang [Fri, 30 Mar 2012 08:01:00 +0000 (16:01 +0800)]
ENGR00178505 [MX6]Enable performance and ondemand governor

Enable performance and ondemand governor for CPUFreq, but
default governor is still interactive.

Signed-off-by: Anson Huang <b20788@freescale.com>
11 years agoENGR00178456 IPUv3 fb:Unblank primary fb only by default
Liu Ying [Fri, 30 Mar 2012 01:22:00 +0000 (09:22 +0800)]
ENGR00178456 IPUv3 fb:Unblank primary fb only by default

This patch changes IPUv3 fb probe function logic to
unblank the primary fb only by default so that the
secondary fb using IPU DP BG channel won't be unblanked
when system boot-ups. This avoids the HDMI fb(as the
secondary fb using IPU DP BG channel) is unblanked
accidentally without plugging in HDMI cable.

Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
(cherry picked from commit 2c8188de61f84e40e26e662138af5ef4f81a0969)

11 years agoENGR00177932 - i.MX6 sabresd : Recorrect fec phy AR8031 rework.
Fugang Duan [Mon, 26 Mar 2012 09:30:24 +0000 (17:30 +0800)]
ENGR00177932 - i.MX6 sabresd : Recorrect fec phy AR8031 rework.

- i.MX6 sabresd board revA and revB adopt Atheros AR8031 phy.
  Recorrect the fec phy AR8031 rework.

Signed-off-by: Fugang Duan <B38611@freescale.com>
11 years agoENGR00178458 - WM8962 regulator constraint fix to prevent unwanted disable
Danny Nold [Fri, 30 Mar 2012 02:28:14 +0000 (21:28 -0500)]
ENGR00178458 - WM8962 regulator constraint fix to prevent unwanted disable

SPKVDD regulator was being disabled whenever EPDC was included in the
image, because the EPD PMIC initialization code includes an invocation
of regulator_has_full_constraints().  This causes all regulators with
zero ref count to be disabled as part of a late_initcall.  To prevent
this disable (which breaks ethernet and DHCP), set regulator to
have boot_on attribute, so that it will not be disabled at end of
driver loading sequence.

Signed-off-by: Danny Nold <dannynold@freescale.com>
11 years agoENGR00178128 mx6 pcie: pass PCIEX1 CT network card verifications
Richard Zhu [Wed, 15 Feb 2012 02:42:49 +0000 (10:42 +0800)]
ENGR00178128 mx6 pcie: pass PCIEX1 CT network card verifications

what're done:
* PCIE topology, RC should be on bus 0, EP should be on bus 1.
Root Cause: The CLASS_REV of RC CFG header, specified
by SPEC to be RO, should be set to PCI_CLASS_BRIDGE_PCIclass
* Added PCIE PWR EN and RESET
* iATU wrong configurations.
Root Cause: The outbounds excepted the CFG region0
should be removed. Otherwise, the memory ATU wouldn't
work correctly.
* CT DHCP hang
Root Cause: PLL8 is set to bypass mode when linux close fec,
and the PCIe ref clk would be broken by PLL8 bypass mode.
The parent clk of pcie ref clk is disabled by FEC, since
linux would try to disable the none-addressed NIC after DHCP.

Signed-off-by: Richard Zhu <r65037@freescale.com>
11 years agoENGR00177264 Merge vivante 4.6.6p2 kernel part code
Loren Huang [Wed, 28 Mar 2012 09:56:48 +0000 (17:56 +0800)]
ENGR00177264 Merge vivante 4.6.6p2 kernel part code

Merge vivante 4.6.6p2 kernel part code

Signed-off-by: Loren Huang <b02279@freescale.com>
Acked-by: Lily Zhang
11 years agoENGR00178290-2 mmc: sdhci: introduce QUIRK_BROKEN_AUTO_CMD23 for mx6
Dong Aisheng [Wed, 28 Mar 2012 07:58:48 +0000 (15:58 +0800)]
ENGR00178290-2 mmc: sdhci: introduce QUIRK_BROKEN_AUTO_CMD23 for mx6

We observed a few commands timeout when using auto cmd23.
The root cause is still unkonwn.
This patch is a workaround to not use auto cmd23 temporarily.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
11 years agoENGR00178290-1 Merge mmc: sdhci-esdhc-imx: Enable ADMA2
Dong Aisheng [Mon, 26 Mar 2012 03:23:22 +0000 (11:23 +0800)]
ENGR00178290-1 Merge mmc: sdhci-esdhc-imx: Enable ADMA2

Add auto cmd23 fix.

The original commit merged is: 97e4ba6a5
Subject: [PATCH 1/1] mmc: sdhci-esdhc-imx: Enable ADMA2

Eanble the ADMA2 mode for freescale esdhc imx driver, tested on MX25
3DS board, MX51 BBG board and MX53 LOCO board.

This patch is only used to enable the ADMA2 for MX51/53 platforms.
MX25/35 can't support the ADMA2 mode, set BROKEN_ADMA quirk on
MX25/35 platforms.

The ADMA mode supported or not can be distinguished by bit 20 of
the Capability Register (offset 0x40) in the FSL eSDHC module.

Signed-off-by: Richard Zhu <richard.zhu@linaro.org>
Tested-and-acked-by: Eric Miao <eric.miao@linaro.org>
Signed-off-by: Chris Ball <cjb@laptop.org>
Signed-off-by: Dong Aisheng <b29396@freescale.com>
11 years agoENGR00178302 IPUv3:Enable error interrupts defaultly
Liu Ying [Wed, 28 Mar 2012 10:40:21 +0000 (18:40 +0800)]
ENGR00178302 IPUv3:Enable error interrupts defaultly

This patch enables IPUv3 error interrupts defaultly.

Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
11 years agoENGR00178052 v4l2_capture:Correct multi-sensor uninstallation
Yuxi Sun [Tue, 27 Mar 2012 06:15:39 +0000 (14:15 +0800)]
ENGR00178052 v4l2_capture:Correct multi-sensor uninstallation

Point the current sensor to the right existent camera,
and remove the detached one

Signed-off-by: Yuxi Sun <b36102@freescale.com>
11 years agoENGR00177302 ASRC: change clock management
Chen Liangjun [Fri, 23 Mar 2012 12:22:01 +0000 (20:22 +0800)]
ENGR00177302 ASRC: change clock management

1 close clock when asrc is not working.
2 enable the asrc core clock when user sucessfully request an
  ASRC pair and disable it when the pair is release.So the call
  from ESAI using the p2p DMA mode can be support.

Signed-off-by: Chen Liangjun <b36089@freescale.com>
11 years agoENGR00178106 SabreSD: scan emmc slot sd4 firstly for mfgtools
Frank Li [Tue, 27 Mar 2012 10:04:54 +0000 (18:04 +0800)]
ENGR00178106 SabreSD: scan emmc slot sd4 firstly for mfgtools

Mfgtools want to emmc block device node is fixed mmcblk0.
Card in other slot is mmcblk1 or mmcblk2

Signed-off-by: Frank Li <Frank.Li@freescale.com>
11 years agoENGR00177756 usb-host: quit system suspend after usb remote wakeup occurs
Peter Chen [Fri, 23 Mar 2012 07:20:09 +0000 (15:20 +0800)]
ENGR00177756 usb-host: quit system suspend after usb remote wakeup occurs

If the usb remote wakeup occurs before bus(roothub) suspend, it can
stop the system suspend process, the patch adds handle error message
process for roothub.

If the remote wakeup occurs after bus(roothub) suspend, then
the suspend will go on suspending, and usb phy will fail to respond
wakeup signal.

This patch is suggested by: Alan Stern <stern@rowland.harvard.edu>
see: http://www.spinics.net/lists/linux-usb/msg58774.html

Signed-off-by: Peter Chen <peter.chen@freescale.com>
11 years agoENGR00177875 mx6: pm: disable USB VBUS wakeup to avoid vbus wake system
Peter Chen [Mon, 26 Mar 2012 01:40:25 +0000 (09:40 +0800)]
ENGR00177875 mx6: pm: disable USB VBUS wakeup to avoid vbus wake system

The USB VBUS wakeup should be disabled to avoid vbus wake system
up wrongly due to vbus comparator is closed at weak 2p5 mode.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
11 years agoENGR00177771 usb: usb wakeup enable should include both controller and phy
Peter Chen [Wed, 21 Mar 2012 08:49:40 +0000 (16:49 +0800)]
ENGR00177771 usb: usb wakeup enable should include both controller and phy

According to IC guys, it needs to enable/disable usb wakeup setting at
controller and phy side together.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
11 years agoENGR00178118-2 fix some build warnings when using GCC 4.6.2
Jason Liu [Tue, 27 Mar 2012 13:20:58 +0000 (21:20 +0800)]
ENGR00178118-2 fix some build warnings when using GCC 4.6.2

fix some build warnings when using GCC 4.6.2:

arch/arm/mach-mx6/board-mx6q_sabresd.c:1588:20:
warning: function declaration isn't a prototype [-Wstrict-prototypes]

This patch also fix the following section mismatch warnings:
The function imx6q_init_audio() references
the variable __initconst imx6_imx_ssi_data.
This is often because imx6q_init_audio lacks a __initconst
annotation or the annotation of imx6_imx_ssi_data is wrong.

Signed-off-by: Jason Liu <r64343@freescale.com>
11 years agoENGR00178118-1 fix some build warnings when using GCC 4.6.2
Jason Liu [Tue, 27 Mar 2012 13:20:27 +0000 (21:20 +0800)]
ENGR00178118-1 fix some build warnings when using GCC 4.6.2

fix some build warnings when using GCC 4.6.2:

drivers/cpufreq/cpufreq_interactive.c:127:6:
warning:'irq_count' may be used uninitialized in this function [-Wuninitialized]
drivers/media/video/mxc/output/mxc_vout.c:1346:5:
warning: 'ret' may be used uninitialized in this function [-Wuninitialized]
drivers/video/mxc/mxc_ipuv3_fb.c:1329:23:
warning: operation on 'mxc_fbi->cur_ipu_buf' may be undefined [-Wsequence-point]
drivers/video/mxc/mxc_ipuv3_fb.c:1376:24:
warning: operation on 'mxc_fbi->cur_ipu_buf' may be undefined [-Wsequence-point]
drivers/video/mxc/mxc_ipuv3_fb.c:1377:24:
warning: operation on 'mxc_fbi->cur_ipu_buf' may be undefined [-Wsequence-point]

Signed-off-by: Jason Liu <r64343@freescale.com>
11 years agoENGR00177058 mx6 sabreauto: enable tvin function
Tony Lin [Tue, 27 Mar 2012 11:18:14 +0000 (19:18 +0800)]
ENGR00177058 mx6 sabreauto: enable tvin function

set different gpr register due to mx6q or mx6dl

Signed-off-by: Tony Lin <tony.lin@freescale.com>
11 years agoENGR00178061 mx6 sabresd:fix GPIO warning when board boot up
make shi [Tue, 27 Mar 2012 08:27:09 +0000 (16:27 +0800)]
ENGR00178061 mx6 sabresd:fix GPIO warning when board boot up

Need add gpio_request before use gpio_direction_output

Signed-off-by: make shi <b15407@freescale.com>
11 years agoENGR00178031 IPUv3 FB:Fix a typo in a kernel log
Liu Ying [Tue, 27 Mar 2012 01:37:08 +0000 (09:37 +0800)]
ENGR00178031 IPUv3 FB:Fix a typo in a kernel log

This patch fixes a typo in a kernel log.

Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
11 years agoENGR00177983 mx6solo sabreauto: set hdmi display id before register device
Lily Zhang [Tue, 13 Mar 2012 10:47:50 +0000 (18:47 +0800)]
ENGR00177983 mx6solo sabreauto: set hdmi display id before register device

- Set the display ID of HDMI before registering HDMI
 device. HDMI is verified on RevA board
- Consolidate the codes about display devices

Signed-off-by: Lily Zhang <r58066@freescale.com>
11 years agoENGR00177856 Accelerometer support for ARD
Alejandro Sierra [Mon, 26 Mar 2012 22:16:50 +0000 (16:16 -0600)]
ENGR00177856 Accelerometer support for ARD

Accelerometer support for ARD RevA and RevB.

Signed-off-by: Alejandro Sierra <b18039@freescale.com>
11 years agoENGR00177944 v4l2 capture: enable mclk and power up when open camera
Yuxi Sun [Mon, 26 Mar 2012 09:57:45 +0000 (17:57 +0800)]
ENGR00177944 v4l2 capture: enable mclk and power up when open camera

Set mclk enable and power up camera when open camera, and disable
mclk, powerdown camera when close.

Signed-off-by: Yuxi Sun <b36102@freescale.com>
11 years agoENGR00177643: Add mlb initial code to mx6 ard board
Terry Lv [Thu, 22 Mar 2012 11:13:44 +0000 (19:13 +0800)]
ENGR00177643: Add mlb initial code to mx6 ard board

Add mlb initial code to mx6 ard board.

Signed-off-by: Terry Lv <r65388@freescale.com>
11 years agoENGR00177884-2 mx6q sabresd: config USB pin according to board
make shi [Mon, 26 Mar 2012 06:06:42 +0000 (14:06 +0800)]
ENGR00177884-2 mx6q sabresd: config USB pin according to board

Add ENET_RX_ER__ANATOP_USBOTG_ID iomux setting in head file.

Signed-off-by: make shi <b15407@freescale.com>
11 years agoENGR00177884-1 mx6q sabresd: config USB pin according to board
make shi [Mon, 26 Mar 2012 06:04:36 +0000 (14:04 +0800)]
ENGR00177884-1 mx6q sabresd: config USB pin according to board

- Configure USB pin and power control for mx6q sd board
- keep USB host1 VBUS always on for mx6q sd board
- set default USB OTG VBUS off for solo ARD board

Signed-off-by: make shi <b15407@freescale.com>
11 years agoENGR00177787 mx6 sabreauto: add light sensor isl29023 support
Lily Zhang [Mon, 12 Mar 2012 14:39:20 +0000 (22:39 +0800)]
ENGR00177787 mx6 sabreauto: add light sensor isl29023 support

Add light sensor isl29023 support

Signed-off-by: Lily Zhang <r58066@freescale.com>
11 years agoENGR00177589 USB: fix two USB common bug for i.MX6
Peter Chen [Wed, 14 Mar 2012 05:54:17 +0000 (13:54 +0800)]
ENGR00177589 USB: fix two USB common bug for i.MX6

- Without host wakeup enable, after doing system suspend/resume,
plug in usb cable(both host/device) with no response, the reason is
usb wakeup is not enable after suspend resume.
- clock refcount will not be 0 after usb enters low power mode,the
 reason is OTG ID wake up not do recover hcd.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
11 years agoENGR00176177-3 Enable interactive governor by default
Anson Huang [Fri, 23 Mar 2012 03:23:37 +0000 (11:23 +0800)]
ENGR00176177-3 Enable interactive governor by default

Set interactive governor as default governor.

Signed-off-by: Anson Huang <b20788@freescale.com>
11 years agoENGR00176177-2 Add irq count mechanism to interactive governor
Anson Huang [Mon, 19 Mar 2012 03:26:19 +0000 (11:26 +0800)]
ENGR00176177-2 Add irq count mechanism to interactive governor

Add irq count to CPUFreq as a freq change condition.
Because some devices' working mode is unable to issue
CPUFreq change because of low CPU loading, but the cpu
freq will impact these devices' performace significantly.

Interactive govervor will sample the cpu loading as well
as the irq count which is registered. If the
loading or the irq count exceed the threshold we set,
governor will issue an CPUFreq change request.

These devices' irq threshold and enable/disable can be modified
via /sys/devices/system/cpu/cpufreq/interactive/irq_scaling

echo 0xAABBBC to change the default setting as below
AA : irq number
BBB: threshold
C  :enable or disable

Currently only enable USDHC3, USDHC4, GPU, SATA and
USB by default, we can add device to the init struct which is
located in arch/arm/mach-mx6/irq.c.

Signed-off-by: Anson Huang <b20788@freescale.com>
11 years agoENGR00176177-1 Add irq count mechanism to interactive governor
Anson Huang [Mon, 19 Mar 2012 02:41:10 +0000 (10:41 +0800)]
ENGR00176177-1 Add irq count mechanism to interactive governor

Add irq count to CPUFreq as a freq change condition.
Because some devices' working mode is unable to issue
CPUFreq change because of low CPU loading, but the cpu
freq will impact these devices' performace significantly.

Interactive govervor will sample the cpu loading as well
as the irq count which is registered. If the
loading or the irq count exceed the threshold we set,
governor will issue an CPUFreq change request.

These devices' irq threshold and enable/disable can be modified
via /sys/devices/system/cpu/cpufreq/interactive/irq_scaling

echo 0xAABBBC to change the default setting as below
AA : irq number
BBB: threshold
C  :enable or disable

Currently only enable USDHC3, USDHC4, GPU, SATA and
USB by default, we can add device to the init struct which is
located in arch/arm/mach-mx6/irq.c.

Signed-off-by: Anson Huang <b20788@freescale.com>
11 years agoENGR00177745-2 Add interactive cpufreq governor
Anson Huang [Fri, 23 Mar 2012 03:21:30 +0000 (11:21 +0800)]
ENGR00177745-2 Add interactive cpufreq governor

cpufreq: interactive: New 'interactive' governor

This governor is designed for latency-sensitive workloads, such as
interactive user interfaces.  The interactive governor aims to be
significantly more responsive to ramp CPU quickly up when CPU-intensive
activity begins.

Existing governors sample CPU load at a particular rate, typically
every X ms.  This can lead to under-powering UI threads for the period of
time during which the user begins interacting with a previously-idle system
until the next sample period happens.

The 'interactive' governor uses a different approach. Instead of sampling
the CPU at a specified rate, the governor will check whether to scale the
CPU frequency up soon after coming out of idle.  When the CPU comes out of
idle, a timer is configured to fire within 1-2 ticks.  If the CPU is very
busy from exiting idle to when the timer fires then we assume the CPU is
underpowered and ramp to MAX speed.

If the CPU was not sufficiently busy to immediately ramp to MAX speed, then
the governor evaluates the CPU load since the last speed adjustment,
choosing the highest value between that longer-term load or the short-term
load since idle exit to determine the CPU speed to ramp to.

A realtime thread is used for scaling up, giving the remaining tasks the
CPU performance benefit, unlike existing governors which are more likely to
schedule rampup work to occur after your performance starved tasks have
completed.

The tuneables for this governor are:
/sys/devices/system/cpu/cpufreq/interactive/min_sample_time:
    The minimum amount of time to spend at the current frequency before
    ramping down. This is to ensure that the governor has seen enough
    historic CPU load data to determine the appropriate workload.
/sys/devices/system/cpu/cpufreq/interactive/go_maxspeed_load
    The CPU load at which to ramp to max speed.

Signed-off-by: Anson Huang <b20788@freescale.com>
11 years agoENGR00177745-1 Add interactive cpufreq governor
Anson Huang [Mon, 19 Mar 2012 01:55:46 +0000 (09:55 +0800)]
ENGR00177745-1 Add interactive cpufreq governor

cpufreq: interactive: New 'interactive' governor

This governor is designed for latency-sensitive workloads, such as
interactive user interfaces.  The interactive governor aims to be
significantly more responsive to ramp CPU quickly up when CPU-intensive
activity begins.

Existing governors sample CPU load at a particular rate, typically
every X ms.  This can lead to under-powering UI threads for the period of
time during which the user begins interacting with a previously-idle system
until the next sample period happens.

The 'interactive' governor uses a different approach. Instead of sampling
the CPU at a specified rate, the governor will check whether to scale the
CPU frequency up soon after coming out of idle.  When the CPU comes out of
idle, a timer is configured to fire within 1-2 ticks.  If the CPU is very
busy from exiting idle to when the timer fires then we assume the CPU is
underpowered and ramp to MAX speed.

If the CPU was not sufficiently busy to immediately ramp to MAX speed, then
the governor evaluates the CPU load since the last speed adjustment,
choosing the highest value between that longer-term load or the short-term
load since idle exit to determine the CPU speed to ramp to.

A realtime thread is used for scaling up, giving the remaining tasks the
CPU performance benefit, unlike existing governors which are more likely to
schedule rampup work to occur after your performance starved tasks have
completed.

The tuneables for this governor are:
/sys/devices/system/cpu/cpufreq/interactive/min_sample_time:
    The minimum amount of time to spend at the current frequency before
    ramping down. This is to ensure that the governor has seen enough
    historic CPU load data to determine the appropriate workload.
/sys/devices/system/cpu/cpufreq/interactive/go_maxspeed_load
    The CPU load at which to ramp to max speed.

Signed-off-by: Anson Huang <b20788@freescale.com>
11 years agoENGR00177757 Fix suspend/resume issue when enable localtimer
Anson Huang [Fri, 23 Mar 2012 06:08:51 +0000 (14:08 +0800)]
ENGR00177757 Fix suspend/resume issue when enable localtimer

Need to disable localtimer's PPI when suspend, or ARM core
will run into exception when resume.

Signed-off-by: Anson Huang <b20788@freescale.com>
11 years agoENGR00177748 pfuze100 mx6q_sabreSD: keep VGEN4 and VGEN5 always on
Robin Gong [Fri, 23 Mar 2012 05:59:10 +0000 (13:59 +0800)]
ENGR00177748 pfuze100 mx6q_sabreSD: keep VGEN4 and VGEN5 always on

To enable regulator_has_full_constraints when kernel boot, some regulator
be kept on always, from SabreSD schematic, VGEN4 and VGEN5 of pfuze100 should
be on forever.

Signed-off-by: Robin Gong <B38343@freescale.com>
11 years agoENGR00177851 HDMI fix hotpug race condition
Alan Tull [Fri, 23 Mar 2012 21:06:35 +0000 (16:06 -0500)]
ENGR00177851 HDMI fix hotpug race condition

hotplug_worker can't assume that the iahb_clk is enabled if the
irq_enabled flag is set.

Signed-off-by: Alan Tull <r80115@freescale.com>
11 years agoENGR00177716 i.mx Sabreauto : SD Card on Mainboard initialisation and read error
Prabhu Sundararaj [Thu, 22 Mar 2012 19:35:54 +0000 (14:35 -0500)]
ENGR00177716 i.mx Sabreauto : SD Card on Mainboard initialisation and read error

SD Card in main board takes a long route hence with Drive Speed High 80 OHMS
causing error. Per suggestion DSE 40 OHMS is used.

Signed-off-by: Prabhu Sundararaj <b36876@freescale.com>
11 years agoENGR00177780 mx6dl sabresd: add USB support for RevB board
Lily Zhang [Fri, 23 Mar 2012 10:02:40 +0000 (18:02 +0800)]
ENGR00177780 mx6dl sabresd: add USB support for RevB board

- Configure USB_OTG_PWR_EN PIN as GPIO
- Configure GPR1 bit 13 to select "usb_otg_id" as
 ENET_RX_ER
- To make USBOTG work on RevB board, HW rework is required.

Signed-off-by: Lily Zhang <r58066@freescale.com>
Signed-off-by: Tony LIU <junjie.liu@freescale.com>
11 years agoENGR00177737-2: add HDMI sii902x support in mx6q-arm2
Hake Huang [Fri, 23 Mar 2012 02:57:37 +0000 (10:57 +0800)]
ENGR00177737-2: add HDMI sii902x support in mx6q-arm2

test with
video=mxcfb0:dev=sii902x_hdmi,1024x768M@60,if=RGB24 disable_mipi_dsi

Note:
1. currently we use the same ipu setting port with on chip HDMI,
if we need coexist need change the on chip HDMI ipu settings.
2. need remove MIPI DSI initial with 'disable_mipi_dsi' in kernel command line,
as mipi dsi reset will reset on board sii902x as well.
3. change the I2C2 work at 100K not 400K, to be compatible with EDID spec.
4. the side effect is that Sii902x will have to use "sii902x_hdmi",
instead of "hdmi" as before

Signed-off-by: Hake Huang <b20222@freescale.com>
11 years agoENGR00177737-1 change the drv name to sii902x_hdmi
Hake Huang [Fri, 23 Mar 2012 02:55:55 +0000 (10:55 +0800)]
ENGR00177737-1 change the drv name to sii902x_hdmi

so that system can use 2 type of HDMI device driver sii902x and on chip one

Signed-off-by: Hake Huang <b20222@freescale.com>
11 years agoENGR00177581-3 WM8962: add wm8962 codec driver
Gary Zhang [Fri, 23 Mar 2012 08:50:45 +0000 (16:50 +0800)]
ENGR00177581-3 WM8962: add wm8962 codec driver

add wm8962 audio codec driver

Signed-off-by: Gary Zhang <b13634@freescale.com>
11 years agoENGR00177581-2 MX6_SABRESD: add wm8962 support
Gary Zhang [Thu, 22 Mar 2012 02:15:04 +0000 (10:15 +0800)]
ENGR00177581-2 MX6_SABRESD: add wm8962 support

add wm8962 codec support on sabresd revB

Signed-off-by: Gary Zhang <b13634@freescale.com>
11 years agoENGR00177581-1 MX6: add wm8962 in defconfig
Gary Zhang [Thu, 22 Mar 2012 02:12:29 +0000 (10:12 +0800)]
ENGR00177581-1 MX6: add wm8962 in defconfig

add wm8962 codec option in imx6_defconfig file

Signed-off-by: Gary Zhang <b13634@freescale.com>
11 years agomxc: hdmi: fix potention deadlock issue
Jason Chen [Tue, 27 Dec 2011 08:12:07 +0000 (16:12 +0800)]
mxc: hdmi: fix potention deadlock issue

Signed-off-by: Jason Chen <jason.chen@linaro.org>
11 years agoENGR00177310-4 i.mx6 sabresd: change fb_data sequence
Lily Zhang [Tue, 13 Mar 2012 10:47:50 +0000 (18:47 +0800)]
ENGR00177310-4 i.mx6 sabresd: change fb_data sequence

i.mx6dl only support one single IPU, up to 2 displays.
change fb_data sequence for i.mx6dl support.

The following command options can be used for the display
tests on i.mx6dl sabresd boards.
- HDMI:
 video=mxcfb0:dev=hdmi,1920x1080M@60,if=RGB24
- LVDS0:
 None or ldb=sin0, ldb=sep0
- LVDS1:
 ldb=sep1
- SEIKO-WVGA:
 video=mxcfb0:dev=lcd,SEIKO-WVGA,if=RGB24
- CLAA-WVGA:
 video=mxcfb0:dev=lcd,CLAA-WVGA,if=RGB565
- HDMI + LVDS0:
 video=mxcfb0:dev=hdmi,1920x1080M@60,if=RGB24 ldb=sin0
 (or ldb=sep0)
 echo 0 > /sys/class/graphics/fb2/blank
- HDMI + LVDS1:
 video=mxcfb0:dev=hdmi,1920x1080M@60,if=RGB24 ldb=sep1 (sin1
 is not supported)
 echo 0 > /sys/class/graphics/fb2/blank
- LVDS0 + LVDS1:
 none
 echo 0 > /sys/class/graphics/fb2/blank

Signed-off-by: Lily Zhang <r58066@freescale.com>
11 years agoENGR00177310-3 v4l2 capture: enable mclk when open function
Lily Zhang [Tue, 13 Mar 2012 10:47:50 +0000 (18:47 +0800)]
ENGR00177310-3 v4l2 capture: enable mclk when open function

Enable mclk when opening v4l2 capture device and disable
mclk when closing v4l2 capture device.
If mclk is disabled when operating MIPI camera, the test
is failed.

Signed-off-by: Lily Zhang <r58066@freescale.com>
11 years agoENGR00177310-2 mx6 clock: change _clk_clko_round_rate
Lily Zhang [Tue, 13 Mar 2012 10:47:50 +0000 (18:47 +0800)]
ENGR00177310-2 mx6 clock: change _clk_clko_round_rate

Change _clk_clko_round_rate and ensure the clock should
be less than the input rate.

Signed-off-by: Lily Zhang <r58066@freescale.com>
11 years agoENGR00177310-1 i.mx6dl sabresd: add camera support
Lily Zhang [Tue, 13 Mar 2012 10:47:50 +0000 (18:47 +0800)]
ENGR00177310-1 i.mx6dl sabresd: add camera support

Add camera support into i.mx6dl sabreasd board.

Signed-off-by: Lily Zhang <r58066@freescale.com>
11 years agoENGR00177359 - EPDC fb: Add EPDC support to SabreSD board
Danny Nold [Wed, 21 Mar 2012 04:01:53 +0000 (23:01 -0500)]
ENGR00177359 - EPDC fb: Add EPDC support to SabreSD board

- Change EPDC pad groups to have one for EPDC enable and one
for EPDC disable.
- Add EPDC and Maxim 17135 structures and functions to SabreSD
board file.  Code pulled in with minimal change from ARM2 board
file.
  One exception: Had to remove regulator_has_full_constraints()
  from max17135_regulator_init() to prevent PFUZE from disabling
  regulators and removing power from the board at the end of
  kernel initialization.

Signed-off-by: Danny Nold <dannynold@freescale.com>
11 years agoENGR00177098 HMDI mmap support in isr could underflow
Alan Tull [Fri, 16 Mar 2012 17:26:48 +0000 (12:26 -0500)]
ENGR00177098 HMDI mmap support in isr could underflow

Take out mmap functionality.

Signed-off-by: Alan Tull <r80115@freescale.com>
11 years agoENGR00177048 Merge vivante 4.6.6 kernel part code
Loren Huang [Fri, 16 Mar 2012 07:29:06 +0000 (15:29 +0800)]
ENGR00177048 Merge vivante 4.6.6 kernel part code

Merge vivante 4.6.6 kernel part code

Signed-off-by: Loren Huang <b02279@freescale.com>
Acked-by: Lily Zhang
11 years agoENGR00171874 fix ASRC noise bug for i.MX6
Chen Liangjun [Wed, 21 Mar 2012 05:19:05 +0000 (13:19 +0800)]
ENGR00171874 fix ASRC noise bug for i.MX6

Solve the ASRC noise:
1 change the DMA mode from normal mode to loop mode.
2 use dma_alloc_coherent alloc dma buffer instead of kzalloc.

Signed-off-by: Chen Liangjun <b36089@freescale.com>
11 years agoENGR00176299-4 usb host suspend/resume can't work randomly
Tony LIU [Fri, 16 Mar 2012 08:05:42 +0000 (16:05 +0800)]
ENGR00176299-4 usb host suspend/resume can't work randomly

driver part

Signed-off-by: Tony LIU <junjie.liu@freescale.com>
11 years agoENGR00176299-3 usb host suspend/resume can't work randomly
Tony LIU [Wed, 7 Mar 2012 07:57:01 +0000 (15:57 +0800)]
ENGR00176299-3 usb host suspend/resume can't work randomly

head file part

Signed-off-by: Tony LIU <junjie.liu@freescale.com>
11 years agoENGR00176299-2 usb host suspend/resume can't work randomly
Tony LIU [Wed, 7 Mar 2012 07:55:32 +0000 (15:55 +0800)]
ENGR00176299-2 usb host suspend/resume can't work randomly

usb core part

Signed-off-by: Tony LIU <junjie.liu@freescale.com>
11 years agoENGR00176299-1 usb host suspend/resume can't work randomly
Tony LIU [Wed, 7 Mar 2012 07:53:56 +0000 (15:53 +0800)]
ENGR00176299-1 usb host suspend/resume can't work randomly

MSL part
- after suspend bit is set, we need to set PWD bit and
  clear it right now to let PHY know the state change
- after suspend bit is set, disconnect detection should be
  clear
- after set resume bit, disconnect detection should be set
  after 30 ms
- IC issue PDM refer to
  TKT092876
  TKT092872

Signed-off-by: Tony LIU <junjie.liu@freescale.com>
11 years agoENGR00177083-6 i.mx6: sabresd: change gpio configuration
Lily Zhang [Tue, 13 Mar 2012 10:47:50 +0000 (18:47 +0800)]
ENGR00177083-6 i.mx6: sabresd: change gpio configuration

- add gpio configuration according to revB schematic
- reorder gpio configuration by gpio group

Signed-off-by: Lily Zhang <r58066@freescale.com>
11 years agoENGR00177083-5 i.mx6: sabresd: add initial i.mx6dl support
Lily Zhang [Tue, 13 Mar 2012 10:47:50 +0000 (18:47 +0800)]
ENGR00177083-5 i.mx6: sabresd: add initial i.mx6dl support

This patch adds the initial i.mx6dl support for sabre
smart device board. i.mx6dl and i.mx6q share the same
board due to pin to pin compatible.

Signed-off-by: Lily Zhang <r58066@freescale.com>
11 years agoENGR00177083-4 i.mx6: sabresd: add i.mx6dl pad table
Lily Zhang [Tue, 13 Mar 2012 10:14:20 +0000 (18:14 +0800)]
ENGR00177083-4 i.mx6: sabresd: add i.mx6dl pad table

Add i.mx6dl pad table

Signed-off-by: Robby Cai <R63905@freescale.com>
Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Lily Zhang <r58066@freescale.com>
11 years agoENGR00177083-3 i.mx6: sabresd: move the pad table to board head file
Lily Zhang [Tue, 13 Mar 2012 08:59:22 +0000 (16:59 +0800)]
ENGR00177083-3 i.mx6: sabresd: move the pad table to board head file

move the pad table to board head file

Signed-off-by: Lily Zhang <r58066@freescale.com>
11 years agoENGR00177083-2 i.mx6: sabresd: move pfuse declaration to common.h
Lily Zhang [Tue, 13 Mar 2012 08:48:53 +0000 (16:48 +0800)]
ENGR00177083-2 i.mx6: sabresd: move pfuse declaration to common.h

- Move mx6q_sabresd_init_pfuze100 to common.h
- Delete the declarations which are already in common.h

Signed-off-by: Lily Zhang <r58066@freescale.com>
11 years agoENGR00177083-1 i.mx6: sabresd: remove the prefix MX6Q from gpio definition
Lily Zhang [Tue, 13 Mar 2012 08:42:34 +0000 (16:42 +0800)]
ENGR00177083-1 i.mx6: sabresd: remove the prefix MX6Q from gpio definition

Since i.mx6q and i.mx6sdl share the same sabreauto board, the
gpio is the same. Remove the MX6Q_ prefix from gpio defintion to
avoid the confusion which may think it is MX6Q specific.

Signed-off-by: Lily Zhang <r58066@freescale.com>
11 years agoENGR00177186 - MX6 : modify board_is_mx6_xxx macro.
Fugang Duan [Mon, 19 Mar 2012 12:35:30 +0000 (20:35 +0800)]
ENGR00177186 - MX6 : modify board_is_mx6_xxx macro.

- Redefine MX6 board revision ID, and modify the following macros
  to make codes readable.
  board_is_mx6_reva()
  board_is_mx6_revb()
  board_is_mx6_revc()

Signed-off-by: Fugang Duan <B38611@freescale.com>
11 years agoENGR00177154 solo sabreauto: config USB pin according to board
make shi [Mon, 19 Mar 2012 09:41:14 +0000 (17:41 +0800)]
ENGR00177154 solo sabreauto: config USB pin according to board

config the USB pin and power control for ARD board

Signed-off-by: make shi <b15407@freescale.com>
11 years agoENGR00177082 mx6 sabreauto: enable NAND by default
Allen Xu [Mon, 19 Mar 2012 05:47:38 +0000 (13:47 +0800)]
ENGR00177082 mx6 sabreauto: enable NAND by default

The default sabreauto code enabled BT_WiFi via NAND_BT_WIFI_STEER,
change it to enable NAND as default.

Signed-off-by: Allen Xu <allen.xu@freescale.com>
11 years agoENGR00177046: Add the platform dependency for PXP in Kconfig
Robby Cai [Fri, 16 Mar 2012 03:40:02 +0000 (11:40 +0800)]
ENGR00177046: Add the platform dependency for PXP in Kconfig

If there's no dependency, build will be broken when do
`make ARCH=arm CROSS_COMPILE=<cross-compiler path> allmodconfig'
`make'
because PXP module will be turned on. This patch fixed it.

Signed-off-by: Robby Cai <R63905@freescale.com>
11 years agoENGR00175884 System resume failed when the power key was pressed shortly
Lin Fuzhen [Thu, 1 Mar 2012 10:52:09 +0000 (18:52 +0800)]
ENGR00175884 System resume failed when the power key was pressed shortly

Some platform like Android needs to get the power key event to
reume the other devcies such as FB, TS. System resume failed when
the gpio power key was pressed shortly sometime, but can resume the
by long press the power key.

The root cause of this issue is that the GPIO IRQ is registered as device
IRQ, but device IRQs will just be enabled after early resume finished,
so when the power key press shortly, the gpio-irq may still disabled in that
time, and the ISR will be ignored and could not detect the key down event.

To fix this bug, add the IRQF_EARLY_RESUME flag to the irq if platform
has specified that the button can wake up the system , in this way, this
irq will be enabled during syscore resume, so that the power key press
can be handled and reported as early as possible.

Signed-off-by: Lin Fuzhen <fuzhen.lin@freescale.com>
11 years agoENGR00176974 MX6Q: make 624M WP work, change 624 WP to 672 WP
Zhang Jiejing [Thu, 15 Mar 2012 09:09:40 +0000 (17:09 +0800)]
ENGR00176974 MX6Q: make 624M WP work, change 624 WP to 672 WP

since pll1 have a limit that cannot scaling down to 650M and below
so change the 600M WP to 672MHz.

otherwise, the 600WP's clock will depens on last frequency.

Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
11 years agoENGR00176808 system crashes if switching between PAL & NTSC
Tony Lin [Wed, 14 Mar 2012 02:34:11 +0000 (10:34 +0800)]
ENGR00176808 system crashes if switching between PAL & NTSC

it's a video out issue instead of camera/tvin.
the queue list and active list should be cleared in stream off function.

Signed-off-by: Tony Lin <tony.lin@freescale.com>
11 years agoENGR00176812-11 mx6 sabreauto: remove section mismatch warning
Lily Zhang [Fri, 9 Mar 2012 16:36:47 +0000 (00:36 +0800)]
ENGR00176812-11 mx6 sabreauto: remove section mismatch warning

Remove the followinig section mismatch warning
WARNING: vmlinux.o(.text+0x1bdf8): Section mismatch in
reference from the function gpmi_nand_platform_init() to
the (unknown reference) .init.data:(unknown)
The function gpmi_nand_platform_init() references
the (unknown reference) __initdata (unknown).
This is often because gpmi_nand_platform_init lacks a __initdata
annotation or the annotation of (unknown) is wrong.

Signed-off-by: Lily Zhang <r58066@freescale.com>
11 years agoENGR00176812-10 mx6solo sabreauto: change display for single IPU
Lily Zhang [Mon, 12 Mar 2012 12:58:54 +0000 (20:58 +0800)]
ENGR00176812-10 mx6solo sabreauto: change display for single IPU

mx6solo only supports single IPU, up to 2 display
by default. So (ARRAY_SIZE(sabr_fb_data) + 1 )/ 2
fb devices are registered. The board configuration
is:
HDMI: ipu-0, di-1
ldb: ipu-0, di-0, sec_ipu-0, sec_di-1, LDB_SEP0

Signed-off-by: Wayne Zou <b36644@freescale.com>
Signed-off-by: Lily Zhang <r58066@freescale.com>
11 years agoENGR00176812-9 mx6 sabreauto: add revB board support
Adrian Alonso [Fri, 9 Mar 2012 21:52:02 +0000 (15:52 -0600)]
ENGR00176812-9 mx6 sabreauto: add revB board support

* mx6 sabreauto revB include a steering logic
  circuit that enables the route path for i2c3_sda signal.
  This patch enables i2c3_sda route to fix io-expander
  read/write errors and additional devices connected to
  the i2c3 bus.
* mx6 sabreauto revB board uses atheors fec phy.
* Set GPIO_16 as input for IEEE-1588 ts_clk and RMII
  reference clk

Signed-off-by: Adrian Alonso <aalonso@freescale.com>
11 years agoENGR00176812-8 mx6 sabreauto: add board_is_mx6_xxx macro
Lily Zhang [Mon, 12 Mar 2012 13:36:28 +0000 (21:36 +0800)]
ENGR00176812-8 mx6 sabreauto: add board_is_mx6_xxx macro

Add the following macros to make codes readable.
board_is_mx6_sabreauto_reva()
board_is_mx6_sabreauto_revb()

Signed-off-by: Lily Zhang <r58066@freescale.com>
11 years agoENGR00176812-7 mx6 sabreauto: remove MX6Q_PAD_EIM_EB2__GPIO_2_30
Lily Zhang [Fri, 9 Mar 2012 13:48:57 +0000 (21:48 +0800)]
ENGR00176812-7 mx6 sabreauto: remove MX6Q_PAD_EIM_EB2__GPIO_2_30

- EIM_EB2 is used as I2C2_SCL instead of GPIO for SPI
NOR for RevA board
- Use CONFIG_MTD_M25P80 to control SPI NOR code only

Signed-off-by: Lily Zhang <r58066@freescale.com>
11 years agoENGR00176812-6 i.mx: sabreauto: add initial i.mx6solo support
Jason Liu [Thu, 8 Mar 2012 10:59:50 +0000 (18:59 +0800)]
ENGR00176812-6 i.mx: sabreauto: add initial i.mx6solo support

This patch adds the initial i.mx6solo support for this sabreauto board.
i.mx6dl and i.mx6q share the same board due to pin to pin compatible.

Signed-off-by: Jason Liu <r64343@freescale.com>
Signed-off-by: Lily Zhang <r58066@freescale.com>
11 years agoENGR00176812-5 i.mx6: sabreauto: add the i.mx6solo pad table
Jason Liu [Thu, 8 Mar 2012 09:47:31 +0000 (17:47 +0800)]
ENGR00176812-5 i.mx6: sabreauto: add the i.mx6solo pad table

Add the i.mx6solo pad table

Signed-off-by: Jason Liu <r64343@freescale.com>
Signed-off-by: Lily Zhang <r58066@freescale.com>
11 years agoENGR00176812-4 i.mx6: sabreauto: move all the pad table to board head file
Jason Liu [Thu, 8 Mar 2012 09:42:59 +0000 (17:42 +0800)]
ENGR00176812-4 i.mx6: sabreauto: move all the pad table to board head file

Just move the pad table out of the board file, no function change

Signed-off-by: Jason Liu <r64343@freescale.com>
11 years agoENGR00176812-3 i.mx6: sabreauto: move some declarations to common.h
Jason Liu [Thu, 8 Mar 2012 09:22:51 +0000 (17:22 +0800)]
ENGR00176812-3 i.mx6: sabreauto: move some declarations to common.h

Need move some declarations to common.h to avoid each user
individully declare it in their own .c file. This can make
the code clean and also avoid the duplication.

Signed-off-by: Jason Liu <r64343@freescale.com>
11 years agoENGR00176812-2 i.mx6: sabreauto: remove the prefix MX6Q from gpio definition
Jason Liu [Thu, 8 Mar 2012 09:11:31 +0000 (17:11 +0800)]
ENGR00176812-2 i.mx6: sabreauto: remove the prefix MX6Q from gpio definition

Since i.mx6q and i.mx6sdl share the same sabreauto board, the
gpio is the same. Remove the MX6Q_ prefix from gpio defintion to
avoid the confusion which may think it is MX6Q specific.

This patch also make the GPIO definion sorted by GPIO_NR

Signed-off-by: Jason Liu <r64343@freescale.com>
11 years agoENGR00176812-1 i.mx6: sabreauto: cosmetic code alignment and spaces
Jason Liu [Thu, 8 Mar 2012 08:29:29 +0000 (16:29 +0800)]
ENGR00176812-1 i.mx6: sabreauto: cosmetic code alignment and spaces

This patch is only used for cosmetic, no code
function changes

Signed-off-by: Jason Liu <r64343@freescale.com>
11 years agoENGR00176921:gpu-viv: set outstanding request number for all chips that using gc320
Wu Guoxing [Thu, 15 Mar 2012 02:54:26 +0000 (10:54 +0800)]
ENGR00176921:gpu-viv: set outstanding request number for all chips that using gc320

this needs by all the chips(6dl, 6dq) that using gc320

this is vivante's IP bug, that when set outstanding number bigger than
16, it will have a chance for gc320 to dead lock the axi bus, which will
lead to system hang.
also, as our chip can only support axi outstanding of 8(for 6dl) and 4(6dq),
this change have no performance impact.

Signed-off-by: Wu Guoxing <b39297@freescale.com>
Acked-by: Lily Zhang