Bjorn Helgaas [Wed, 7 Nov 2012 22:53:33 +0000 (15:53 -0700)]
Merge branch 'pci/taku-prt-cleanup' into next
* pci/taku-prt-cleanup:
PCI/ACPI: Request _OSC control before scanning PCI root bus
PCI: Don't pass pci_dev to pci_ext_cfg_avail()
PCI/ACPI: Add _PRT interrupt routing info before enumerating devices
ACPI: Pass segment/bus to _PRT add/del so they don't depend on pci_bus
Bjorn Helgaas [Wed, 7 Nov 2012 22:53:29 +0000 (15:53 -0700)]
Merge branch 'pci/yinghai-for-pci-root-bus-hotplug' into next
* pci/yinghai-for-pci-root-bus-hotplug:
PCI/ACPI: Remove acpi_root_driver in reverse order
PCI/ACPI: Delete host bridge _PRT during hot remove path
PCI/ACPI: Make acpi_pci_root_remove() stop/remove pci root bus
PCI: Add pci_stop_and_remove_root_bus()
PCI/ACPI: Assign unassigned resource for hot-added root bus
PCI: Move out pci_enable_bridges out of assign_unsigned_bus_res
PCI: Move pci_rescan_bus() back to probe.c
PCI: Separate out pci_assign_unassigned_bus_resources()
Bjorn Helgaas [Wed, 7 Nov 2012 22:53:24 +0000 (15:53 -0700)]
Merge branch 'pci/misc' into next
* pci/misc:
x86/PCI: Allow x86 platforms to use translation offsets
PCI/PM: Add comments for PME poll support for PCIe
PCI: Add PLX PCI 9050 workaround for some Meilhaus DAQ cards
PCI: Add workaround for PLX PCI 9050 BAR alignment erratum
PCI: Convert dev_printk(KERN_<LEVEL> to dev_<level>(
x86/PCI: Ignore _SEG on HP xw9300
PCI: Don't touch card regs after runtime suspend D3
Mike Yoknis [Wed, 7 Nov 2012 22:52:20 +0000 (15:52 -0700)]
x86/PCI: Allow x86 platforms to use translation offsets
The memory range descriptors in the _CRS control method contain an address
translation offset for host bridges. This value is used to translate
addresses across the bridge. The support to use _TRA values is present for
other architectures but not for X86 platforms.
For existing X86 platforms the _TRA value is zero. Non-zero _TRA values
are expected on future X86 platforms. This change will register that value
with the resource.
Signed-off-by: Mike Yoknis <mike.yoknis@hp.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Mike Yoknis [Tue, 6 Nov 2012 21:42:04 +0000 (15:42 -0600)]
x86/PCI: Allow x86 platforms to use translation offsets
The memory range descriptors in the _CRS control method contain an address
translation offset for host bridges. This value is used to translate
addresses across the bridge. The support to use _TRA values is present for
other architectures but not for X86 platforms.
For existing X86 platforms the _TRA value is zero. Non-zero _TRA values
are expected on future X86 platforms. This change will register that value
with the resource.
Signed-off-by: Mike Yoknis <mike.yoknis@hp.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Huang Ying [Fri, 26 Oct 2012 05:07:51 +0000 (13:07 +0800)]
PCI/PM: Add comments for PME poll support for PCIe
There are comments on why PME poll support is necessary for PCI
devices, but not for PCIe devices. That may lead to misunderstanding
that PME poll is only necessary for PCI devices. So add comments
related to PCIe PME poll to make it more clear.
The content of comments comes from the changelog of commit:
Ian Abbott [Mon, 29 Oct 2012 14:40:18 +0000 (14:40 +0000)]
PCI: Add PLX PCI 9050 workaround for some Meilhaus DAQ cards
The Meilhaus ME-2000i and ME-2600i data acquisition cards supported by
the Comedi "me_daq" driver use the PLX PCI 9050 PCI Target bridge chip
affected by the bug that prevents the chip's local configuration
registers being read from BAR0 or BAR1 base addresses that are an odd
multiple of 128 bytes. Use the PLX PCI 9050 quirk handler for these
devices to re-allocate affected regions to a 256-byte boundary.
Signed-off-by: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Ian Abbott [Tue, 30 Oct 2012 17:25:53 +0000 (17:25 +0000)]
PCI: Add workaround for PLX PCI 9050 BAR alignment erratum
The PLX PCI 9050 PCI Target bridge controller has a bug that prevents
its local configuration registers being read through BAR0 (memory) or
BAR1 (i/o) if the base address lies on an odd 128-byte boundary, i.e. if
bit 7 of the base address is non-zero. This bug is described in the PCI
9050 errata list, version 1.4, May 2005. It was fixed in the
pin-compatible PCI 9052, which can be distinguished from the PCI 9050 by
checking the revision in the PCI header, which is hard-coded for these
chips.
Workaround the problem by re-allocating the affected regions to a
256-byte boundary. Note that BAR0 and/or BAR1 may have been disabled
(size 0) during initialization of the PCI chip when its configuration is
read from a serial EEPROM.
Currently, the fix-up has only been used for devices with the default
vendor and device ID of the PLX PCI 9050. The PCI 9052 shares the same
default device ID as the PCI 9050 but they have different PCI revision
codes.
Signed-off-by: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Bjorn Helgaas [Mon, 29 Oct 2012 23:26:54 +0000 (17:26 -0600)]
x86/PCI: Ignore _SEG on HP xw9300
The xw9300 BIOS supplies _SEG methods that are incorrect, which results
in some LSI SCSI devices not being discovered. This adds a quirk to
ignore _SEG on this machine and default to zero.
When the BIOS "ACPI Bus Segmentation" option is enabled (as it is by
default), the _SEG methods of the PCI1 and PCI2 bridges return 1 and 2,
respectively. However, the BIOS implementation appears to be incomplete,
and we can't enumerate devices in those domains.
But if we assume PCI1 and PCI2 really lead to buses in domain 0,
everything works fine. Windows XP and Vista also seem to ignore
these _SEG methods.
Reference: http://bugs.debian.org/cgi-bin/bugreport.cgi?bug=543308
Reference: https://bugzilla.kernel.org/show_bug.cgi?id=15362 Reported-and-Tested-by: Sean M. Pappalardo <pegasus@renegadetech.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Dave Airlie [Mon, 29 Oct 2012 23:26:54 +0000 (17:26 -0600)]
PCI: Don't touch card regs after runtime suspend D3
If the driver takes care of state saving, don't touch any registers on it.
Optimus (dual-gpu) laptops seem to have their own form of D3cold, but
unfortunately enter it on normal D3 transitions via the ACPI callback.
So when we use runtime PM to transition to D3, the card disappears off
the PCI bus, however we then try to access registers on it in the
runtime suspend finish, which really doesn't work.
This patch checks whether the pci state is saved and doesn't attempt to hit
any registers after that point if it is.
(Looks okay to Rafael)
Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Sathya Perla [Tue, 6 Nov 2012 17:48:59 +0000 (17:48 +0000)]
be2net: fix access to SEMAPHORE reg
The SEMAPHORE register was being accessed from the csr BAR space. This BAR
may not be available in some Skyhawk-R configurations. Instead, access this
register via the PCI config space (it's available there too).
Signed-off-by: Sathya Perla <sathya.perla@emulex.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Sathya Perla [Tue, 6 Nov 2012 17:48:58 +0000 (17:48 +0000)]
be2net: re-factor bar mapping code
1) separate NIC and roce bar mapping code
2) parse sli_intf::if_type inside be_map_pci_bars() as if_type must be
used only to identify bars.
3) Use pci_iomap/unmap() routines
Signed-off-by: Sathya Perla <sathya.perla@emulex.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Eric Sandeen [Tue, 9 Oct 2012 19:11:45 +0000 (14:11 -0500)]
xfs: report projid32bit feature in geometry call
When xfs gained the projid32bit feature, it was never added to
the FSGEOMETRY ioctl feature flags, so it's not queryable without
this patch.
Signed-off-by: Eric Sandeen <sandeen@redhat.com> Reviewed-by: Carlos Maiolino <cmaiolino@redhat.com> Reviewed-by: Dave Chinner <dchinner@redhat.com> Signed-off-by: Ben Myers <bpm@sgi.com>
Dave Chinner [Fri, 2 Nov 2012 00:38:44 +0000 (11:38 +1100)]
xfs: fix reading of wrapped log data
Commit 4439647 ("xfs: reset buffer pointers before freeing them") in
3.0-rc1 introduced a regression when recovering log buffers that
wrapped around the end of log. The second part of the log buffer at
the start of the physical log was being read into the header buffer
rather than the data buffer, and hence recovery was seeing garbage
in the data buffer when it got to the region of the log buffer that
was incorrectly read.
Cc: <stable@vger.kernel.org> # 3.0.x, 3.2.x, 3.4.x 3.6.x Reported-by: Torsten Kaiser <just.for.lkml@googlemail.com> Signed-off-by: Dave Chinner <dchinner@redhat.com> Reviewed-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Mark Tinguely <tinguely@sgi.com> Signed-off-by: Ben Myers <bpm@sgi.com>
Dave Chinner [Fri, 2 Nov 2012 03:23:12 +0000 (14:23 +1100)]
xfs: fix buffer shudown reference count mismatch
When we shut down the filesystem, we have to unpin and free all the
buffers currently active in the CIL. To do this we unpin and remove
them in one operation as a result of a failed iclogbuf write. For
buffers, we do this removal via a simultated IO completion of after
marking the buffer stale.
At the time we do this, we have two references to the buffer - the
active LRU reference and the buf log item. The LRU reference is
removed by marking the buffer stale, and the active CIL reference is
by the xfs_buf_iodone() callback that is run by
xfs_buf_do_callbacks() during ioend processing (via the bp->b_iodone
callback).
However, ioend processing requires one more reference - that of the
IO that it is completing. We don't have this reference, so we free
the buffer prematurely and use it after it is freed. For buffers
marked with XBF_ASYNC, this leads to assert failures in
xfs_buf_rele() on debug kernels because the b_hold count is zero.
Fix this by making sure we take the necessary IO reference before
starting IO completion processing on the stale buffer, and set the
XBF_ASYNC flag to ensure that IO completion processing removes all
the active references from the buffer to ensure it is fully torn
down.
Cc: <stable@vger.kernel.org> Signed-off-by: Dave Chinner <dchinner@redhat.com> Reviewed-by: Mark Tinguely <tinguely@sgi.com> Signed-off-by: Ben Myers <bpm@sgi.com>
This buggy patch was a feature fix and has reached most stable
branches.
When skb->sk is NULL and when packet fanout is used, there is a
crash in match_fanout_group where skb->sk is accessed.
This patch fixes the issue by returning false as soon as the
socket is NULL: this correspond to the wanted behavior because
the kernel as to resend the skb to all the listening socket in
this case.
Signed-off-by: Eric Leblond <eric@regit.org> Signed-off-by: David S. Miller <davem@davemloft.net>
Paolo Valente [Mon, 5 Nov 2012 20:29:24 +0000 (20:29 +0000)]
pkt_sched: enable QFQ to support TSO/GSO
If the max packet size for some class (configured through tc) is
violated by the actual size of the packets of that class, then QFQ
would not schedule classes correctly, and the data structures
implementing the bucket lists may get corrupted. This problem occurs
with TSO/GSO even if the max packet size is set to the MTU, and is,
e.g., the cause of the failure reported in [1]. Two patches have been
proposed to solve this problem in [2], one of them is a preliminary
version of this patch.
This patch addresses the above issues by: 1) setting QFQ parameters to
proper values for supporting TSO/GSO (in particular, setting the
maximum possible packet size to 64KB), 2) automatically increasing the
max packet size for a class, lmax, when a packet with a larger size
than the current value of lmax arrives.
The drawback of the first point is that the maximum weight for a class
is now limited to 4096, which is equal to 1/16 of the maximum weight
sum.
Finally, this patch also forcibly caps the timestamps of a class if
they are too high to be stored in the bucket list. This capping, taken
from QFQ+ [3], handles the unfrequent case described in the comment to
the function slot_insert.
Signed-off-by: Paolo Valente <paolo.valente@unimore.it> Tested-by: Cong Wang <amwang@redhat.com> Acked-by: Stephen Hemminger <shemminger@vyatta.com> Acked-by: Stephen Hemminger <shemminger@vyatta.com> Signed-off-by: David S. Miller <davem@davemloft.net>
projects / karo-tx-linux.git / log