Kumar Gala [Fri, 17 Oct 2008 02:58:50 +0000 (21:58 -0500)]
85xx: Using proper I2C source clock divider for MPC8544
The MPC8544 RM incorrect shows the SEC_CFG bit in PORDEVSR2 as being
bit 26, instead it should be bit 28. This caused in incorrect
interpretation of the i2c_clk which is the same as the SEC clk on
MPC8544. The SEC clk is controlled by cfg_sec_freq that is reported
in PORDEVSR2.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The fix introduced by this patch is not correct. The problem is
that the documentation is not correct for the MPC8544 with regards
to which bit in PORDEVSR2 is for the SEC_CFG.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Jason Jin [Wed, 15 Oct 2008 02:40:24 +0000 (10:40 +0800)]
Fix the function conflict in x86emu when DEBUG is on
The function parse_line() in common/main.c was exposed globally by commit 6636b62a6efc7f14e6e788788631ae7a7fca4537, Result in conflict with the same
name funciton in drivers/bios_emulator/x86emu/debug.c when define the DEBUG.
This patch fix this by renaming the function in the debug.c file.
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Selvamuthukumar [Thu, 9 Oct 2008 04:59:14 +0000 (10:29 +0530)]
mpc83xx: wait till UPM completes the write to array
Reference manual states that MxMR[MAD] increment is the indication
of write to UPM array is complete. Honour that. Also, make the dummy
write explicit.
also fix the comment.
Signed-off-by: Selvamuthukumar <selva.muthukumar@e-coninfotech.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Peter Tyser [Wed, 1 Oct 2008 17:25:04 +0000 (12:25 -0500)]
cmd_i2c: Fix help for CONFIG_I2C_CMD_TREE && !CONFIG_I2C_MULTI_BUS
Original code displayed:
=> help i2c
i2c i2c speed [speed] - show or set I2C bus speed
i2c md chip address[.0, .1, .2] [# of objects] - read from I2C device
...
Jason Jin [Fri, 10 Oct 2008 03:41:01 +0000 (11:41 +0800)]
Do not init SATA when disabled on 8536DS.
SGMII and SATA share the serdes on MPC8536 CPU, When SATA disabled and the
driver still try to access the SATA registers, the cpu will hangup.
This patch try to fix this by reading the serdes status before the SATA
initialize.
Signed-off-by: Jason Jin <Jason.jin@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com>
fsl_diu: fix alignment error that caused malloc corruption
When aligning malloc()ed screen_base, invalid offset was added.
This not only caused misaligned result (which did not cause hardware
misbehaviour), but - worse - caused screen_base + smem_len to
be out of malloc()ed space, which in turn caused breakage of
futher malloc()/free() operation.
This patch fixes screen_base alignment.
Also this patch makes memset() that cleans framebuffer to be executed
on first initialization of diu, not only on re-initialization. It looks
correct to clean the framebuffer instead of displaying random garbage;
I believe that was disabled only because that memset caused breakage
of malloc/free described above - which no longer happens with the fix
described above.
Signed-off-by: Nikita V. Youshchenko <yoush@debian.org>
Mike Frysinger [Tue, 14 Oct 2008 11:04:38 +0000 (07:04 -0400)]
cmd_spi: remove broken signed casting for display
Since we're working with unsigned data, you can't apply a signed pointer
cast and then attempt to print the result. Otherwise you get wrong output
when the sign bit is set like "0xFF" incorrectly extended to "0xFFFFFFFF".
Jason Jin [Fri, 19 Sep 2008 09:32:49 +0000 (17:32 +0800)]
Fix the NAND size overflow issue.
When the total size of all NAND devices exceeds 4 GiB, the size will
overflow. This patch tries to fix this.
Note that we still have a problem when a single NAND device is bigger
than 4 GiB: then the overflow would actually happen earlier, i. e.
when storing the size in nand_info[].size, as nand_info[].size is an
"u_int32_t".
Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Wolfgang Denk <wd@denx.de>
get_prom function was used __attriute__ , but it is not enable.
ax88796.o does not do link besides ne2000.o. When ld is carried
out, get_prom function of ax88796.c is ignored.
This problem is a thing by specifications of ld.
I checked and test this patch on SuperH and MIPS.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
85xx: Using proper I2C source clock divider for MPC8544
Measurements with our MPC8544 board showed that the I2C bus frequency
is wrong by a factor of 1.5. Obviously, the interpretation of the
MPC85xx_PORDEVSR2_SEC_CFG bit of the cfg_sec_freq register is not
correct. There seems to be an error in the 8544 RM.
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Rafal Czubak [Wed, 8 Oct 2008 11:41:30 +0000 (13:41 +0200)]
FSL: Fix get_cpu_board_revision() return value.
get_cpu_board_revision() returned board revision based on information stored
in global static struct eeprom. It should instead use one from local struct
board_eeprom, to which the data is actually read from EEPROM. The bug led to
system hang after printing L1 cache information on U-Boot startup. The problem
was observed on MPC8555CDS system and possibly affects other Freescale MPC85xx
boards using CFG_I2C_EEPROM_CCID.
The change has been successfully tested on MPC8555CDS system.
Switch to the standard CFG_HZ=1000 value, while at it, minor white-space
cleanup, remove CFG_CLKS_IN_HZ from config-headers. Tested on mx31ads,
provides 2% or 0.4% precision depending on the
CONFIG_MX31_TIMER_HIGH_PRECISION flag. Measured with stop-watch on 100s
boot-delay.
Adam Graham [Mon, 6 Oct 2008 17:16:13 +0000 (10:16 -0700)]
ppc4xx: Reset and relock memory DLL after SDRAM_CLKTR change
After changing SDRAM_CLKTR phase value rerun the memory preload
initialization sequence (INITPLR) to reset and relock the memory
DLL. Changing the SDRAM_CLKTR memory clock phase coarse timing
adjustment effects the phase relationship of the internal, to the
PPC chip, and external, to the PPC chip, versions of MEMCLK_OUT.
Signed-off-by: Adam Graham <agraham@amcc.com> Signed-off-by: Victor Gallardo <vgallardo@amcc.com> Signed-off-by: Stefan Roese <sr@denx.de>
Jason Jin [Sat, 27 Sep 2008 06:40:57 +0000 (14:40 +0800)]
Fix the incorrect DDR clk freq reporting on 8536DS
On 8536DS board, When the DDR clk is set async mode(SW3[6:8] != 111),
The display is still sync mode DDR freq. This patch try to fix
this. The display DDR freq is now the actual freq in both
sync and async mode.
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
David Gibson [Wed, 20 Aug 2008 06:55:14 +0000 (16:55 +1000)]
libfdt: Add function to explicitly expand aliases
Kumar has already added alias expansion to fdt_path_offset().
However, in some circumstances it may be convenient for the user of
libfdt to explicitly get the string expansion of an alias. This patch
adds a function to do this, fdt_get_alias(), and uses it to implement
fdt_path_offset().
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Mike Frysinger [Thu, 2 Oct 2008 05:55:38 +0000 (01:55 -0400)]
cfi_flash: do not reset flash when probe fails
The CFI flash driver starts at flash_init() which calls down into
flash_get_size(). This starts by calling flash_detect_cfi(). If said
function fails, flash_get_size() finishes by attempting to reset the
flash. Unfortunately, it does this with an info->portwidth set to 0x10
which filters down into flash_make_cmd() and that happily smashes the
stack by sticking info->portwidth bytes into a cfiword_t variable that
lives on the stack. On a 64bit system you probably won't notice, but
killing the last 8 bytes on a 32bit system usually leads to a corrupt
return address. Which is what happens on a Blackfin system.
Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Stefan Roese <sr@denx.de>
Jon Loeliger [Thu, 25 Sep 2008 16:02:17 +0000 (11:02 -0500)]
Fix an overflow case in fdt_offset_ptr() detected by GCC 4.3.
Using Gcc 4.3 detected this problem:
../dtc/libfdt/fdt.c: In function 'fdt_next_tag':
../dtc/libfdt/fdt.c:82: error: assuming signed overflow does not
occur when assuming that (X + c) < X is always false
To fix the problem, treat the offset as an unsigned int.
The problem report and proposed fix were provided
by Steve Papacharalambous <stevep@freescale.com>.
David Gibson [Fri, 29 Aug 2008 04:19:13 +0000 (14:19 +1000)]
libfdt: Fix bugs in fdt_get_path()
The current implementation of fdt_get_path() has a couple of bugs,
fixed by this patch.
First, contrary to its documentation, on success it returns the length
of the node's path, rather than 0. The testcase is correspondingly
wrong, and the patch fixes this as well.
Second, in some circumstances, it will return -FDT_ERR_BADOFFSET
instead of -FDT_ERR_NOSPACE when given insufficient buffer space.
Specifically this happens when there is insufficient space even to
hold the path's second last component. This behaviour is corrected,
and the testcase updated to check it.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Kim Phillips [Wed, 24 Sep 2008 13:46:25 +0000 (08:46 -0500)]
mpc83xx: don't disable autoboot
bootdelay set to -1 'permanently' disables autobooting, even if
bootcmd is specified. Change to a positive value to allow
autobooting when a bootcmd is set.
Reported-by: Coray Tate <Coray.Tate@freescale.com> Cc: Scott Wood <scottwood@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Kim Phillips [Tue, 23 Sep 2008 14:38:49 +0000 (09:38 -0500)]
mpc83xx: add h/w flash protection to board configs
the operating system may leave flash in a h/w locked state after writing.
This allows u-boot to continue to write flash by enabling h/w unlocking
by default.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Anton Vorontsov [Thu, 11 Sep 2008 17:35:36 +0000 (21:35 +0400)]
mpc83xx: spd_sdram: fix ddr sdram base address assignment bug
The spd_dram code shifts the base address, then masks 20 bits, but
forgets to shift the base address back. Fix this by just masking the
base address correctly.
Found this bug while trying to relocate a DDR memory at the base != 0.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Stefan Roese [Mon, 22 Sep 2008 14:10:43 +0000 (16:10 +0200)]
ppc4xx: Canyonlands: Remove unnecessary FDT warning upon DTB fixup
Depending on the configuration jumper "SATA SELECT", U-Boot disabled
either one PCIe node or the SATA node in the device tree blob. This
patch removes the unnecessary and even confusing warning, when the node
is not found at all.
Wolfgang Denk [Mon, 22 Sep 2008 20:23:06 +0000 (22:23 +0200)]
Fix DPRAM memory leak when CFG_ALLOC_DPRAM is defined, which
eventually leads to a machine check. This change assures that DPRAM
is allocated only once in that case.
Signed-off-by: Gary Jennejohn <garyj@denx.de> Signed-off-by: Wolfgang Denk <wd@denx.de>
Running mtest command on socrates without specifying
an address range crashes the board. This patch changes
default mtest address range to prevent this behavior.
Currently U-Boot crashes after relocation to RAM.
Changing the CPO value of the DDR SDRAM TIMING_CFG_2
register to READ_LAT + 1 (to the value it was before
conversion of socrates to new DDR code) fixes the
problem.
sh: Add support any page size and empty_zero_page to SH Linux uImage
Old U-Boot supported 4KB page size only. If this version, Linux
kernel can not get command line from U-Boot.
SH Linux kernel can change page size and empty_zero_page.
This patch support this function and fix promlem.
Peter Tyser [Tue, 16 Sep 2008 15:04:47 +0000 (10:04 -0500)]
Support for multiple SGMII/TBI interfaces for TSEC ethernet
Fix TBI PHY accesses to use the proper offset in CPU register space. The
previous code would incorrectly access the TBI PHY by reading/writing to CPU
register space at the same location as would be used to access external PHYs.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Acked-by: Andy Fleming <afleming@freescale.com>
This patch is an attempt to implement autoprobing for the Lime
presence on the bus.
Configure GPCM for Lime CS2 and try to access chip ID registers.
Second read atempt delivers register values if the chip is present.
projects / karo-tx-uboot.git / log