Shengzhou Liu [Fri, 14 Oct 2011 08:26:06 +0000 (16:26 +0800)]
powerpc/85xx: Update USB device tree status based on pin settings
For P3060 and P4080, USB pins are multiplexed with other functions.
Update the device tree status for USB ports based on setting of
RCW[EC1] & RCW[EC2] which describe if pins are muxed to usb.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Shengzhou Liu [Fri, 14 Oct 2011 08:26:05 +0000 (16:26 +0800)]
fdt: Add new fdt_set_node_status & fdt_set_status_by_alias helpers
Add common function fdt_set_node_status() to assist in various locations
that we set a nodes status. This function utilizes the status values
that are part of the EPAPR spec (on power.org).
fdt_set_status_by_alias() is based on fdt_set_node_status() but uses an
alias string to identify the node to update.
We also add some shortcut functions to help the common cases of setting
"okay" and "disabled":
Finally, we fixup the corenet_ds ethernet code which previously had
a function by the same name that can be replaced with the new helpers.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com>
Kumar Gala [Fri, 14 Oct 2011 18:28:52 +0000 (13:28 -0500)]
powerpc/85xx: Add support for RMan LIODN initialization
This patch is intended to initialize RMan LIODN related registers on
P2041, P304S and P5020 SocS. It also adds the "rman@0" child node to
qman-portal nodes, adds "fsl,liodn" property to RMan inbound block nodes.
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Fri, 14 Oct 2011 05:01:23 +0000 (00:01 -0500)]
powerpc/85xx: Update setting of SRIO LIODNs
Properly set the LIODN values associated with SRIO controller. On
P4080/P3060 we have an LIODN per port and one for the RMU. On
P2041/P3041/P5020 we have 2 LIODNs per port.
Update the tables for all of these devices to properly handle both
styles.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Fri, 14 Oct 2011 08:17:56 +0000 (03:17 -0500)]
fm: Don't allow disabling of FM1-DTSEC1
The MDIO controller to talk to external PHYs is on FM1-DTSEC1 so don't
allow disabling. If we disable it we end up powering the block down in
the SoC and thus can't communicate to any external PHYs.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Thu, 13 Oct 2011 19:55:59 +0000 (14:55 -0500)]
fm-eth: Don't mark the MAC we use for MDIO as disabled in device tree
FM1-DTSEC1's MAC was being marked as disabled if the port was not
configured based on the SoC configuration. However we utilize the MAC
interface for MDIO and thus should NOT mark it disabled.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Simon Glass [Mon, 10 Oct 2011 08:55:19 +0000 (08:55 +0000)]
Move timestamp and version files into 'generated' subdir
There is a rather subtle build problem where the build time stamp is not
updated for out-of-tree builds if there exists an in-tree build which
has a valid timestamp file. So if you do an in-tree build, then an
out-of-tree build your timestamp will not change.
The correct timestamp_autogenerated.h lives in the object tree, but it
is not always found there. The source still lives in the source tree and
when compiling version.h, it includes timestamp_autogenerated.h. Since
the current directory is always searched first, this will come from the
source tree rather than the object tree if it exists there. This affects
dependency generation also, which means that common/cmd_version.o will not
even be rebuilt if you have ever done an in-tree build.
A similar problem exists with the version file.
This change moves both files into the 'generated' subdir, which is already
used for asm-offsets.h. Then timestamp.h and version.h are updated to
include the files from there.
There are other places where these generated files are included, but I
cannot see why these don't just use the timestamp.h and version.h headers.
So this change also tidies that up.
I have tested this with in- and out-of-tree builds, but not SPL. I have
looked at various other options for fixing this, including sed on the dep
files, -I- and -include flags to gcc, but I don't think they can be made
to work. Comments welcome.
Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Mike Frysinger <vapier@gentoo.org>
Simon Glass [Mon, 3 Oct 2011 19:26:50 +0000 (19:26 +0000)]
sandbox: Makefile changes to build sandbox architecture
At this point U-Boot will build and run on x86 under Linux.
The idea is to define a new architecture called 'sandbox', alongside ARM
and x86. This runs natively on Linux to suit the host machine. All
hardware access is either omitted or emulated.
The purpose of this system is to test the bulk of the non-hardware-specific
U-Boot code. We can mock the SPI flash, GPIOs, UART and keyboard, then test
that U-Boot behaves as we wish.
Simon Glass [Fri, 7 Oct 2011 13:53:49 +0000 (13:53 +0000)]
Adjust dependency rules to permit per-file flags
The dependency rules are currently done in a shell 'for' loop. This does not
permit Makefile variables to adjust preprocessor flags as is done with normal
compile flags, using the CFLAGS_path/file.o syntax.
This change moves the dependency generation into the Makefile itself, and
permits a CPPFLAGS_path/file.o to adjust preprocessor flags on a file or
directory basis.
The CPPFLAGS_... variable is also folded into CFLAGS during the build.
Simon Glass [Mon, 3 Oct 2011 19:26:46 +0000 (19:26 +0000)]
sandbox: Add serial uart
This uart simply writes to stdout and reads from stdin. We might imagine
instead buffering the data so that a test interface can check output and
inject input.
Simon Glass [Sat, 17 Sep 2011 06:48:51 +0000 (06:48 +0000)]
sandbox: Force command sections to be 4-byte aligned
By default sections are 16-byte aligned on some architectures, but the
command name structure (struct cmd_tbl_s) does not have padding to
16 bytes. This reduces the alignment to 4-bytes so that the command
table can be accessed correctly on any architecture.
Jason Hobbs [Wed, 31 Aug 2011 15:37:30 +0000 (10:37 -0500)]
Add pxe command
Add pxe command, which is intended to mimic PXELINUX functionality.
'pxe get' uses tftp to retrieve a file based on UUID, MAC address or IP
address. 'pxe boot' interprets the contents of PXELINUX config like file
to boot using a specific initrd, kernel and kernel command line.
This patch also adds a README.pxe file - see it for more details on the
pxe command.
Signed-off-by: Jason Hobbs <jason.hobbs@calxeda.com>
Jason Hobbs [Tue, 23 Aug 2011 11:06:52 +0000 (11:06 +0000)]
Add isblank
Existing ctype checks are implemented using a 256 byte lookup table,
allowing each character to be in any of 8 character classes. Since there
are 8 existing character classes without the blank class, I implemented
isblank without using the lookup table. Since there are only two blank
characters - tab and space - this is a more reasonable approach than
doubling the size of the lookup table to accommodate one more class.
Signed-off-by: Jason Hobbs <jason.hobbs@calxeda.com>
Jason Jin [Thu, 25 Aug 2011 07:46:43 +0000 (15:46 +0800)]
DM9000:Add a byte swap macro for dm9000 io operation.
commit a45dde2293c816138e53c26eca6fd0322583f9a6 changed the dm9000
direct register access to standard IO. This should work
on the ColdFire platform as there are corresponding macros for
the LE devices. But the hardware settings on some ColdFire boards had
swapped the byte order which make the original macros such as out_le16
cannot work. To avoid changing the common io access code on ColdFire
platform, the DM9000_BYTE_SWAPPED define was added to make the dm9000 use
__raw* IO access on some ColdFire boards.
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Helmut Raiger [Wed, 12 Oct 2011 23:16:29 +0000 (23:16 +0000)]
video: Moving mx3fb.c to CONFIG_VIDEO
mx3fb.c was based on CONFIG_LCD and is moved by this patch to
CONFIG_VIDEO, which has greater freedom in selecting videomodes
even at runtime.
This renders the accumulating list of display defines
(CONFIG_DISPLAY_VBEST..., CONFIG_DISPLAY_C057...) obsolete as
these may be setup through env variables:
This commit also fixes the board config files for qong and
imx31_phycore boards as needed. The videomode settings of
previously supported displays are added to CONFIG_EXTRA_ENV_SETTINGS
now. CONFIG_SYS_MALLOC_LEN for imx31_phycore board is increased
to make the frame buffer allocation working with the changed
driver.
Helmut Raiger [Wed, 12 Oct 2011 21:08:30 +0000 (23:08 +0200)]
mx31: make HSP clock for mx3fb driver available
This additionally updates mx31/generic.c by
- replacing __REG() macro accesses with readl() and writel()
- providing macros for PDR0 and PLL bit accesses
Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> Acked-by: Marek Vasut <marek.vasut@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Anatolij Gustschin <agust@denx.de>
The framebuffer driver for MX5 is based on CONFIG_LCD.
In the current implementation, there is a serious bug
because the required memory is allocated before
relocation, but the driver knows only later which is
the resolution of the display. The patch switches the driver
to CONFIG_VIDEO and the memory is allocated by the driver itself.
We also need to switch the vision2 board code and config file
in the same commit so that this commit will be bisectable.
Mike Frysinger [Mon, 17 Oct 2011 05:38:58 +0000 (05:38 +0000)]
powerpc: cpm2 boards: update fcc register logic
In the recent dropping of !NET_MULTI code (commit e2a53458a7ab37523304),
I misread the logic in include/net.h. Some of it was used by NET_MULTI
code as glue between the multi/non-multi worlds for cpm2 boards.
Rather than restore the block of code, push the logic to the board config
headers where it all belongs.
zlib: handle overflow while calculating available stream input size
If compressed data is located in sectors at the end of the flash and
it's offset + input stream size > 0xFFFFFFFF, the uncompressing time
is very long, since processing of the stream is done bytewise (and
not blockwise) due to overflow in inflate_fast() while calculation
and checking for enough input available.
Check for this overflow condition and limit the available stream
input size to the actually max. possible input size. This fixes
the problem.
The issue is easily reproduceable by placing a gziped bitmap in flash,
e.g. at FFF80000, and running 'bmp' commands like 'bmp info FFF80000'
or 'bmp display FFF80000'. The uncompressing can take up to 3 sec.
whereas it should normaly take a fraction of a second. If the
'splashimage' environment variable points to this address, the
booting time also increases significantly.
Mike Frysinger [Thu, 13 Oct 2011 06:54:57 +0000 (06:54 +0000)]
punt unused clean/distclean targets
The top level Makefile does not do any recursion into subdirs when
cleaning, so these clean/distclean targets in random arch/board dirs
never get used. Punt them all.
MAKEALL didn't report any errors related to this that I could see.
common: fix missing function pointer relocation in fixup_cmdtable()
The command auto-completion does not work on architectures relying
on CONFIG_NEEDS_MANUAL_RELOC like MIPS. Cause is the missing function
pointer fixup for cmd_tbl_t::complete function in fixup_cmdtable().
This patch adds the missing pointer fixup in case of CONFIG_AUTO_COMPLETE
is defined.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
A delay of approximately 250 ms after PCI bus reset in
pci_mpc5xxx_init() is needed to recognize the Coral-PA
controller on the graphic extention board.
pci: move pcidelay code to new location just before PCI bus scan
PCI cards might need some time after reset to respond. On some
boards (mpc5200 or mpc8260 based) the PCI bus reset is deasserted
at pci_init_board() time, so we currently can not use available
"pcidelay" option for waiting before PCI bus scan since this
waiting takes place before calling pci_init_board(). By moving
the pcidelay code to the new location using of the "pcidelay"
option is possible on mpc5200 or mpc8260 based boards, too.
Since pci_hose_scan() could be called multiple times, restrict
the function to wait only during its first call and to ignore
pcidelay for any further call (as pointed out by Matthias).
Wolfgang Denk [Sat, 15 Oct 2011 20:00:01 +0000 (22:00 +0200)]
Merge branch 'master' of git://git.denx.de/u-boot-fdt
* 'master' of git://git.denx.de/u-boot-fdt:
powerpc/85xx: use fdt_create_phandle() to create the Fman firmware phandles
fdt: update fdt_alloc_phandle to use fdt_get_phandle
fdt: check for fdt errors in fdt_create_phandle
fdt: Add a do_fixup_by_path_string() function
Timur Tabi [Tue, 20 Sep 2011 23:24:36 +0000 (18:24 -0500)]
powerpc/85xx: use fdt_create_phandle() to create the Fman firmware phandles
Function fdt_create_phandle() conveniently creates new phandle properties
using both "linux,phandle" and "phandle", so it should be used by all code
that wants to create a phandle.
The Fman firmware code, which embeds an Fman firmware into the device tree,
was creating the phandle properties manually. Instead, change it to use
fdt_create_phandle().
Timur Tabi [Tue, 20 Sep 2011 23:24:35 +0000 (18:24 -0500)]
fdt: update fdt_alloc_phandle to use fdt_get_phandle
The device tree compiler, dtc, can use "phandle" and/or "linux,phandle"
properties to specify the phandle for any node. By default, it uses
both, but "linux,phandle" is deprecated. One day, we'd like to stop using
"linux,phandle", but U-boot needs to support both properties equally
first.
fdt_alloc_phandle() generates a unique phandle, but it was only checking
the "linux,phandle" properties. Instead, we use fdt_get_phandle(),
which checks both properties automatically. This ensures that we
support dtbs that only use "phandle".
The side-effect is that fdt_alloc_phandle() now takes twice as long, since
it has to check for two properties instead of one in each node that it
searches.
Timur Tabi [Tue, 20 Sep 2011 23:24:34 +0000 (18:24 -0500)]
fdt: check for fdt errors in fdt_create_phandle
fdt_create_phandle() was ignoring errors from fdt_set_phandle(). If an
error occurs, print an error message and return 0, which is an invalid
phandle. We also need to change the return type for fdt_create_phandle()
to indicate that it cannot return an error code.
Chunhe Lan [Wed, 31 Aug 2011 02:36:32 +0000 (10:36 +0800)]
fdt: Add a do_fixup_by_path_string() function
The do_fixup_by_path_string() will set the specified node's property to the
value contained in "status". It would just be an inline wrapper for
do_fixup_by_path() that calls strlen on the argument.
Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
Kumar Gala [Wed, 12 Oct 2011 20:52:08 +0000 (15:52 -0500)]
powerpc/85xx: Drop CONFIG_VIDEO on P1_P2_RDB-PC boards to reduce size
With older compilers (gcc-4.2.x) we run into issues that resulting image
is too large. We can save a bunch of space by removing the video support.
In general video support on these boards is a nice to have since it
requires a PCIe add-on card.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
chenhui zhao [Thu, 13 Oct 2011 05:40:59 +0000 (13:40 +0800)]
powerpc/mpc8548cds: Code cleanup and refactoring
- Rework tlb and law tables.
- PCI2 is not available on MPC8548CDS, so remove it.
- Move the memory map to the board config file.
- Rewrite the board info according to the manual.
- Remove unnecessary macros and redefine some macros to align with other boards.
- Fix some typos.
Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Haiying Wang [Wed, 28 Sep 2011 14:51:14 +0000 (10:51 -0400)]
powerpc/p3041: fixup portal config info
P3041 has 10 qman portals, we need to configure all of them:
* As there are only 4 physical cores sdest can only be 0 to 3
* We assign dqrr & frame data LIODNs for all portals so if they
are utilized the proper mapping tables can be setup uniquely
(PAMU stashing)
* We set Portal 6-10 to LIODN offsets 1-5 as the global LIODN
assignments are tuned around an assumption of at most 5
partitions.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Haiying Wang [Wed, 28 Sep 2011 14:51:13 +0000 (10:51 -0400)]
powerpc/p2041: fixup portal config info
P2041 has 10 qman portals, we need to configure all of them:
* As there are only 4 physical cores sdest can only be 0 to 3
* We assign dqrr & frame data LIODNs for all portals so if they
are utilized the proper mapping tables can be setup uniquely
(PAMU stashing)
* We set Portal 6-10 to LIODN offsets 1-5 as the global LIODN
assignments are tuned around an assumption of at most 5
partitions.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Haiying Wang [Wed, 28 Sep 2011 14:51:15 +0000 (10:51 -0400)]
powerpc/p5020: fixup portal config info
P5020 has 10 qman portals, we need to configure all of them:
* As there are only 2 physical cores sdest can only be 0 or 1
* We assign dqrr & frame data LIODNs for all portals so if they
are utilized the proper mapping tables can be setup uniquely
(PAMU stashing)
* We set Portal 6-10 to LIODN offsets 1-5 as the global LIODN
assignments are tuned around an assumption of at most 5
partitions.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Wolfgang Denk [Wed, 12 Oct 2011 20:45:30 +0000 (22:45 +0200)]
Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx
* 'master' of git://git.denx.de/u-boot-ppc4xx:
ppc4xx: Change DDR2 CL from 4 to 5 for intip
ppc4xx: Improve lm63 pwm on dlvision-10g
ppc4xx: Do not stop booting on any keypress on intip
Wolfgang Denk [Wed, 12 Oct 2011 20:42:28 +0000 (22:42 +0200)]
Merge branch 'master' of git://git.denx.de/u-boot-microblaze
* 'master' of git://git.denx.de/u-boot-microblaze:
microblaze: Copy bootfile from variables
microblaze: Fix unaligned.h for endians
microblaze: Initialize jumptable and console
microblaze: Support flashes on lower addresses
microblaze: Call common console_init_f initialization function
This Jz4740-based clamshell device does not use NOR flash to boot.
The initial bring-up assumes that U-Boot is directly loaded into SDRAM
using USB boot tool, and starts from 0x80100000.
About USB boot tool
-------------------
Jz4740 is one of the XBurst processors with USB boot functionality
supported. The CPU can boot from a small ROM in the LSI, initialize
CPU and USB module, then wait for USB commands from the USB host.
We can send 8 KB binary data to the CPU cache using USB boot tool.
USB boot tool is available to the public at Ingenic website. Also
there is an alternative Debian package named xburst-tools.
Signed-off-by: Xiangfu Liu <xiangfu@openmobilefree.net> Acked-by: Daniel <zpxu@ingenic.cn> Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
Xiangfu Liu [Wed, 12 Oct 2011 04:24:06 +0000 (12:24 +0800)]
MIPS: Jz4740: Add NAND driver
Jz4740 NAND flash controller can support:
* MLC NAND as well as SLC NAND
* all 8-bit/16-bit NAND flash devices
* HAMMING and RS hardware ECC
* automatic boot up from NAND flash devices
nand_ecclayout is set up for 2GiB NAND chip mounted in Qi LB60.
We'll bring up boot-from-NAND support in nand_spl/ in the future.
Signed-off-by: Xiangfu Liu <xiangfu@openmobilefree.net> Acked-by: Daniel <zpxu@ingenic.cn> Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
Holger Brunck [Mon, 10 Oct 2011 11:08:19 +0000 (13:08 +0200)]
UBI: init eba tables before wl when attaching a device
This fixes that u-boot gets stuck when a bitflip was detected
during "ubi part <ubi_device>". If a bitflip was detected UBI tries
to copy the PEB to a different place. This needs that the eba table
are initialized, but this was done after the wear levelling worker
detects the bitflip. So changes the initialisation of these two
tasks in u-boot.
This is a u-boot specific patch and not needed in the linux layer,
because due to commit 1b1f9a9d00447d
UBI: Ensure that "background thread" operations are really executed
we schedule these tasks in place and not as in linux after the inital
task which schedule this new task is finished.
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
cc: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
Lars Poeschel [Wed, 12 Oct 2011 09:31:19 +0000 (11:31 +0200)]
ubifs bad superblock bug
This patch fixes an issue when ubifs reads a bad superblock. Later it
tries to free memory, that was not allocated, which freezes u-boot.
This is fixed by looking for a non null pointer before free.
The message I got before u-boot freezes:
UBI: max/mean erase counter: 53/32
UBIFS: mounted UBI device 0, volume 1, name "rootfs"
UBIFS: mounted read-only
UBIFS: file system size: 49140 bytes (50319360 KiB, 0 MiB, 49140 LEBs)
UBIFS: journal size: 49 bytes (6838272 KiB, 0 MiB, 6678 LEBs)
UBIFS: media format: w4/r0 (latest is w4/r0)
UBIFS: default compressor: LZO
UBIFS: reserved for root: 0 bytes (0 KiB)
UBIFS error (pid 0): ubifs_read_node: bad node type (255 but expected 9)
UBIFS error (pid 0): ubifs_read_node: bad node at LEB 330:13104
UBIFS error (pid 0): ubifs_iget: failed to read inode 1, error -22
Error reading superblock on volume 'ubi:rootfs'!
Signed-off-by: Lars Poeschel <larsi@wh2.tu-dresden.de> Cc: Kyungmin Park <kmpark@infradead.org> Signed-off-by: Stefan Roese <sr@denx.de>
In nand_davinci_readecc(), select the correct NANDF<n>ECC register based
on CONFIG_SYS_NAND_CS rather than hardcoding the choice of NANDF1ECC.
This allows 1-bit hardware ECC to work with chip select other than CS2.
Note this now matches the usage in nand_davinci_enable_hwecc(), which
already had the correct handling, and allows refactoring to a single
function encapsulating the register read.
Without this fix, writing NAND pages to a chip not wired to CS2 would
result in in the ECC calculation always returning FFFFFF for each
512-byte segment, and reading back a correctly written page (one with
ECC intact) would always fail. With this fix, the ECC is written and
verified correctly.
Signed-off-by: Laurence Withers <lwithers@guralp.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
Xiangfu Liu [Wed, 12 Oct 2011 04:24:06 +0000 (12:24 +0800)]
MIPS: Ingenic XBurst Jz4740 processor support
Jz4740 is a multimedia application processor targeting for mobile
devices like e-Dictionary, eBook, portable media player (PMP) and
GPS navigator. Jz4740 is powered by Ingenic 360 MHz XBurst CPU core
(JzRISC), in which RISC/SIMD/DSP hybrid instruction set architecture
provides high integration, high performance and low power consumption.
JzRISC incorporated in Jz4740 is the advanced and power-efficient
32-bit RISC core, compatible with MIPS32, with 16K I-Cache and 16K
D-Cache, and can operate at speeds up to 400 MHz.
On-chip modules such as LCD controller, embedded audio codec, multi-
channel SAR-ADC, AC97/I2S controller and camera I/F offer a rich
suite of peripherals for multimedia application. NAND controller
(SLC/MLC), USB (host 1.1 and device 2.0), UART, I2C, SPI, etc. are
also available.
For more info about Ingenic XBurst Jz4740:
http://en.ingenic.cn/eng/
http://www.linux-mips.org/wiki/Ingenic
This patch introduces XBurst CPU support in U-Boot. It's compatible
with MIPS32, but requires a bit different cache maintenance, timer
routines, and boot mechanism using USB boot tool, so XBurst support
can go into a separate new home, cpu/xburst/.
Signed-off-by: Xiangfu Liu <xiangfu@openmobilefree.net> Acked-by: Daniel <zpxu@ingenic.cn> Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
Xie Xiaobo [Mon, 3 Oct 2011 19:54:21 +0000 (12:54 -0700)]
powerpc/mpc8536ds: Save the env variables to SDcard and SPI flash
MPC8536DS offer booting from SDcard or SPI flash. This patch defined that
u-boot can save the environment variables on SDcard or SPI flash when
booting from the related device. The Env parameter region and linux
kernel region have overlap in SPI-Flash, So change the Env param saving
address.
Signed-off-by: Xie Xiaobo <r63061@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Xie Xiaobo [Mon, 3 Oct 2011 19:18:40 +0000 (12:18 -0700)]
powerpc/mpc8536ds: Invert SDHC_WP pin polarity
MPC8536 Rev 1.0 silicon have NMG_eSDHC118 erratum, so that the SDHC write
protected pin polarity does not follow the SD card standard in MPC8536
Rev 1.0 silicon.
The MPC8536DS board invert the SDHC_WP pin as a workaround. However, this
silicon erratum has been fixed in Rev 1.1, So need invert the SDHC_WP
polarity again when use the MPC8536 Rev1.1 and greater on MPC8536DS board.
Signed-off-by: Xie Xiaobo <r63061@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Xie Xiaobo [Mon, 3 Oct 2011 19:18:39 +0000 (12:18 -0700)]
powerpc/mpc8536ds: Add eSPI support for MPC8536DS
1. The SD_DATA[4:7] signals are shared with the SPI chip selects on 8536DS,
so don't set MPC85xx_PMUXCR_SD_DATA that config eSDHC data bus-width
to 4-bit and enable SPI signals.
2. Add eSPI controller and SPI-FLASH definition.
Signed-off-by: Xie Xiaobo <r63061@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
projects / karo-tx-uboot.git / log