Mike Snitzer [Thu, 13 Sep 2012 23:03:56 +0000 (09:03 +1000)]
When there are no paths and multipath receives an ioctl, it waits until
a path becomes available. This behaviour is incorrect if the
"queue_if_no_path" setting was not specified, as then the ioctl should
be rejected immediately, which this patch now does.
commit 35991652b ("dm mpath: allow ioctls to trigger pg init") should
have checked if queue_if_no_path was configured before queueing IO.
Checking for the queue_if_no_path feature, like is done in map_io(),
allows the following table load to work without blocking in the
multipath_ioctl retry loop:
hwmon: (coretemp) Use get_online_cpus to avoid races involving CPU hotplug
coretemp_init loops with for_each_online_cpu, adding platform_devices
and sysfs interfaces, then calls register_hotcpu_notifier. There is a
race if a CPU is offlined or onlined after the loop, but before
register_hotcpu_notifier. The race might result in the absence of a
platform_device+sysfs interface for an online CPU, or the presence of
a platform_device+sysfs interface for an offline CPU. A similar race
occurs during coretemp_exit, after the module calls
unregister_hotcpu_notifier, but before it unregisters all devices, a
CPU might offline and a device for an offline CPU will exist for a
short while.
This fix surrounds for_each_online_cpu and register_hotcpu_notifier
with get_online_cpus+put_online_cpus; and surrounds
unregister_hotcpu_notifier and device unregistering with
get_online_cpus+put_online_cpus.
Build tested.
Signed-off-by: Silas Boyd-Wickizer <sbw@mit.edu> Signed-off-by: Jean Delvare <khali@linux-fr.org>
hwmon: (via-cputemp) Use get_online_cpus to avoid races involving CPU hotplug
via_cputemp_init loops with for_each_online_cpu, adding
platform_devices, then calls register_hotcpu_notifier. If a CPU is
offlined between the loop and register_hotcpu_notifier, then later
onlined, via_cputemp_device_add will attempt to add platform devices
with the same ID. A similar race occurs during via_cputemp_exit,
after the module calls unregister_hotcpu_notifier, a CPU might offline
and a device will exist for a CPU that is offline.
This fix surrounds for_each_online_cpu and register_hotcpu_notifier
with get_online_cpus+put_online_cpus; and surrounds
unregister_hotcpu_notifier and device unregistering with
get_online_cpus+put_online_cpus.
Build tested.
Signed-off-by: Silas Boyd-Wickizer <sbw@mit.edu> Acked-by: Harald Welte <laforge@gnumonks.org> Signed-off-by: Jean Delvare <khali@linux-fr.org>
Peter Huewe [Thu, 13 Sep 2012 23:03:52 +0000 (09:03 +1000)]
i2c: Make I2C available on UML
Remove the global dependency of the I2C subsystem on HAS_IOMEM and
move the dependency to the i2c/busses submenu, with an exception for
i2c-stub.
The generic I2C part does not need to have HAS_IOMEM set and thus now
becomes available in UML, so the I2C subsystem can now be used, e.g.
by the i2c-stub driver, for development of I2C device drivers.
[JD: Some adjustments.]
Signed-off-by: Peter Huewe <peterhuewe@gmx.de> Signed-off-by: Jean Delvare <khali@linux-fr.org>
Shubhrajyoti D [Thu, 13 Sep 2012 23:03:52 +0000 (09:03 +1000)]
i2c: Convert struct i2c_msg initialization to C99 format
Convert the struct i2c_msg initialization to C99 format. This makes
maintaining and editing the code simpler. Also helps once other fields
like transferred are added in future.
Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com> Signed-off-by: Jean Delvare <khali@linux-fr.org>
Julia Lawall [Thu, 13 Sep 2012 23:03:51 +0000 (09:03 +1000)]
i2c-smbus: Convert kzalloc to devm_kzalloc
Converting kzalloc to devm_kzalloc simplifies the code and ensures that the
result, alert, is freed after the irq allocated by the subsequent
devm_request_irq. This in turn ensures that when an interrupt can be
triggered, the alert structure is still available.
The problem of a free after a devm_request_irq was found using the
following semantic match (http://coccinelle.lip6.fr/)
devm_request_irq@p1(e1,e2,...,x)
... when any
when != e2 = a
when != x = b
if (...) {
... when != e2 = c
when != x = d
free@p2(...,x,...);
...
return ...;
}
// </smpl>
Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: Jean Delvare <khali@linux-fr.org>
Jean Delvare [Thu, 13 Sep 2012 23:03:51 +0000 (09:03 +1000)]
i2c-i801: Support SMBus multiplexing on Asus Z8 series
Add support for SMBus multiplexing on Asus Z8 motherboard series. On
these boards, the memory slots are behind a GPIO-controlled I2C
multiplexer. Models with 6 or 12 memory slots have 2 segments behind
the multiplexer, while models with 18 memory slots have 3 such
segments.
On these boards, only the memory slots are behind the multiplexer,
so it is possible to keep the autodetection mechanism.
The code is generic enough so it could work on other boards as long as
the multiplexer is controlled by GPIO pins. For other forms of
multiplexing (for example using an I2C device) additional code will be
needed.
Thanks to Asus for providing a board to develop and test this feature,
as well as all the technical information required.
At the moment, the GPIO driver must be loaded before the i2c-i801
driver, but I hope to solve this soon, using deferred probing on
the i2c-mux-gpio side.
Jean Delvare [Thu, 13 Sep 2012 23:03:51 +0000 (09:03 +1000)]
i2c-mux: Add support for device auto-detection
Let I2C bus segments behind multiplexers have a class. This allows for
device auto-detection on these segments. As long as parent segments
don't share the same class, it should be fine.
I implemented support in drivers i2c-mux-gpio and i2c-mux-pca954x. I
left i2c-mux-pca9541 and i2c-mux-pinctrl alone for the moment as I
don't know if this feature makes sense for the use cases of these
drivers.
Signed-off-by: Jean Delvare <khali@linux-fr.org> Cc: Peter Korsgaard <peter.korsgaard@barco.com> Cc: David Daney <david.daney@cavium.com> Cc: Michael Lawnick <ml.lawnick@gmx.de> Cc: Rodolfo Giometti <giometti@linux.it>
Steven J. Hill [Thu, 13 Sep 2012 21:47:58 +0000 (16:47 -0500)]
MIPS: Add base architecture support for RI and XI.
Originally both Read Inhibit (RI) and Execute Inhibit (XI) were
supported by the TLB only for a SmartMIPS core. The MIPSr3(TM)
Architecture now defines an optional feature to implement these
TLB bits separately. Support for one or both features can be
checked by looking at the Config3.RXI bit.
Signed-off-by: Steven J. Hill <sjhill@mips.com> Acked-by: David Daney <david.daney@cavium.com>
projects / karo-tx-linux.git / log