this patch is adding a ioctl for vpu to check the phy addr before vpu
start using this addr, this use case is common in some Direct Render case,
the VPU 's framebuffer phy memory is allocate by GPU, if the address given
by GPU have some wrong, like pass a virtual address, vpu will hang the system.
Add this IOCTL to be the goalkeeper, this IOCTL can check whether the phy
address was virtual memory or the address is within phy memory of your DDR.
The phy memory valild check is now doing best effort:
1. check whether is was allocated by vmalloc(), which must be a phy un-continus
2. check whether is was beyound DDR's top address, usually the other driver
pass a virtual address as a phy address.
ENGR00216013-2 mx6: not call memblock_free after reserve memory.
Remove call memblock_free after reserve memory with memblock_allocate().
The function of memblock_free is to remove the memory block from reserve list
of memblock, it will totally lost the info about how much phy memory
we have.
Skipping call this can make the reserved memory be accountable in
memblock With no side-effect.
After doing this, we can know how much our phy memory is, then can add check
in our driver like(vpu) to check the phy memory valid or not before vpu start
use the address.
add a function to check the end address including reserved memory,
this API can provide the top address of phy memory,
it can be used to check if the phy memory is valild in some driver
like VPU.
Ryan QIAN [Mon, 25 Jun 2012 23:39:36 +0000 (07:39 +0800)]
ENGR00217120 mmc: esdhc: implement std tuning for fsl sdhc ip
1. in mx6sl, it adds sd3.0 uhs mode capability indicator bits.
2. in mx6sl, exe_tune and smp_clk_sel bits for standard tuning procedure
have been put in ACMD12_ERR reg
Ryan QIAN [Wed, 11 Jul 2012 00:50:12 +0000 (08:50 +0800)]
ENGR00216961: MMC/SDIO: gate off sdio clk when MMC_POWER_OFF is set
1. For sdio card, only when MMC_POWER_OFF is set,
sdhci_disable_clk will be called for sdio. otherwise sdio clk
will not be gated.
2. Set MMC_CAP_POWER_OFF_CARD caps in esdhc, so that
sdio_bus power off and clock gate off card through
to pm_runtime interface.
Gary Zhang [Wed, 11 Jul 2012 02:15:42 +0000 (10:15 +0800)]
ENGR00209905 WM8962: support for continuously playback diff sample bit streams
support for continuously playback different sample bit audio
streams with -Dplughw:0,0 option
such as the command: 'aplay -Dplughw:0,0 16bit.wav 24bit.wav'
before prohibit reenter hw_params, now remove this limitation
to support this feature.
ENGR00217018 [Mx6 ]Need to set 1.1V as PU default voltage
1. Need to set 1.1V as default PU value, as when first time VPU
or GPU try to enable PU regulator, it will use this default
value as PU voltage setting.
2. For DL, as its default setpoint is set to middle point,
we need to add a usecount for 400M PFD, because when system
enter 24M, it will disable 400M PFD if its previous setpoint
is middle, if not add this usecount when we init the bus freq
setpoint, then the usecount will be wrong when first time system
enter 24M bus mode.
Rong Dian [Thu, 12 Jul 2012 03:20:17 +0000 (11:20 +0800)]
ENGR00216946: battery: increase update period to 2 minutes
increase update period to 2 minutes. Due to improper hardware design,
when enable HDCP function, the I2C2 bus pins function is change to DDC
function,the CPU loading is high when I2C failed transfer data via I2C
bus,so decrease battery update voltage frequency.
Israel Perez [Mon, 9 Jul 2012 16:59:23 +0000 (11:59 -0500)]
ENGR00172077 [MX6Q_ARD]TVIN: Kernel dump and Error Messages
adv7180.c code was not working properly in this new release because some
changes done in mxc_v4l_capture.c driver.
Also mostly of the error messages and kernel dump problem which were related
to csi_enc are already fixed on this release.
In order to fix on previous releases csi and ipuv3 fixes
should be applied or back ported.
Signed-off-by: Israel Perez <B37753@freescale.com>
ENGR00216031 [MX6]Need to force bus freq to highest point when suspend
1. When bus freq is at 400M setpoint, currently bus freq will not
set to high setpoint when suspend, but some drivers which need
high bus freq enable clock before bus freq resume, so the request
of high bus freq will be ignore until next high bus freq device is
enabled,it will result in some devices need high bus freq but bus freq
dirver stay at med setpoint. So we need to force bus freq to
highest setpoint before suspend to avoid such scenario.
2. Clean up PU LDO turn on/off, move to regulator driver and maintain by
VPU and GPU driver.
Liu Ying [Tue, 10 Jul 2012 04:00:17 +0000 (12:00 +0800)]
ENGR00216268 Ov5642 camera:Fix green line issue for 2 modes
This patch fix green line issue on captured frames for
720x480p@30 and 720x576p@30 modes by changing register
0x302c's bit[6:5] to 0'11 to enhance output driving
capability to 4x.
make shi [Thu, 5 Jul 2012 05:57:59 +0000 (13:57 +0800)]
ENGR00215792 USB:fix gadget issue when boot kernel with USB connected
- USB gadget disconnected when system boot kernel with USB connected. Commit 68b1c60f7f6c436340206679a18d61d9 induce the issue, call dr_discharge_line(1)
to ensure no abnormal usb wakeup interrupt happen after plug out the cable.
There are two cases cause dr_discharge_line(1) of fsl_otg_event() be called.
One case is switch the otg mode form Host mode to Device mode. Another case is
boot kernel with USB connected. The host_first_call is true when system boot
kernel with USB connected, otherwise it is false. So dr_discharge_line(true)
should not be called in fsl_otg_event() if host_first_call is true.
- USBOH3 clock is still on after plug out the cable when boot kernel with USB
connected, If the suspended bit is 0x1 and stopped is 0x0,the case is regarded
as suspend connected to usb charger. USB clock will be turn on, otherwise the
second suspend is processed without USB clock and it causes system hang. But
system boot kernel with cable connected, suspended is 0x1 and stopped is 0x0.
USB clock will be on by mistake. And stopped is cleared in dr_controller_run()
when system boot kernel with USB connected. We should check the suspended and
stopped bit before call dr_controller_run() to fix the issue.
Robby Cai [Fri, 6 Jul 2012 10:07:24 +0000 (18:07 +0800)]
ENGR00216010-2: [e|s]pdc: re-initialize the controller after resume
Because we have DISPLAY power down/up request when do suspend/resume,
EPDC/SPDC has been powered off and powered on again, thus re-initialization
is needed.
Robby Cai [Fri, 6 Jul 2012 09:51:13 +0000 (17:51 +0800)]
ENGR00216010-1: gpc: Add missing display_pup_req config after system resumes
There's only DISPLAY power down request setting before system suspends,
but without the paired DISPLAY power up request setting after resume.
This will cause ePxP/EPDC/SPDC module nonfunctional because the modules
will be powered down once pdn_req is asserted but not powered up again.
With this patch, ePxP/EPDC/SPDC survived (need reinitialize each, however)
on resume.
Eric Sun [Fri, 6 Jul 2012 09:40:34 +0000 (17:40 +0800)]
ENGR00216001 MX6 Kernel : Fix a typo when defining "IO_ADDRESS" macro
When defining macro "IO_ADDRESS", the address is checked against PERIPH
address.
((x) <= (unsigned long)(ARM_PERIPHBASE + ARM_PERIPHBASE)) ...
The second "ARM_PERIPHBASE" is obviously a typo, should changed to
ARM_PERIPHBASE_SIZE
Signed-off-by: Eric Sun <jian.sun@freescale.com> Signed-off-by: Garg Nitin <b37173@freescale.com>
Robin Gong [Fri, 6 Jul 2012 05:07:25 +0000 (13:07 +0800)]
ENGR00215955 cpufreq interactive mx6: set cpufreq lowest point if cpu idling
Consider the below scenario: there is one CPU enter idle state before
switch happen, and the CPU frequency is set on high point(1G with userspace
cpufreq profile). After cpufreq profile is switched to interactive, all of the
cpus's target_freq will be set to the current CPU frequency 1G. Then after one
sample window, interactive profile will revalue the current cpu loading in
every cpu(except idle cpu), and get the desired frequency and compared with
target_freq to decide up or down frequency. Until all of cpus's target_freq
is lower than desired frequency , down frequency will happen. But the idle
CPU's frequency has been set on 1G , so cpu frequency miss the chance to set
lower cpu frequency , although there is no loading in all of cpus.CPU frequency
will be down unless the idled CPU exit idle to revalue cpu loading and get the
right target_freq, in the worst case, it will never happen.
Now we can do this:
If we judge cpu idle state and set taget_freq to lowest frequency when switch
to interactive, then CPU frequency modify will never be blocked on idled CPU. Signed-off-by: Robin Gong <B38343@freescale.com>
ENGR00215844 OV5642 camera: Add FPS checking for mode change
For fast mode setting, ov5642_change_mode does not check the fps setting.
New mode in ov5642_change_mode will have to be the same FPS as previous mode.
Only schedule the fast setting if previous fps is same as new one.
Liu Ying [Thu, 5 Jul 2012 10:42:02 +0000 (18:42 +0800)]
ENGR00215884-1 MX6 SabreSD:Refine OV mipi camera reset sequence
This patch refines OV mipi camera reset sequence according to
OV's recommendation:
reset --------------------|_____|----------------
->| 1ms |<-
pwdn ----------|_________________________|------
->| 5ms |<- ->| 5ms |<-
->| 5ms |<-
This change makes the OV mipi camera be at a correct status
after reset, otherwise, the wrong status of OV mipi camera
will reduce the ~2.78V analog camera power to ~2.3V, which
causes random thin colorful lines on OV5642 CSI camera image
as OV5642 CSI camera uses the same analog power.
When ESAI call ASRC for p2p playback. The datawidth may be
changed. The cpu dai would configure the ESAI data width according
to the modified datawidth(output_bits). The type mismatch between output_bits
and cpu dai's switch branch cause cpu dai's hardware parameter set
fail.
Match the type of output_bits to the switch branch in cpu dai's hardware
parameter configuration function.
This patch changes output drive capability of ov5642
camera register 0x302c's bit[6:5] to 0'11 to get 4x
drive capability so that green lines cannot be seen
in the captured frames.
Rong Dian [Wed, 4 Jul 2012 04:51:17 +0000 (12:51 +0800)]
ENGR00215718: battery: fix issure that coulomb data increases in discharger
Hardware cannot support battery internal resistance and coulomb calculation,
estimate data only by battery voltage.The true battery voltage will change to
a bit lower about 50mV~500mV than normal voltage with playing game or video or
other consumption actions, then change back to normal voltage with finishing
playing game or video or other consumption actions in the discharger stage.
Terry Lv [Wed, 4 Jul 2012 05:34:55 +0000 (13:34 +0800)]
ENGR00215607: CAAM: kernel can't boot up sometimes
ahash still has a scatterlist problem which cause this problem.
Thus we disable ahash feature in defconfig and wait for later patch to
fix it.
Also, we remove caam high freq flag to make bus freq run.
Wayne Zou [Mon, 2 Jul 2012 06:54:07 +0000 (14:54 +0800)]
ENGR00182441 V4L2 output: set screen black when resizing during video playback
set screen black when resizing during video playback.
Fix bug: when video playback, switch to full screen or leave full screen,
sometime it has the colour stripe
Danny Nold [Mon, 2 Jul 2012 17:57:58 +0000 (12:57 -0500)]
ENGR00215592 - EPDC fb: Fix bug in selecting next LUT when 0-31 busy
If LUT 63 is busy and LUTs 0-31 are busy, the epdc_choose_next_lut
function was not correctly selecting an available LUT between 32-62.
Instead, it was returning 0. This fixes that issue by properly
offsetting the available LUT from the second 32-bit segment of the
64-bit LUT field.
Signed-off-by: Danny Nold <dannynold@freescale.com>
ENGR00215182-2 MXC HDMI CEC: Add basic support for HDMI CEC
- Add MXC HDMI CEC to kconfig and makefile under driver/mxc
- Add initial mxc_hdmi-cec.c file to provide basic HDMI CEC
functionality:
- Basic HDMI CEC resource initilize functional
- Support for sending and receiving CEC message via CEC line
- Report HDMI cable status to CEC lib at userspace. Signed-off-by: Zhang Xiaodong <B39117@freescale.com>
ENGR00215182-1 sabresd: Add basic support for HDMI CEC
- Changes to IOMUX to allow HDMI CEC controller to use KEY_ROW2
pin that it needs
- Add cec device in platform-mxc_hdmi.c
- Add MXC_HDMI_CEC in imx6_defconfig
Steve Cornelius [Sat, 30 Jun 2012 23:11:00 +0000 (16:11 -0700)]
ENGR00215492-3: Detect HW features during alg registration
i.MX6 instantiates a CAAM with a low-power MDHA block, which does not
compute digests larger than 256 bits. Since the driver installs handlers
for hashes longer than 256 bits in several places, added the ability to
read and interpret the CHA version and instantiations registers, and then
only register handlers that it can support.
Signed-off-by: Steve Cornelius <steve.cornelius@freescale.com> Signed-off-by: Terry Lv <r65388@freescale.com>
If no platform_data ,the pdata will be NULL.If the driver try to access the
pdata->platform_set_disconnect_det,dump will occor.SO we should check the
pdata is NULL before checking pdata->platform_set_disconnect_det.
ENGR00215491 [MX6]Need to increase BUS freq when CPU freq is increased
When BUS freq is running at DLL off mode(24M or 50M), when CPU
freq is increased, we need to increase BUS freq to 400M setpoint
in order to achieve high performance when CPU is busy.
Robin Gong [Mon, 2 Jul 2012 02:41:57 +0000 (10:41 +0800)]
ENGR00215489-1 WDOG:add WDIOC_SETPRETIMEOUT and WDIOC_GETPRETIMEOUT interface
Add these two interface, so than user can set and get pre-timeout value to save
some important data before watchdog reboot. Signed-off-by: Robin Gong <B38343@freescale.com>
Richard Liu [Mon, 2 Jul 2012 01:34:31 +0000 (09:34 +0800)]
ENGR00215344 GPU became slow after long time run some applications
GPU became slow after long time run some applications
root cause is when GPU reserved memory exhaust, GPU will request continue physical
memory which will trigger defregment operation in kernel and cause system slow
Signed-off-by: Richard Liu <r66033@freescale.com> Acked-by: Lily Zhang
Sandor Yu [Fri, 29 Jun 2012 10:18:55 +0000 (18:18 +0800)]
ENGR00215340 HDMI PHY config adjust to pass electrical compliance test
In the HDMI PHY internal, there are two register that can adjust
waveform of eyediagram.
0x0e -- voltage level control; it can adjust the single end data signals;
0x09 -- define pre-emphasis factor;
(it will affect the rise time and fall time of D0/D1/D2);
Adjust HDMI PHY register 0x09 and 0xe for MX6DL SabreSD and MX6Q SabreSD
waveform of eyediagram to pass HDMI compliance test electrical test case.
Liu Ying [Wed, 27 Jun 2012 08:08:49 +0000 (16:08 +0800)]
ENGR00215041-2 MX6 SabreSD:Set clko parent to be clko2
On MX6 SabreSD board, gpio_0 is muxed to clko to be
audio mclk and camera mclk. 24MHz osc clk is a stable
clock source, which can meet the requirement of audio
mclk and camera mclk. This patch sets clko parent
clock to be clko2 clock so that camera mclk and audio
mclk can source from osc clk.
There are 2 benifits after applying this patch:
1) clko's original parent clock(pll4_audio_main_clk)
can be gated off to save power or used by another
module.
2) ov5640/ov5642 camera most settings can reach
claimed 15fps or 30fps with no human eye recognizable
video quality downgrade.
Lin Fuzhen [Thu, 28 Jun 2012 06:54:36 +0000 (14:54 +0800)]
ENGR00215195 MX6 PM:Add necessary info for waitmode to help debug system issue
Add debug message for wait mode to check it was enabled or not.
it will easy to get the wait mode status from this info
e.g, if wait mode is enabled, there are below info from console:
wait mode is enabled for i.MX6
Signed-off-by: Lin Fuzhen <fuzhen.lin@freescale.com>
Steve Cornelius [Thu, 28 Jun 2012 22:27:16 +0000 (15:27 -0700)]
ENGR00215228-12: Move scatter/gather cache coherence into chained function.
Last driver revisions began to incorporate optimized mapping functions
for scatter/gather list management, and then centralized them as inlinable
functions usable from multiple modules. Since these became more globally
useful, moved the coupled cache-coherence functions out of the mainline code
and into the inlined ones for simplification.
Signed-off-by: Steve Cornelius <steve.cornelius@freescale.com>
Steve Cornelius [Tue, 26 Jun 2012 01:19:09 +0000 (18:19 -0700)]
ENGR00215228-11: Enable ahash and rng configurations
Add in ahash and rng options for build. Note that because of the way
platform devices detect (as opposed to of-based detection), modularization
of API interfaces is suppressed. Once CONFIG_OF is possible, this
can go away.
Signed-off-by: Steve Cornelius <steve.cornelius@freescale.com>
Steve Cornelius [Tue, 26 Jun 2012 00:51:58 +0000 (17:51 -0700)]
ENGR00215228-9: Add hash and RNG initializers for non-OF builds
Inserted explicit initializers for split-out startup and shutdown functions
needed for kernels using platform devices in place of OF-device-tree
initialization and detection.
Also added necessary ahash algorithm list head to driver private storage
block.
Signed-off-by: Steve Cornelius <steve.cornelius@freescale.com>
Steve Cornelius [Fri, 22 Jun 2012 23:32:08 +0000 (16:32 -0700)]
ENGR00215228-6: Externalize scatter-gather handling for multiple API modules.
Moved scatter-gather list management outside of single API module
in anticipation of multiple API modules which may be switch selectable.
This includes a number of list management optimizations, as well as
some aead descriptor optimizations.
Signed-off-by: Steve Cornelius <steve.cornelius@freescale.com>
Steve Cornelius [Fri, 22 Jun 2012 23:13:53 +0000 (16:13 -0700)]
ENGR00215228-4: Synchronize scatter/gather table definitions with QorIQ defs
Update scatter/gather definitions to more closely correspond with
those in the QorIQ 1.2 release tree. Note that the definition of
the CAAM-local scatter-gather table for QorIQ/Power-based devices
assumed big-endian, and therefore does not burst-read properly into
an ARM-based little-endian instantiation. Therefore, applied
close-as-practical definitions to at least get close until a merge
can be accomplished.
Signed-off-by: Steve Cornelius <steve.cornelius@freescale.com>
projects / karo-tx-linux.git / log