Liu Ying [Tue, 24 May 2011 02:06:03 +0000 (10:06 +0800)]
ENGR00142551-3 MXC V4L2:Change IPU interface for triple buffer
This patch changes IPU interface for MXC V4L2 to align with
IPUv3 triple buffer support.
When V4L2 is used, we'll change to use double buffer for
display channel via internal framebuffer interface.
Liu Ying [Tue, 24 May 2011 02:04:02 +0000 (10:04 +0800)]
ENGR00142551-2 IPUv3 FB:Support HW triple buffer
This patch supports HW triple buffer for IPUv3
framebuffer.
1) Remove buf ready check in EOF irq handler, as we
think the swap logic will not fail for HW triple
buffer case.
2) When V4L2 output/overlay are used, switch to double
buffer mode.
3) Changes IPU interface for IPUv1 framebuffer to pass
building.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com> Signed-off-by: Jason Chen <b02280@freescale.com>
(cherry picked from commit 4ada3031e13207902f8c90b33c082759889cb22a)
Liu Ying [Tue, 24 May 2011 01:58:49 +0000 (09:58 +0800)]
ENGR00142551-1 IPUv3:Support triple buffer
This patch supports IPUv3 triple buffer.
Only channel 23, 27 and 28 are tested.
Test was done on MX51 BBG and MX53 SMD.
IPUv1 interface is changed accordingly
to pass building.
Liu Ying [Tue, 24 May 2011 01:57:46 +0000 (09:57 +0800)]
ENGR00143575 IPUv3:Align IDMAC BS with DMFC FIFO BS
This patch aligns IDMAC burst size and DMFC FIFO burst
size to get better performance and workarounds black
flash issue when playing video on DP-FG with full
screen mode at 1024x768M@60.
Anish Trivedi [Fri, 20 May 2011 16:51:01 +0000 (11:51 -0500)]
ENGR00143799 Add SCC RAM clock to dependency list for SAHARA clock tree
When ARM is in WAIT mode, the SCC RAM clock is disabled since
1 is written to the CCGR register by default. At that point, if SAHARA
tries to access a key or some other piece of data stored in the SCC RAM,
then it might hang.
To prevent this scenario, SCC RAM is added to dependency list
for SCC clock, and SCC clock is added to dependency list for SAHARA.
Yuxi Sun [Wed, 18 May 2011 06:02:45 +0000 (14:02 +0800)]
ENGR00143550 camera: change camera platform data name and remove unused function
Change camera platform data name from mxc_camera_platform_data to
fsl_mxc_camera_platform_data in accordence with include/linux/fsl_devices.h
and remove unused function gpio_sensor_active(),gpio_sensor_inactive().
- Removed __initdata from regulator_init_data structure declaration. This
protects the MAX17135 regulator from having its structure overwritten, which
was causing a bug when writing large chunks of memory.
Signed-off-by: Danny Nold <dannynold@freescale.com>
Liu Ying [Thu, 12 May 2011 12:18:25 +0000 (20:18 +0800)]
ENGR00143309 IPUv3fb:Set default yres_virtual to be 3*yres
This patch sets framebuffer yres_virtual to be 3*yres defaultly.
Before this patch is applied, the yres_virtual will be changed
to yres when hdmi cable is hot plugged out and in, which
reduces yres_virtual to yres and pan display mechanism cannot
work well.
In set_voltage function, all voltages are not in microvolts.
Hence set_voltage function was failing. Change all voltages in
the function to be in microvolts.
Liu Ying [Thu, 12 May 2011 09:59:34 +0000 (17:59 +0800)]
ENGR00142683 IPUv3:Increase IDMAC BS for RGBP and DMFC BS
This patch increases IDMAC burst size from 16 pixels to
32 pixels for RGBP pixel format and increases DMFC burst
size to 128 pixels to workaround 1080P60 display video
black flash issue.
Danny Nold [Tue, 3 May 2011 18:00:55 +0000 (13:00 -0500)]
ENGR00142950-3 - MSL: Port EPDC/PxP driver support to 2.6.38
- Ported EPDC driver MSL layer code to 2.6.38
- Ported PxP driver MSL layer code to 2.6.38
- Ported Maxim 17135 EPD PMIC driver MSL layer code to 2.6.38
Signed-off-by: Danny Nold <dannynold@freescale.com>
Danny Nold [Tue, 3 May 2011 16:12:19 +0000 (11:12 -0500)]
ENGR00142950-1 - EPDC fb: Add support for 2.6.38
- Bring EPDC driver up-to-date
- Add mxcfb_epdc_kernel.h
- Change structure definitions from mxc_ to imx_ where needed to
match platform structure names
Signed-off-by: Danny Nold <dannynold@freescale.com>
ENGR00142679 SCC2 and SAHARA: changes to support loadable modules
To allow SCC2 and SAHARA drivers to work as loadable modules, needed
to add GPL license to SAHARA driver, export a couple of functions
from SCC2 driver, and the following data buffer mapping change in
SAHARA driver:
When compiled as a loadable module, a data buffer to be DMA'ed in the
SAHARA driver may not be in the kernel direct-mapped region but in
the "Kernel module space" between TASK_SIZE and high_memory-1
(see http://www.arm.linux.org.uk/developer/memory.txt). In this
scenario, the driver canno simply use the __pa macro to obtain
the physical address. It must walk the page tables to find the
page and use the page_to_phys function to find the physical
address that corresponds to the data buffer.
Jason Chen [Thu, 28 Apr 2011 03:23:36 +0000 (11:23 +0800)]
ENGR00141552 ipuv3: fix display pin's power leak
If you disable display, the display port's pin may keep high voltage which
may cause power leakage. Fix this issue by make all pin go into low level
after display disable.
Jason Chen [Tue, 19 Apr 2011 08:33:28 +0000 (16:33 +0800)]
ENGR00141152-1 header file: make default display option
After this patch, default display for below platforms:
mx51 bbg: DVI-XGA on DI0
mx53 ard: LVDS-XGA on DI0
mx53 evk: CLAA-WVGA on DI0
mx53 loco: VGA-XGA on DI1
mx53 smd: LVDS-XGA on DI1
The default options will work if you do not enter other video cmdline options.
For platform need enable other drivers, it will enable it automatically.
For example, under default option, mx53 loco will enable tve-vga driver
automatically; before this patch, it need add 'vga' to cmdline to enable it.
And 'di1_primary' option also will be enabled automatically if need.
If you want to overwrite the default option, please refer to below:
Zhou, Jie [Wed, 2 Mar 2011 17:02:40 +0000 (01:02 +0800)]
ENGR00140050 GPU: workaround hang with heavy bus loading
The GPU hang when run two cubes together with one video playback.
According to the suggestion from AMD, we'd better not read register
when GPU active, especially for CP block.
ENGR00142296-2 SRTC: Upgrade driver to kernel version 2.6.38
RTC-DEV ioctl interface changed, which required a definition
of new callback mxc_rtc_alarm_irq_enable in SRTC driver.
Also, added a sync call to mxc_rtc_interrupt after a write to
LP domain register to make sure we wait 3 clock cycles in order
for the write to complete, as required by the hardware.
ENGR00142089-3 MX51/MX53: Upgrade SCC2 and SAHARA drivers to 2.6.38
Starting with 2.6.36, ioctl file operation is removed; therefore,
changed ioctl function to unlocked_ioctl function, which has a
different function prototype and requires local locking mechanism
to prevent more than 1 user from accessing ioctls at the same time.
Modified SCC2 driver to obtain IRQs from resource array.
Modified SAHARA driver to use either MX53 or MX51 base address and
irq definitions since the generic versions are no longer defined
in the machine layer header files.
Jason Chen [Fri, 15 Apr 2011 08:25:57 +0000 (16:25 +0800)]
ENGR00141363 ARM imx53 clock: change di0 clock default parent to pll3
If enable both LVDS and one display device use external di clock, there will
be conflict between their clock parent -- both use pll4 on mx53. So it need
change di0 clock parent to pll3, and then uart parent need change to pll2 to
avoid console mess.
Jason Chen [Wed, 23 Feb 2011 10:18:50 +0000 (18:18 +0800)]
ENGR00139635 mxc edid: add edid name sysnode
Add name sysnode to mxc_ddc and sii902x, which can be check under:
/sys/devices/platform/mxc_ddc.0/fb_name
or
/sys/devices/platform/sii902x.0/fb_name
It's the name of fb fix id which it associated.
projects / karo-tx-linux.git / log