Linus Walleij [Sat, 27 Aug 2016 12:01:19 +0000 (14:01 +0200)]
clk: versatile/icst: support for AP baseboard clocks
This adds support for the two ICST525-based clocks on the
Integrator/AP baseboard, as documented in the board manual
"Integrator/AP ASIC Development Motherboard", ARM DUI0098 B,
pages 3-15 thru 3-18.
Cc: Russell King <linux@armlinux.org.uk> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
[sboyd@codeaurora.org: fixed uninitialized val warning] Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Thu, 25 Aug 2016 20:35:36 +0000 (13:35 -0700)]
clk: Simplify __of_clk_get_hw_from_provider()
__of_clk_get_hw_from_provider() is confusing because it will
return EPROBE_DEFER if there isn't a ->get() or ->get_hw()
function pointer in a provider. That's just a bug though, and we
used to NULL pointer exception when ->get() was missing anyway,
so let's make this more obvious that they're not optional. The
assumption is that most providers will implement ->get_hw() so we
only fallback to the ->get() function if necessary. This
clarifies the intent and removes any possibility of probe defer
happening if clk providers are buggy.
Rafał Miłecki [Fri, 26 Aug 2016 12:58:07 +0000 (14:58 +0200)]
clk: return unsigned int in dummy non-OF of_clk_get_parent_count()
In the commit 929e7f3bc7b82 ("clk: Make of_clk_get_parent_count() return
unsigned ints") of_clk_get_parent_count has been modified to return
unsigned int. There is also a dummy implementation of the same function
for configs without CONFIG_OF. For the consistency it should be updated
as well.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
The Integrator/AP and Integrator/CP have special derivatives
of the ICST525 control registers, where some bits have been
hardwired but others are possible to adjust, resulting in a
control register that makes it possible to set an even,
desired megahertz value.
The Integrator/AP and Integrator/CP have slightly different
layout so we support them using different compatible
strings.
After adding these clocks, the Integrator-specific cpufreq
driver can be switched over to use the generic operating
point device tree cpufreq driver.
Instead of simply writing a value to the oscillator control
register we switch to the more elaborate method of providing
a bitmask and use regmap_update_bits() to poke the right bits
for the desired frequency, this is needed since these control
registers sometimes control more than one clock.
Cc: Russell King <linux@armlinux.org.uk> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Linus Walleij [Mon, 22 Aug 2016 09:19:32 +0000 (11:19 +0200)]
clk: versatile add DT bindings for the ICST CM variants
The Integrator/AP and Integrator/CP core modules have special
versions of the ICST525 interface hardcoding some bits. Create
special compatible strings to identify these variants, also
explain a bit what is going on.
Cc: devicetree@vger.kernel.org Cc: Russell King <linux@armlinux.org.uk> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Tue, 16 Aug 2016 22:37:57 +0000 (15:37 -0700)]
clk: h8300: Migrate to clk_hw based registration APIs
Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers while registering clks in
these drivers, allowing us to move closer to a clear split of
consumer and provider clk APIs.
Cc: Yoshinori Sato <ysato@users.sourceforge.jp> Cc: <uclinux-h8-devel@lists.sourceforge.jp> Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Tue, 16 Aug 2016 22:38:27 +0000 (15:38 -0700)]
clk: qcom: Migrate to clk_hw based registration and OF APIs
Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers in this driver, allowing us to
move closer to a clear split of consumer and provider clk APIs.
Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Wed, 1 Jun 2016 23:15:33 +0000 (16:15 -0700)]
clk: wm831x: Migrate to clk_hw based registration APIs
Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers while registering clks in
these drivers, allowing us to move closer to a clear split of
consumer and provider clk APIs.
Cc: Mark Brown <broonie@kernel.org> Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Wed, 1 Jun 2016 23:15:32 +0000 (16:15 -0700)]
clk: vt8500: Migrate to clk_hw based registration APIs
Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers while registering clks in
these drivers, allowing us to move closer to a clear split of
consumer and provider clk APIs.
Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Cc: Tony Prisk <linux@prisktech.co.nz> Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Wed, 1 Jun 2016 23:15:30 +0000 (16:15 -0700)]
clk: twl6040: Migrate to clk_hw based registration APIs
Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers while registering clks in
these drivers, allowing us to move closer to a clear split of
consumer and provider clk APIs.
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Wed, 1 Jun 2016 23:15:28 +0000 (16:15 -0700)]
clk: si570: Migrate to clk_hw based OF and registration APIs
Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers while registering clks in
these drivers, allowing us to move closer to a clear split of
consumer and provider clk APIs.
Cc: Guenter Roeck <linux@roeck-us.net> Cc: Sören Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Wed, 1 Jun 2016 23:15:27 +0000 (16:15 -0700)]
clk: si5351: Migrate to clk_hw based OF and registration APIs
Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers while registering clks in
these drivers, allowing us to move closer to a clear split of
consumer and provider clk APIs.
Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Cc: Guenter Roeck <linux@roeck-us.net> Cc: Sören Brinkmann <soren.brinkmann@xilinx.com> Cc: Mike Looijmans <mike.looijmans@topic.nl> Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Wed, 1 Jun 2016 23:15:26 +0000 (16:15 -0700)]
clk: si514: Migrate to clk_hw based OF and registration APIs
Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers while registering clks in
these drivers, allowing us to move closer to a clear split of
consumer and provider clk APIs.
Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Cc: Guenter Roeck <linux@roeck-us.net> Cc: Sören Brinkmann <soren.brinkmann@xilinx.com> Cc: Mike Looijmans <mike.looijmans@topic.nl> Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Wed, 1 Jun 2016 23:15:25 +0000 (16:15 -0700)]
clk: scpi: Migrate to clk_hw based OF and registration APIs
Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers while registering clks in
these drivers, allowing us to move closer to a clear split of
consumer and provider clk APIs.
Cc: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Wed, 1 Jun 2016 23:15:23 +0000 (16:15 -0700)]
clk: rk808: Migrate to clk_hw based OF and registration APIs
Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers while registering clks in
these drivers, allowing us to move closer to a clear split of
consumer and provider clk APIs.
Cc: Chris Zhong <zyw@rock-chips.com> Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Wed, 1 Jun 2016 23:15:22 +0000 (16:15 -0700)]
clk: pwm: Migrate to clk_hw based OF and registration APIs
Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers while registering clks in
these drivers, allowing us to move closer to a clear split of
consumer and provider clk APIs.
Cc: Janusz Uzycki <j.uzycki@elproma.com.pl> Cc: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Wed, 1 Jun 2016 23:15:21 +0000 (16:15 -0700)]
clk: palmas: Migrate to clk_hw based OF and registration APIs
Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers while registering clks in
these drivers, allowing us to move closer to a clear split of
consumer and provider clk APIs.
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Nishanth Menon <nm@ti.com> Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Wed, 1 Jun 2016 23:15:20 +0000 (16:15 -0700)]
clk: nspire: Migrate to clk_hw based OF and registration APIs
Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers while registering clks in
these drivers, allowing us to move closer to a clear split of
consumer and provider clk APIs.
Cc: Daniel Tang <dt.tangr@gmail.com> Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Wed, 1 Jun 2016 23:15:18 +0000 (16:15 -0700)]
clk: moxart: Migrate to clk_hw based OF and registration APIs
Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers while registering clks in
these drivers, allowing us to move closer to a clear split of
consumer and provider clk APIs.
Cc: Jonas Jensen <jonas.jensen@gmail.com> Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Wed, 1 Jun 2016 23:15:17 +0000 (16:15 -0700)]
clk: mb86s7x: Migrate to clk_hw based OF and registration APIs
Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers while registering clks in
these drivers, allowing us to move closer to a clear split of
consumer and provider clk APIs.
Cc: Jassi Brar <jaswinder.singh@linaro.org> Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Wed, 1 Jun 2016 23:15:14 +0000 (16:15 -0700)]
clk: efm32gg: Migrate to clk_hw based OF and registration APIs
Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers while registering clks in
these drivers, allowing us to move closer to a clear split of
consumer and provider clk APIs.
Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Wed, 1 Jun 2016 23:15:13 +0000 (16:15 -0700)]
clk: cs2000: Migrate to clk_hw based OF and registration APIs
Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers while registering clks in
these drivers, allowing us to move closer to a clear split of
consumer and provider clk APIs.
Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Wed, 1 Jun 2016 23:15:12 +0000 (16:15 -0700)]
clk: clps711x: Migrate to clk_hw based OF and registration APIs
Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers while registering clks in
these drivers, allowing us to move closer to a clear split of
consumer and provider clk APIs.
Cc: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Wed, 1 Jun 2016 23:15:11 +0000 (16:15 -0700)]
clk: cdce925: Migrate to clk_hw based OF and provider APIs
Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers while registering clks in
these drivers, allowing us to move closer to a clear split of
consumer and provider clk APIs.
Cc: Mike Looijmans <mike.looijmans@topic.nl> Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Wed, 1 Jun 2016 23:15:10 +0000 (16:15 -0700)]
clk: cdce: Migrate to clk_hw based OF and registration APIs
Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers while registering clks in
these drivers, allowing us to move closer to a clear split of
consumer and provider clk APIs.
Cc: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Wed, 1 Jun 2016 23:15:09 +0000 (16:15 -0700)]
clk: axm5516: Migrate to clk_hw based OF and registration APIs
Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers while registering clks in
these drivers, allowing us to move closer to a clear split of
consumer and provider clk APIs. Make thing simple by using the
existing clk_hw array and implementing a custom DT clk provider
get function to map the clk spec id to a clk_hw pointer.
Cc: Anders Berg <anders.berg@lsi.com> Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Wed, 1 Jun 2016 23:15:08 +0000 (16:15 -0700)]
clk: axi-clkgen: Migrate to clk_hw based OF and registration APIs
Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers while registering clks in
these drivers, allowing us to move closer to a clear split of
consumer and provider clk APIs.
Cc: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Wed, 1 Jun 2016 23:15:07 +0000 (16:15 -0700)]
clk: asm9260: Migrate to clk_hw based registration and OF APIs
Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers while registering clks in
these drivers, allowing us to move closer to a clear split of
consumer and provider clk APIs.
Cc: Oleksij Rempel <linux@rempel-privat.de> Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Wed, 1 Jun 2016 23:15:05 +0000 (16:15 -0700)]
clk: bcm: kona: Migrate to clk_hw based registration and OF APIs
Now that we can use clk_hw pointers we don't need to have two
duplicate arrays holding the same mapping of clk index to clk_hw
pointer. Implement a custom clk_hw provider function to map the
OF specifier to the clk_hw instance for it.
Cc: Alex Elder <elder@linaro.org> Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Vince Hsu [Wed, 24 Aug 2016 13:56:56 +0000 (15:56 +0200)]
clk: tegra: remove TEGRA_PLL_USE_LOCK for PLLD/PLLD2
Tegra114 has a HW bug that the PLLD/PLLD2 lock bit cannot be asserted when
the DIS power domain is during up-powergating process but the clamp to this
domain is not removed yet. That causes a timeout and aborts the power
sequence, although the PLLD/PLLD2 has already locked. To remove the false
alarm, we don't use the lock for PLLD/PLLD2. Just wait 1ms and treat the
clocks as locked.
Signed-off-by: Vince Hsu <vinceh@nvidia.com> Tested-by: Jonathan Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Fabio Estevam [Fri, 12 Aug 2016 18:26:55 +0000 (15:26 -0300)]
clk: imx: Introduce clk_register_gate2()
Introduce imx_clk_gate2_shared2() which is similar to the existing
imx_clk_gate2_shared() and passes CLK_OPS_PARENT_ENABLE flag, which
is useful for i.MX7 shared clocks.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Dt-binding file about reset controller is used to provide
kinds of definition, which is referenced by dts file and
IC-specified reset controller driver code.
Signed-off-by: Shunli Wang <shunli.wang@mediatek.com> Signed-off-by: James Liao <jamesjj.liao@mediatek.com> Signed-off-by: Erin Lo <erin.lo@mediatek.com> Tested-by: John Crispin <blogic@openwrt.org> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Shunli Wang [Fri, 19 Aug 2016 05:34:51 +0000 (13:34 +0800)]
clk: mediatek: Add dt-bindings for MT2701 clocks
Add MT2701 clock dt-bindings, include topckgen, apmixedsys,
infracfg, pericfg and subsystem clocks.
Signed-off-by: Shunli Wang <shunli.wang@mediatek.com> Signed-off-by: James Liao <jamesjj.liao@mediatek.com> Signed-off-by: Erin Lo <erin.lo@mediatek.com> Tested-by: John Crispin <blogic@openwrt.org> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
James Liao [Fri, 19 Aug 2016 05:34:50 +0000 (13:34 +0800)]
dt-bindings: ARM: Mediatek: Document bindings for MT2701
This patch adds the binding documentation for apmixedsys, bdpsys,
ethsys, hifsys, imgsys, infracfg, mmsys, pericfg, topckgen and
vdecsys for Mediatek MT2701.
Signed-off-by: James Liao <jamesjj.liao@mediatek.com> Signed-off-by: Erin Lo <erin.lo@mediatek.com> Tested-by: John Crispin <blogic@openwrt.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
James Liao [Fri, 19 Aug 2016 05:34:49 +0000 (13:34 +0800)]
clk: mediatek: Refine the makefile to support multiple clock drivers
Add a Kconfig to define clock configuration for each SoC, and
modify the Makefile to build drivers that only selected in config.
Signed-off-by: Shunli Wang <shunli.wang@mediatek.com> Signed-off-by: James Liao <jamesjj.liao@mediatek.com> Signed-off-by: Erin Lo <erin.lo@mediatek.com> Tested-by: John Crispin <blogic@openwrt.org> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Wed, 1 Jun 2016 23:15:15 +0000 (16:15 -0700)]
clk: ls1x: Migrate to clk_hw based OF and registration APIs
Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers while registering clks in
these drivers, allowing us to move closer to a clear split of
consumer and provider clk APIs.
Cc: Kelvin Cheung <keguang.zhang@gmail.com> Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Tue, 16 Aug 2016 22:38:56 +0000 (15:38 -0700)]
clk: max77686: Migrate to clk_hw based OF and registration APIs
Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers while registering clks in
these drivers, allowing us to move closer to a clear split of
consumer and provider clk APIs.
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com> Tested-by: Javier Martinez Canillas <javier@osg.samsung.com> Cc: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Tue, 16 Aug 2016 22:40:52 +0000 (15:40 -0700)]
clk: berlin: Migrate to clk_hw based registration and OF APIs
Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers while registering clks in
these drivers, allowing us to move closer to a clear split of
consumer and provider clk APIs. We also remove some __init
markings in header files as they're useless and we're in the
area.
Tested-by: Jisheng Zhang <jszhang@marvell.com> Cc: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Mon, 15 Aug 2016 23:08:49 +0000 (16:08 -0700)]
Merge branch 'clk-qcom-9615' into clk-next
* clk-qcom-9615:
dt-bindings: clock: Update bindings for MDM9615 GCC and LCC
clk: mdm9615: Add support for MDM9615 Clock Controllers
dt-bindings: Add MDM9615 DT bindings include files for GCC and LCC
Kevin Hilman [Tue, 2 Aug 2016 21:40:11 +0000 (14:40 -0700)]
clk: gxbb: add MMC gate clocks, and expose for DT
Add the SD/eMMC gate clocks and expose them for use by DT.
While at it, also explose FCLK_DIV2 since this is one of the input
clocks to the mux internal to each of the SD/eMMC blocks.
Signed-off-by: Kevin Hilman <khilman@baylibre.com> Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Laxman Dewangan [Fri, 17 Jun 2016 10:51:07 +0000 (16:21 +0530)]
clk: max77686: Add support for MAX77620 clocks
Maxim Max77620 has one 32KHz clock output and the clock HW
IP used on this PMIC is same as what it is there in the MAX77686.
Add clock driver support for MAX77620 on the MAX77686 driver.
CC: Krzysztof Kozlowski <k.kozlowski@samsung.com> CC: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Laxman Dewangan [Fri, 17 Jun 2016 10:51:06 +0000 (16:21 +0530)]
clk: max77686: Add DT binding details for PMIC MAX77620
Maxim has used the same clock IP on multiple PMICs like MAX77686,
MAX77802, MAX77620. Only differences are the number of clocks
from these PMICs like MAX77686 has 3 clocks output, MAX776802 have
two clock output and MAX77620 has one clock output.
Add clock binding details and DT example for the MAX77620.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> CC: Krzysztof Kozlowski <k.kozlowski@samsung.com> CC: Javier Martinez Canillas <javier@dowhile0.org> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Laxman Dewangan [Fri, 17 Jun 2016 10:51:05 +0000 (16:21 +0530)]
clk: Combine DT binding doc for max77686 and max77802
The clock IP used on the Maxim PMICs max77686 and max77802 are
same. The configuration of clock register is also same except
the number of clocks.
Define the common DT binding file for the clocks of Maxim PMICs
MAX77686 and MAX77802. For this, remove the separate DT binding
document file for maxim,max77802 and move all information to
maxim,max77686 DT binding document.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> CC: Krzysztof Kozlowski <k.kozlowski@samsung.com> CC: Javier Martinez Canillas <javier@dowhile0.org> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Laxman Dewangan [Fri, 17 Jun 2016 10:51:04 +0000 (16:21 +0530)]
clk: max77686: Combine Maxim max77686 and max77802 driver
The clock IP used on the Maxim PMICs max77686 and max77802 are
same. The configuration of clock register is also same except
the number of clocks.
Part of common code utilisation, there is 3 files for these chips
clock driver, one for common and two files for driver registration.
Combine both drivers into single file and move common code into
same common file reduces the 2 files and make max77686 and max77802
clock driver in single fine. This driver does not depends on the
parent driver structure. The regmap handle is acquired through
regmap APIs for the register access.
This combination of driver helps on adding clock driver for different
Maxim PMICs which has similar clock IP like MAX77620 and MAX20024.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> CC: Krzysztof Kozlowski <k.kozlowski@samsung.com> CC: Javier Martinez Canillas <javier@dowhile0.org> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com> Tested-by: Javier Martinez Canillas <javier@osg.samsung.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Tested-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Sat, 13 Aug 2016 01:50:23 +0000 (18:50 -0700)]
clk: fixed-rate: Remove export symbol on setup function
This function is only called by builtin code, but we always
exported it and had marked it as __init before commit e4eda8e0654c (clk: remove exported function from __init section,
2013-01-06) removed that marking. Given that it isn't used by
modules, lets unexport it and add back __init.
Cc: Denis Efremov <yefremov.denis@gmail.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Mon, 15 Aug 2016 21:32:23 +0000 (14:32 -0700)]
clk: Return errors from clk providers in __of_clk_get_from_provider()
Before commit 0861e5b8cf80 (clk: Add clk_hw OF clk providers,
2016-02-05) __of_clk_get_from_provider() would return an error
pointer of the provider's choosing if there was a provider
registered and EPROBE_DEFER otherwise. After that commit, it
would return EPROBE_DEFER regardless of whether or not the
provider returned an error. This is odd and can lead to behavior
where clk consumers keep probe deferring when they should be
seeing some other error.
Let's restore the previous behavior where we only return
EPROBE_DEFER when there isn't a provider in our of_clk_providers
list. Otherwise, return the error from the last provider we find
that matches the node.
Reported-by: Masahiro Yamada <yamada.masahiro@socionext.com> Fixes: 0861e5b8cf80 ("clk: Add clk_hw OF clk providers") Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
clk: mvebu: Add the peripheral clock driver for Armada 3700
These clocks are the ones which will be used as source for the
peripherals of the Armada 3700 SoC. On this SoC there is two blocks of
clocks: the North bridge one and the South bridge one.
Most of them are gatable. Most of the time their rate are their parent
rated divided by a ratio depending of two registers. Their parent can be
choose between the TBG clocks for most of them.
However, some of them can't choose their parent or directly depend of the
xtal clocks. Other ones do not use exactly the same pattern to find the
ratio between their parent rate and their rate.
For these reason each clock is a composite clock and the operations they
use are different depending of the clock.
According to the datasheet it would be possible to select the parent
clock and the ratio, however currently the driver does not support it.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Peter Ujfalusi [Mon, 30 May 2016 08:55:11 +0000 (11:55 +0300)]
clk: twl6040: Rename the driver and use consistent names in the code
The driver is to provide the functional clock to OMAP4/5 McPDM. The clock
is named as pdmclk in the documentations so change the function names,
structure names and variables to align with this.
At the same time rename the driver from "twl6040-clk" to "twl6040-pdmclk".
This can be done w/o regression since the clock driver is not in use at
the moment, the MFD core driver is not even registering the device for it.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Peter Ujfalusi [Mon, 30 May 2016 08:55:10 +0000 (11:55 +0300)]
clk: twl6040: Register the clock as of_clk_provider
In order ot be able to use the pdmclk clock via DT it need to be registered
as of_clk_provide.
Since the twl6040 clock driver does not have it's own DT node, use the
parent's node for registering.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
clk: mvebu: armada-39x: add clk description for supported interfaces
Both SATA and second USB3.0 interface are supported in Armada-39x SoC
family. Add necessary clk description, so both xhci and sata drivers
can be correctly initialized.
The binding documentation has also been updated accordingly.
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
clk: fixed-rate: Convert into a module platform driver
Adds support for fixed-rate clock providers which have not been
enabled via of_clk_init().
This is required by Device trees overlays that introduce clocks
providers.
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
[sboyd@codeaurora.org: Make new private function static, don't
check clk for NULL when unregistering in driver remove] Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
clk: fixed-factor: Convert into a module platform driver
Adds support for fixed-factor clock providers which have not been
enabled via of_clk_init().
This is required by Device trees overlays that introduce clocks
providers.
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
[sboyd@codeaurora.org: Make new private function static, don't
check clk for NULL when unregistering in driver remove] Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
clk: divider: Fix clk_divider_round_rate() to use clk_readl()
clk-divider uses clk_readl()/clk_writel() everywhere, except in
clk_divider_round_rate(), where plain readl() is used. Change this to
clk_readl(), as it makes a difference on powerpc.
Fixes: e6d5e7d90be92cee ("clk-divider: Fix READ_ONLY when divider > 1") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: James Hogan <james.hogan@imgtec.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
[ 0.000591] ------------[ cut here ]------------
[ 0.000610] WARNING: CPU: 0 PID: 0 at kernel/time/sched_clock.c:179 sched_clock_register+0x44/0x1f8
[ 0.002084] ------------[ cut here ]------------
[ 0.002104] WARNING: CPU: 0 PID: 0 at init/main.c:576 start_kernel+0x258/0x3b0
[ 0.002114] Interrupts were enabled early
This fix is along the same lines as 5e33ebff7edd ("clk: imx7d: do not
set parent of ethernet time/ref clocks") and the explanation from that
commit is:
"The reason for the warning is that setting the parent enables the ENET
PLL since we are using CLK_OPS_PARENT_ENABLE. Enabling the ENET PLL can
cause clk_pllv3_wait_lock to sleep. See also:
commit fc8726a2c021 ("clk: core: support clocks which requires parents
enable (part 2)")."
imx7s-warp does not even use the FEC interface, so we should not really
configure the parent of IMX7D_ENET_AXI_ROOT_SRC in the common MX7 clock
driver code.
The dts file should use the assigned-clocks/assigned-clock-parents method,
so simply remove the configuration of IMX7D_ENET_AXI_ROOT_SRC parent.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
It's always nice to see families reunited, and this is equally true when
talking about parent clocks and their children. However, if the orphan
clk had a positive prepare_count or enable_count, then we would not
migrate those counts up the parent chain correctly.
This has manifested with the recent critical clocks feature, which often
enables clocks very early, before their parents have been registered.
Fixed by replacing the call to clk_core_reparent with calls to
__clk_set_parent_{before,after}.
Cc: James Liao <jamesjj.liao@mediatek.com> Cc: Erin Lo <erin.lo@mediatek.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com>
[sboyd@codeaurora.org: Recalc accuracies and rates too] Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
According to the datasheet, SDn clocks are from the SDSRC clock. And
the SDSRC has a 1/2 divider. So, we should have ".sdsrc" as an internal
core clock. Otherwise, since the sdhi driver will calculate clock for
a sd card using the wrong parent clock rate, and then performance will
be not good.
clk: sunxi-ng: Fix inverted test condition in ccu_helper_wait_for_lock
The condition passed to read*_poll_timeout() is the break condition,
i.e. wait for this condition to happen and return success.
The original code assumed the opposite, resulting in a warning when
the PLL clock rate was changed but never lost it's lock as far as
the readout indicated. This was verified by checking the read out
register value.
Fixes: 1d80c14248d6 ("clk: sunxi-ng: Add common infrastructure") Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>