Merge tag 'imx-clk-v4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into clk-next
The i.MX clock updates for 4.5:
- Add is_prepared function callback for pllv3 clock driver
- Use imx_check_clocks() on imx6ul and imx7d clock drivers to save
some code
- Add a core clock for imx7d to support generic cpufreq driver
- Support imx6q clock routing with OSC to anaclk2/2b
- To support more precise pixel clocks on imx5, allow ipu_di_sel clock
selectors to influence the PLLs that they are derived from
- A cleanup on imx25 OSC clock
Merge tag 'v4.5-rockchip-clk1_1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next
Rockchip clock changes for 4.5 containing
- a new pll-type used on rk3036 and other Cortex-A7 socs
- new clock-trees for rk3036 and rk3228
- switch rk3288 plls to slow mode on reboot
- a bunch of new clock ids
- some more critical clocks
- wrong register offsets for the rk3368 cpuclks
- allowing more than 2 parents for the cpuclk
Heiko Stuebner [Fri, 18 Dec 2015 16:51:55 +0000 (17:51 +0100)]
clk: rockchip: only enter pll slow-mode directly before reboots on rk3288
As commit 1d33929e2a2b ("clk: rockchip: switch PLLs to slow mode before
reboot for rk3288") states, switching the PLLs to slow-mode is only
necessary when rebooting using the soft-reset done through the CRU.
The dwc2 controllers used create really big number of interrupts in
special constellations involving usb-hubs and their number is so high,
it can even overwhelm the interrupt handler if the cpu-speed os to low.
Right now the PLLs are put into slow-mode in a shutdown syscore_ops
callback which means it happens on all reboots (not only the soft-reset
ones) and even on poweroff actions.
This can result in the system not powering off and getting stuck instead,
so we should move the slow-mode change nearer to the actual reboot action.
For this we introduce the possiblity to also set a callback that gets
called from the restart-handler directly prior to restarting the system
and move the shutdown-callback to this new option.
With this the slow-mode switch is done only on the necessary reboots
and also has a smaller possibility of causing artifacts.
Fixes: 1d33929e2a2b ("clk: rockchip: switch PLLs to slow mode before reboot for rk3288") Signed-off-by: Heiko Stuebner <heiko.stuebner@collabora.com> Reviewed-by: Douglas Anderson <dianders@chromium.org>
clk: shmobile: div6: Make clock-output-names optional
Renesas DIV6 clocks provide a single clock output. Hence make the
"clock-output-names" DT property optional instead of mandatory. In case
the DT property is omitted the DT node name will be used.
Rename the variable "name" to "clk_name" to make the code more similar
with fixed-factor-clock.c, and to avoid a conflict with a nested local
variable while we're at it.
Heiko Stuebner [Tue, 1 Dec 2015 21:23:45 +0000 (22:23 +0100)]
clk: rockchip: fix rk3368 cpuclk divider offsets
Due to a copy-paste error the the rk3368 cpuclk settings were acessing
rk3288-specific register offsets. This never caused problems till now,
as cpu frequency scaling in't used currently at all.
Maxime Ripard [Tue, 1 Dec 2015 11:14:52 +0000 (12:14 +0100)]
clk: sunxi: pll2: Fix clock running too fast
Contrary to what the datasheet says, the pre divider doesn't seem to be
incremented by one in the PLL2, but just uses the value from the register,
with 0 being a bypass.
This fixes the audio playing too fast.
Since we now have the same pre-divider flags, and the only difference with
the A10 is the post-divider offset, also remove the structure to just pass
the offset as an argument.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Fixes: eb662f854710 ("clk: sunxi: pll2: Add A13 support") Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Masahiro Yamada [Thu, 3 Dec 2015 02:20:35 +0000 (11:20 +0900)]
clk: let of_clk_get_parent_name() fail for invalid clock-indices
Currently, of_clk_get_parent_name() returns a wrong parent clock name
when "clock-indices" property exists and the target index is not
found in the property. In this case, NULL should be returned.
Currently, of_clk_get_parent_name(consumer_np, 0) returns "clka"
(and of_clk_get_parent_name(consumer_np, 1) also returns "clka",
this is correct). Because the "clock-indices" in the clock parent
does not contain <0>, of_clk_get_parent_name(consumer_np, 0) should
return NULL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Jianqun xu [Wed, 2 Dec 2015 13:22:31 +0000 (21:22 +0800)]
clk: rockchip: protect rk3368 aclk_bus and aclk_peri clocks
Add aclk_bus and aclk_peri to the list of rk3368 critical clocks,
which are the base clocks that supply for all peripherals, never
to be disabled automatically.
Patrick Brünn [Wed, 2 Dec 2015 09:16:37 +0000 (10:16 +0100)]
clk: imx5: ipu_di_sel clocks can set parent rates
To obtain exact pixel clocks, allow the DI clock selectors to influence
the PLLs that they are derived from.
Commit 4591b13289b5 ("ARM: i.MX6: ipu_di_sel clocks can set parent
rates") did this for i.MX6.
Port it to enable high display resolutions on i.MX53 based platforms
such as CX9020 Embedded PC, too.
Signed-off-by: Patrick Brünn <p.bruenn@beckhoff.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Caesar Wang [Tue, 1 Dec 2015 09:13:24 +0000 (17:13 +0800)]
clk: rockchip: Force rk3368 PWM clock (and its parents) on
Most rk3368 boards (especially those with Pmic that followed the lead
from rk3368-evb-act8846) have a PWM regulator on them for vdd_logic.
This is the main voltage for all kinds of misc stuff including the
memory controller.
On these boards it is critically important to make sure that the PWM
never ever glitches and never loses its clock. Any glitch could
crash the system.
Right now there are no users of the PWM regulator and also Linux
thinks that the PWM regulator is disabled. Things happen to work
because firmware configured the PWM and Linux doesn't touch it.
..and the PWM's clock is marked as "ignore unused".
...but things _stop_ working if we turn off serial console. Why?
Because:
1. Serial console shares a parent clock with the PWM (pclk_cpu)
2. If we have no serial console then nobody is holding pclk_cpu on
at reboot time. It gets disabled.
We need to fix a lot of the above problems, but until we get
everything right the cleanest "hack" seems like it is to just keep
the "rk_pwm" clock on always.
Signed-off-by: Caesar Wang <wxt@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Chris Zhong [Fri, 27 Nov 2015 02:09:30 +0000 (10:09 +0800)]
clk: rockchip: switch PLLs to slow mode before reboot for rk3288
We've been seeing some crashes at reboot test on rk3288-based systems,
which boards have not reset pin connected to NPOR, they reboot by
setting 0xfdb9 to RK3288_GLB_SRST_FST register. If the APLL works in
a high frequency mode, some IPs might hang during soft reset.
It appears that we can fix the problem by switching to slow mode before
reboot, just like what we did before suspend.
Signed-off-by: Chris Zhong <zyw@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add a driver for the multimedia clock controller found on MSM8996
based devices. This should allow most multimedia device drivers
to probe and control their clocks.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Tue, 1 Dec 2015 01:31:41 +0000 (17:31 -0800)]
clk: qcom: Add gfx3d ping-pong PLL frequency switching
The GPU clocks on msm8996 have three dedicated PLLs, MMPLL2,
MMPLL8, and MMPLL9. We leave MMPLL9 at the maximum speed (624
MHz), and we use MMPLL2 and MMPLL8 for the other frequencies. To
make switching frequencies faster, we ping-pong between MMPLL2
and MMPLL8 when we're switching between frequencies that aren't
the maximum. Implement custom rcg clk ops for this type of
frequency switching.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Tue, 1 Dec 2015 01:31:40 +0000 (17:31 -0800)]
clk: qcom: Add MSM8996 Global Clock Control (GCC) driver
Add support for the global clock controller found on MSM8996
based devices. This should allow most non-multimedia device
drivers to probe and control their clocks.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Tue, 1 Dec 2015 01:31:39 +0000 (17:31 -0800)]
clk: qcom: Add Alpha PLL support
Add support for configuring rates of, enabling, and disabling
Alpha PLLs. This is sufficient for the types of PLLs found in
the global and multimedia clock controllers.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Tue, 1 Dec 2015 01:31:38 +0000 (17:31 -0800)]
clk: divider: Cap table divider values to 'width' member
When we use a clk divider with a divider table, we limit the
maximum divider value in divider_get_val() to the
div_mask(width), but when we calculate the divider in
divider_round_rate() we don't consider that the maximum divider
may be limited by the width. Pass the width along to
_get_table_maxdiv() so that we only return the maximum divider
that is valid. This is useful for clocks that want to share the
same divider table while limiting the available dividers to some
subset of the table depending on the width of the bitfield.
Cc: Rajendra Nayak <rnayak@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Tero Kristo [Mon, 30 Nov 2015 14:43:25 +0000 (16:43 +0200)]
clk: ti: omap5+: dpll: implement errata i810
Errata i810 states that DPLL controller can get stuck while transitioning
to a power saving state, while its M/N ratio is being re-programmed.
As a workaround, before re-programming the M/N ratio, SW has to ensure
the DPLL cannot start an idle state transition. SW can disable DPLL
idling by setting the DPLL AUTO_DPLL_MODE=0 or keeping a clock request
active by setting a dependent clock domain in SW_WKUP.
This errata impacts OMAP5 and DRA7 chips, so enable the errata for these.
Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Arnd Bergmann [Wed, 25 Nov 2015 22:03:49 +0000 (23:03 +0100)]
clk: mmp: add linux/clk.h includes
The common clk implementation for MMP broke without anyone noticing
when we stopped including linux/clk.h from the clk-provider header.
This did not show up in the defconfig builds because those use the
legacy MMP clk drivers, and it did not show up in my randconfig tests
either because I was testing with my mmp multiplatform series
applied, which at some point gained the fixup.
This fixes the three broken files.
Signed-off-by: Arnd Bergmann <arnd@arndb.de> Fixes: 61ae76563ec3 ("clk: Remove clk.h from clk-provider.h") Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Bai Ping [Tue, 24 Nov 2015 16:06:53 +0000 (00:06 +0800)]
clk: imx: add 'is_prepared' clk_ops callback for pllv3 clk
Add 'is_prepared' callback function for pllv3 type clk to make sure when
the system is bootup, the unused clk is in a known state to match the
prepare count info.
Signed-off-by: Bai Ping <b51503@freescale.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Markus Pargmann [Tue, 24 Nov 2015 11:17:58 +0000 (12:17 +0100)]
clk: imx25: Remove osc clock from driver
The 'osc' clock is already initialized by the fixed clock defined in
imx25.dtsi. The imx25 clock driver tries to add this clock for a second
time and fails with -EEXIST:
i.MX clk 1: register failed with -17
As the clock is already properly setup in DT with a different driver, we
can completely remove the handling in the imx25 clock driver.
Signed-off-by: Markus Pargmann <mpa@pengutronix.de> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
clk: ti: drop locking code from mux/divider drivers
TI's mux and divider clock drivers do not require locking and they do
not initialize internal spinlocks. This code was occasionally
copy-posted from generic mux/divider drivers. So remove it.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
Neil Armstrong [Fri, 13 Nov 2015 16:29:58 +0000 (17:29 +0100)]
clk: ti816x: Add missing dmtimer clkdev entries
Add missing clkdev dmtimer related entries for dm816x.
32Khz and ext sources were missing.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Cc: Brian Hutchinson <b.hutchman@gmail.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
Xing Zheng [Thu, 5 Nov 2015 07:33:57 +0000 (15:33 +0800)]
clk: rockchip: add new pll-type for rk3036 and similar socs
The rk3036's pll and clock are different with base on the rk3066(rk3188,
rk3288, rk3368 use it), there are different adjust foctors and control
registers, so these should be independent and separate from the series
of rk3066s.
Georgi Djakov [Thu, 19 Nov 2015 13:57:56 +0000 (15:57 +0200)]
clk: qcom: msm8916: Move xo and sleep clocks into DT
Move the xo and sleep clocks to device-tree, instead of hard-coding
them in the driver. This allows us to insert the RPM clocks (if they
are enabled) in between the on-board oscillators and the actual clock.
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Florian Fainelli [Fri, 30 Oct 2015 01:23:18 +0000 (18:23 -0700)]
clk: bcm: Add BCM63138 clock support
BCM63138 has a simple clocking domain which is primarily the ARMPLL
clocking complex, from which the ARM (CPU), APB and AXI clocks would be
derived from.
Since the ARMPLL controller is entirely compatible with the iProc ARM
PLL, we just initialize it without additional parameters.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Florian Fainelli [Fri, 30 Oct 2015 01:23:17 +0000 (18:23 -0700)]
clk: iproc: Extend binding to cover BCM63138
Broadcom BCM63138 DSL SoCs have the same ARMPLL clocking infrastructure
as the Cygnus and iProc chips, add a dedicated compatible string and
document that the ARMPLL node is a valid node for this chip.
Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Mon, 9 Nov 2015 22:30:54 +0000 (14:30 -0800)]
clk: qcom: Specify LE device endianness
All these clock controllers are little endian devices, but so far
we've been relying on the regmap mmio bus handling this for us
without explicitly stating that fact. After commit 4a98da2164cf
(regmap-mmio: Use native endianness for read/write, 2015-10-29),
the regmap mmio bus will read/write with the __raw_*() IO
accessors, instead of using the readl/writel() APIs that do
proper byte swapping for little endian devices.
So if we're running on a big endian processor and haven't
specified the endianness explicitly in the regmap config or in
DT, we're going to switch from doing little endian byte swapping
to big endian accesses without byte swapping, leading to some
confusing results. On my apq8074 dragonboard, this causes the
device to fail to boot as we access the clock controller with
big endian IO accesses even though the device is little endian.
Specify the endianness explicitly so that the regmap core
properly byte swaps the accesses for us.
Reported-by: Kevin Hilman <khilman@linaro.org> Tested-by: Tyler Baker <tyler.baker@linaro.org> Tested-by: Kevin Hilman <khilman@linaro.org> Cc: Simon Arlott <simon@fire.lp0.eu> Cc: Mark Brown <broonie@kernel.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Arnd Bergmann [Thu, 12 Nov 2015 14:24:29 +0000 (15:24 +0100)]
clk: st: avoid uninitialized variable use
quadfs_pll_fs660c32_round_rate prints a few structure members
that are never initialized, and also doesn't print the only one
it cares about. We get a gcc warning about the ones that
are printed:
clk/st/clkgen-fsyn.c:560:93: warning: 'params.sdiv' may be used uninitialized in this function
clk/st/clkgen-fsyn.c:560:93: warning: 'params.mdiv' may be used uninitialized in this function
clk/st/clkgen-fsyn.c:560:93: warning: 'params.pe' may be used uninitialized in this function
clk/st/clkgen-fsyn.c:560:93: warning: 'params.nsdiv' may be used uninitialized in this function
This changes the code to no longer print uninitialized data, and
for good measure it also prints the ndiv member that is being
set.
Signed-off-by: Arnd Bergmann <arnd@arndb.de> Fixes: 5f7aa9071e93 ("clk: st: Support for QUADFS inside ClockGenB/C/D/E/F") Acked-by: Gabriel Fernandez <gabriel.fernandez@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
clk: at91: Revert "keep slow clk enabled to prevent system hang"
Commit dca1a4b5ff6e ("clk: at91: keep slow clk enabled to prevent system
hang") added a workaround for the slow clock as it is not properly handled
by its users.
Now that the slow clock is taken properly by the drivers, this workaround
is not necessary anymore, revert it.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Michael Turquette <mturquette@baylibre.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Jacob Siverskog [Fri, 20 Nov 2015 18:03:13 +0000 (19:03 +0100)]
clk: si5351: Add PLL soft reset
This is according to figure 12 ("I2C Programming Procedure") in
"Si5351A/B/C Data Sheet"
(https://www.silabs.com/Support%20Documents/TechnicalDocs/Si5351-B.pdf).
Without the PLL soft reset, we were unable to get three outputs
working at the same time.
According to Silicon Labs support, performing PLL soft reset will only
be noticeable if the PLL parameters have been changed.
Signed-off-by: Jacob Siverskog <jacob@teenage.engineering> Signed-off-by: Jens Rudberg <jens@teenage.engineering> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Jyri Sarha [Tue, 17 Nov 2015 09:56:44 +0000 (11:56 +0200)]
clk: gpio: Get parent clk names in of_gpio_clk_setup()
Get parent clk names in of_gpio_clk_setup() and store the names
in struct clk_gpio_delayed_register_data instead of doing it from
the clk provider's get() callback. of_clk_get_parent_name() can't
be called in struct of_clk_provider's get() callback since it may
make a call to of_clk_get_from_provider() and this in turn tries
to recursively lock of_clk_mutex.
Signed-off-by: Jyri Sarha <jsarha@ti.com> Cc: Sergej Sawazki <ce3a@gmx.de> Fixes: 0a4807c2f9a4 ("clk: Make of_clk_get_parent_name() robust with #clock-cells = 1") Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Marc Gonzalez [Fri, 30 Oct 2015 12:25:28 +0000 (13:25 +0100)]
clk: tango4: clkgen driver for Tango4 platforms
Provide support for Sigma Designs Tango4 clock generator.
NOTE: This driver is incompatible with Tango3 clkgen.
Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
[sboyd@codeaurora.org: Add kernel.h include for panic/sprintf] Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Tue, 27 Oct 2015 01:10:09 +0000 (18:10 -0700)]
clk: qcom: Move cxo/pxo/xo into dt files
Put these clocks into the dt files instead of registering them
from C code. This provides a few benefits. It allows us to
specify the frequency of these clocks at the board level instead
of hard-coding them in the driver. It allows us to insert an RPM
clock in between the consumers of the crystals and the actual
clock. And finally, it helps us transition the GCC driver to use
RPM clocks when that configuration is enabled.
Cc: Georgi Djakov <georgi.djakov@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Tue, 27 Oct 2015 00:11:32 +0000 (17:11 -0700)]
clk: qcom: common: Add API to register board clocks backwards compatibly
We want to put the XO board clocks into the dt files, but we also
need to be backwards compatible with an older dtb. Add an API to
the common code to do this. This also makes a place for us to
handle the case when the RPM clock driver is enabled and we don't
want to register the fixed factor clock.
Cc: Georgi Djakov <georgi.djakov@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Linus Torvalds [Sun, 15 Nov 2015 17:36:24 +0000 (09:36 -0800)]
Merge branch 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull perf updates from Thomas Gleixner:
"Mostly updates to the perf tool plus two fixes to the kernel core code:
- Handle tracepoint filters correctly for inherited events (Peter
Zijlstra)
- Prevent a deadlock in perf_lock_task_context (Paul McKenney)
- Add missing newlines to some pr_err() calls (Arnaldo Carvalho de
Melo)
- Print full source file paths when using 'perf annotate --print-line
--full-paths' (Michael Petlan)
- Fix 'perf probe -d' when just one out of uprobes and kprobes is
enabled (Wang Nan)
- Add compiler.h to list.h to fix 'make perf-tar-src-pkg' generated
tarballs, i.e. out of tree building (Arnaldo Carvalho de Melo)
- Add the llvm-src-base.c and llvm-src-kbuild.c files, generated by
the 'perf test' LLVM entries, when running it in-tree, to
.gitignore (Yunlong Song)
- libbpf error reporting improvements, using a strerror interface to
more precisely tell the user about problems with the provided
scriptlet, be it in C or as a ready made object file (Wang Nan)
- Do not be case sensitive when searching for matching 'perf test'
entries (Arnaldo Carvalho de Melo)
- Inform the user about objdump failures in 'perf annotate' (Andi
Kleen)
- Improve the LLVM 'perf test' entry, introduce a new ones for BPF
and kbuild tests to check the environment used by clang to compile
.c scriptlets (Wang Nan)"
* 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (32 commits)
perf/x86/intel/rapl: Remove the unused RAPL_EVENT_DESC() macro
tools include: Add compiler.h to list.h
perf probe: Verify parameters in two functions
perf session: Add missing newlines to some pr_err() calls
perf annotate: Support full source file paths for srcline fix
perf test: Add llvm-src-base.c and llvm-src-kbuild.c to .gitignore
perf: Fix inherited events vs. tracepoint filters
perf: Disable IRQs across RCU RS CS that acquires scheduler lock
perf test: Do not be case sensitive when searching for matching tests
perf test: Add 'perf test BPF'
perf test: Enhance the LLVM tests: add kbuild test
perf test: Enhance the LLVM test: update basic BPF test program
perf bpf: Improve BPF related error messages
perf tools: Make fetch_kernel_version() publicly available
bpf tools: Add new API bpf_object__get_kversion()
bpf tools: Improve libbpf error reporting
perf probe: Cleanup find_perf_probe_point_from_map to reduce redundancy
perf annotate: Inform the user about objdump failures in --stdio
perf stat: Make stat options global
perf sched latency: Fix thread pid reuse issue
...
Linus Torvalds [Sun, 15 Nov 2015 17:34:32 +0000 (09:34 -0800)]
Merge branch 'locking-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull liblockdep fixes from Thomas Gleixner:
"Three small patches to synchronize liblockdep with the latest core
changes"
* 'locking-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
tools/liblockdep: explicitly declare lockdep API we call from liblockdep
tools/liblockdep: add userspace versions of WRITE_ONCE and RCU_INIT_POINTER
tools/liblockdep: remove task argument from debug_check_no_locks_held
Linus Torvalds [Sun, 15 Nov 2015 17:32:59 +0000 (09:32 -0800)]
Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 fixes from Thomas Gleixner:
"A couple of fixes and updates related to x86:
- Fix the W+X check regression on XEN
- The real fix for the low identity map trainwreck
- Probe legacy PIC early instead of unconditionally allocating legacy
irqs
- Add cpu verification to long mode entry
- Adjust the cache topology to AMD Fam17H systems
- Let Merrifield use the TSC across S3"
* 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
x86/cpu: Call verify_cpu() after having entered long mode too
x86/setup: Fix low identity map for >= 2GB kernel range
x86/mm: Skip the hypervisor range when walking PGD
x86/AMD: Fix last level cache topology for AMD Fam17h systems
x86/irq: Probe for PIC presence before allocating descs for legacy IRQs
x86/cpu/intel: Enable X86_FEATURE_NONSTOP_TSC_S3 for Merrifield
Linus Torvalds [Sun, 15 Nov 2015 17:10:53 +0000 (09:10 -0800)]
Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS updates from Ralf Baechle:
"These are the highlists of the main MIPS pull request for 4.4:
- Add latencytop support
- Support appended DTBs
- VDSO support and initially use it for gettimeofday.
- Drop the .MIPS.abiflags and ELF NOTE sections from vmlinux
- Support for the 5KE, an internal test core.
- Switch all MIPS platfroms to libata drivers.
- Improved support, cleanups for ralink and Lantiq platforms.
- Support for the new xilfpga platform.
- A number of DTB improvments for BMIPS.
- Improved support for CM and CPS.
- Minor JZ4740 and BCM47xx enhancements"
* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (120 commits)
MIPS: idle: add case for CPU_5KE
MIPS: Octeon: Support APPENDED_DTB
MIPS: vmlinux: create a section for appended DTB
MIPS: Clean up compat_siginfo_t
MIPS: Fix PAGE_MASK definition
MIPS: BMIPS: Enable GZIP ramdisk and timed printks
MIPS: Add xilfpga defconfig
MIPS: xilfpga: Add mipsfpga platform code
MIPS: xilfpga: Add xilfpga device tree files.
dt-bindings: MIPS: Document xilfpga bindings and boot style
MIPS: Make MIPS_CMDLINE_DTB default
MIPS: Make the kernel arguments from dtb available
MIPS: Use USE_OF as the guard for appended dtb
MIPS: BCM63XX: Use pr_* instead of printk
MIPS: Loongson: Cleanup CONFIG_LOONGSON_SUSPEND.
MIPS: lantiq: Disable xbar fpi burst mode
MIPS: lantiq: Force the crossbar to big endian
MIPS: lantiq: Initialize the USB core on boot
MIPS: lantiq: Return correct value for fpi clock on ar9
MIPS: ralink: Add missing clock on rt305x
...
Linus Torvalds [Sat, 14 Nov 2015 17:43:00 +0000 (09:43 -0800)]
Merge tag 'sound-fix-4.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound
Pull sound fixes from Takashi Iwai:
"Here are a collection of small fixes tha have been gathered for
4.4-rc1. The only significant changes are those in PCI drivers
Kconfig, to use "depends on" instead of "select" for CONFIG_ZONE_DMA.
A reverse select is often more user-friendly, but in this case, it
makes hard to manage with the conflict with ZONE_DEVICE, so changed in
such a way for now.
Others are all small fixes and quirks: an error check in soundcore
reigster_chrdev(), HD-audio HDMI/DP phantom jack fix, Intel Broxton DP
quirk, USB-audio DSD device quirk, some constifications, etc"
* tag 'sound-fix-4.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound:
ALSA: pci: depend on ZONE_DMA
ALSA: hda - Simplify phantom jack handling for HDMI/DP
ALSA: hda/hdmi - apply Skylake fix-ups to Broxton display codec
ALSA: ctxfi: constify rsc ops structures
ALSA: usb: Add native DSD support for Aune X1S
ALSA: oxfw: add an comment to Kconfig for TASCAM FireOne
sound: fix check for error condition of register_chrdev()
Linus Torvalds [Sat, 14 Nov 2015 17:09:37 +0000 (09:09 -0800)]
Merge tag 'arc-4.4-rc1-part2' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc
Pull ARC fixes from Vineet Gupta:
"Found a couple of brown paper bag bugs with the prev pull request
(including a SMP build breakage report from Guenter). Since these are
urgent I also decided to send over a bunch of other pending fixes
which could have otherwise waited an rc or two.
Summary:
- A bunch of brown paper bag bugs (MAINTAINERS list email, SMP build
failure)
- cpu_relax() now compiler barrier for UP as well
- handling of userspace Bus Errors for ARCompact builds"
* tag 'arc-4.4-rc1-part2' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc:
ARC: Fix silly typo in MAINTAINERS file
ARC: cpu_relax() to be compiler barrier even for UP
ARC: use ASL assembler mnemonic
ARC: [arcompact] Handle bus error from userspace as Interrupt not exception
ARC: remove extraneous header include
ARCv2: lib: memcpy: use local symbols
Vineet Gupta [Mon, 9 Nov 2015 12:18:34 +0000 (17:48 +0530)]
ARC: cpu_relax() to be compiler barrier even for UP
cpu_relax() on ARC has been barrier only for SMP (and no-op for UP). Per
recent discussions, it is safer to make it a compiler barrier
unconditionally.
Vineet Gupta [Fri, 30 Oct 2015 19:52:51 +0000 (01:22 +0530)]
ARC: [arcompact] Handle bus error from userspace as Interrupt not exception
Bus errors from userspace on ARCompact based cores are handled by core
as a high priority L2 interrupt but current code treated it as interrupt
Handling an interrupt like exception is certainly not going to go unnoticed.
(and it worked so far as we never saw a Bus error from userspace until
IPPK guys tested a DDR controller with ECC error detection etc hence
needed to explicitly trigger/handle such errors)
- So move mem_service exception handler from common code into ARCv2 code.
- In ARCompact code, define mem_service as L2 interrupt handler which
just drops down to pure kernel mode and goes of to enqueue SIGBUS
Reported-by: Nelson Pereira <npereira@synopsys.com> Tested-by: Ana Martins <amartins@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Linus Torvalds [Sat, 14 Nov 2015 05:53:18 +0000 (21:53 -0800)]
Merge tag 'chrome-platform-4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/olof/chrome-platform
Pull chrome platform updates from Olof Johansson:
"Here's the branch of chrome platform changes for v4.4. Some have been
queued up for the full 4.3 release cycle since I forgot to send them
in for that round (rebased early on to deal with fixes conflicts).
Most of these enable EC communication stuff -- Pixel 2015 support,
enabling building for ARM64 platforms, and a few fixes for memory
leaks.
There's also a patch in here to allow reading/writing the verified
boot context, which depends on a sysfs patch acked by Greg"
* tag 'chrome-platform-4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/olof/chrome-platform:
platform/chrome: Fix i2c-designware adapter name
platform/chrome: Support reading/writing the vboot context
sysfs: Support is_visible() on binary attributes
platform/chrome: cros_ec: Fix possible leak in led_rgb_store()
platform/chrome: cros_ec: Fix leak in sequence_store()
platform/chrome: Enable Chrome platforms on 64-bit ARM
platform/chrome: cros_ec_dev - Add a platform device ID table
platform/chrome: cros_ec_lpc - Add support for Google Pixel 2
platform/chrome: cros_ec_lpc - Use existing function to check EC result
platform/chrome: Make depends on MFD_CROS_EC instead CROS_EC_PROTO
Revert "platform/chrome: Don't make CHROME_PLATFORMS depends on X86 || ARM"
Linus Torvalds [Sat, 14 Nov 2015 05:47:06 +0000 (21:47 -0800)]
Merge tag 'platform-drivers-x86-v4.4-2' of git://git.infradead.org/users/dvhart/linux-platform-drivers-x86
Pull another x86 platform driver update from Darren Hart:
"Support for the unfortunately rather unique ESC key on the Ideapad
Yoga 3 and two DMI matches for rfkill support. Solitary fix for
potential missed errors for asus-wmi. Downgrade a thinkpad_acpi
message to info.
asus-wmi:
- fix error handling in store_sys_wmi()
ideapad-laptop:
- Add Lenovo Yoga 900 to no_hw_rfkill dmi list
- include Yoga 3 1170 in add rfkill whitelist
- add support for Yoga 3 ESC key
thinkpad_acpi:
- Don't yell on unsupported brightness interfaces"
* tag 'platform-drivers-x86-v4.4-2' of git://git.infradead.org/users/dvhart/linux-platform-drivers-x86:
asus-wmi: fix error handling in store_sys_wmi()
ideapad-laptop: Add Lenovo Yoga 900 to no_hw_rfkill dmi list
ideapad-laptop: include Yoga 3 1170 in add rfkill whitelist
ideapad-laptop: add support for Yoga 3 ESC key
thinkpad_acpi: Don't yell on unsupported brightness interfaces
Linus Torvalds [Sat, 14 Nov 2015 05:41:14 +0000 (21:41 -0800)]
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input
Pull more input updates from Dmitry Torokhov:
"An update to the tsc2005 driver that allows it to also support tsc2004
(basically the same controller, but uses i2c instead of spi bus), and
a couple of bug fixes"
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input:
Input: parkbd - drop bogus __init from parkbd_allocate_serio()
Input: elantech - add Fujitsu Lifebook U745 to force crc_enabled
Input: tsc2004 - add support for tsc2004
Input: tsc200x-core - rename functions and variables
Input: tsc2005 - separate SPI and core functions
Linus Torvalds [Sat, 14 Nov 2015 04:35:54 +0000 (20:35 -0800)]
Merge tag 'scsi-misc' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi
Pull final round of SCSI updates from James Bottomley:
"Sorry for the delay in this patch which was mostly caused by getting
the merger of the mpt2/mpt3sas driver, which was seen as an essential
item of maintenance work to do before the drivers diverge too much.
Unfortunately, this caused a compile failure (detected by linux-next),
which then had to be fixed up and incubated.
In addition to the mpt2/3sas rework, there are updates from pm80xx,
lpfc, bnx2fc, hpsa, ipr, aacraid, megaraid_sas, storvsc and ufs plus
an assortment of changes including some year 2038 issues, a fix for a
remove before detach issue in some drivers and a couple of other minor
issues"
* tag 'scsi-misc' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi: (141 commits)
mpt3sas: fix inline markers on non inline function declarations
sd: Clear PS bit before Mode Select.
ibmvscsi: set max_lun to 32
ibmvscsi: display default value for max_id, max_lun and max_channel.
mptfusion: don't allow negative bytes in kbuf_alloc_2_sgl()
scsi: pmcraid: replace struct timeval with ktime_get_real_seconds()
mvumi: 64bit value for seconds_since1970
be2iscsi: Fix bogus WARN_ON length check
scsi_scan: don't dump trace when scsi_prep_async_scan() is called twice
mpt3sas: Bump mpt3sas driver version to 09.102.00.00
mpt3sas: Single driver module which supports both SAS 2.0 & SAS 3.0 HBAs
mpt2sas, mpt3sas: Update the driver versions
mpt3sas: setpci reset kernel oops fix
mpt3sas: Added OEM Gen2 PnP ID branding names
mpt3sas: Refcount fw_events and fix unsafe list usage
mpt3sas: Refcount sas_device objects and fix unsafe list usage
mpt3sas: sysfs attribute to report Backup Rail Monitor Status
mpt3sas: Ported WarpDrive product SSS6200 support
mpt3sas: fix for driver fails EEH, recovery from injected pci bus error
mpt3sas: Manage MSI-X vectors according to HBA device type
...
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