Laxman Dewangan [Thu, 16 Aug 2012 20:59:59 +0000 (20:59 +0000)]
ARM: dt: tegra: harmony: add regulators
Harmony uses a TPS6586x regulator. Instantiate this, and hook up a
couple of fixed GPIO-controlled regulators too.
Based on Ventana regulator patch by Stephen Warren <swarren@nvidia.com>
and converted to Harmony.
swarren made the following changes:
* Added ldo0 regulator configuration to device tree, and updated
board-harmony-pcie.c for the new regulator name.
* Fixed vdd_1v05's voltage from 10.5V to 1.05V.
* Modified board-harmony-pcie.c to obtain the en_vdd_1v05 GPIO number at
run-time from device tree instead of hard-coding it.
* Removed board-harmony{-power.c,.h} now that they're unused.
* Disabled vdd_1v05 regulator; the code in board-harmony-pcie.c hijacks
this GPIO for now. This will be fixed when the PCIe driver is re-
written as a driver. The code can't regulator_get("vdd_1v05") right
now, because the vdd_1v05 regulator's probe gets deferred due to its
supply being the PMIC, which gets probed after the regulator the first
time around, and this dependency is only resolved by repeated probing,
which happens when deferred_probe_initcall() is called, which happens
in a late initcall, whose runtime order relative to harmony_pcie_init()
is undefined, since that's also called from a late initcall.
* Removed unused harmony_pcie_initcall().
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
arch/arm/mach-tegra/tegra30_clocks.c: In function 'clk_measure_input_freq':
arch/arm/mach-tegra/tegra30_clocks.c:418:2: warning: passing argument 2 of '__raw_writel' makes pointer from integer without a cast
.../arch/arm/include/asm/io.h:88:20: note: expected 'volatile void *' but argument is of type 'unsigned int
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Stephen Warren [Tue, 4 Sep 2012 21:55:43 +0000 (15:55 -0600)]
MAINTAINERS: tegra: remove Olof/Colin, add device tree files
At Linux Plumbers conference, Olof and Colin both told me to remove them
from the MAINTAINERS file. Thank you both very much for all the help with
Tegra!
Also, include all Tegra-related device-tree files in the file list.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Olof Johansson <olof@lixom.net> Acked-by: Colin Cross <ccross@android.com>
Stephen Warren [Fri, 3 Aug 2012 21:24:38 +0000 (15:24 -0600)]
ARM: tegra: remove board (but not DT) support for Harmony
Harmony can be booted using device tree with equal functionality as when
booted using a board file. Remove as much of the board file as is
possible, since it's no longer needed.
Two special-cases are still left in board-dt-tegra20.c, since the Tegra
PCIe driver doesn't support device tree yet, and the Harmony .dts file
doesn't yet describe regulators which are needed for PCIe. This logic is
now enabled unconditionally rather than via CONFIG_MACH_HARMONY. While
this is more code than other boards, it's still unlikely to be much of a
problem, and both regulators and PCIe should be supported via device tree
in the near future, allowing the remaining code to be removed.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Stephen Warren [Wed, 5 Sep 2012 15:58:27 +0000 (09:58 -0600)]
ARM: enable SUSPEND/ARCH_SUSPEND_POSSIBLE for ARCH_TEGRA
Even though system suspend/resume hasn't been validated on Tegra yet,
this Kconfig option needs to be enabled so that system shutdown is
reliable on an SMP system. Without it, I2C interrupts may be routed
to CPU0, whereas shutdown code may be running on CPU1, causing I2C
timeouts, preventing communication with the external PMIC.
This reverts 3d5e8af "ARM: disable SUSPEND/ARCH_SUSPEND_POSSIBLE for
ARCH_TEGRA".
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Stephen Warren [Fri, 3 Aug 2012 21:09:04 +0000 (15:09 -0600)]
ARM: tegra: remove board (but not DT) support for Paz00
Paz00 (Toshiba AC100) can be booted using device tree with equal
functionality as when booted using a board file. Remove as much of the
board file as is possible, since it's no longer needed.
One special-case is still left in board-dt-tegra20.c, since there is no
way to create a WiFi rfkill device from device tree yet. This logic is
now enabled unconditionally rather than via CONFIG_MACH_PAZ00. The extra
cases where it's enabled (.configs which did not enable Paz00 support)
shouldn't impact much since the amount of code is tiny.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-By: Marc Dietrich <marvin24@gmx.de>
Stephen Warren [Fri, 3 Aug 2012 20:55:36 +0000 (14:55 -0600)]
ARM: tegra: remove board (but not DT) support for TrimSlice
TrimSlice can be booted using device tree with equal functionality as
when booted using a board file. Remove the board file since it's no
longer needed.
One special-case is still left in board-dt-tegra20.c, since the Tegra
PCIe driver doesn't support device tree yet. This logic is now enabled
by CONFIG_TEGRA_PCI rather than via CONFIG_MACH_TRIMSLICE. The extra
cases where it's enabled (.configs which did not enable TrimSlice
support) shouldn't impact much since the amount of code is tiny.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Stephen Warren [Mon, 25 Jun 2012 22:41:25 +0000 (16:41 -0600)]
ARM: dt: tegra: whistler: add regulators
Whistler uses a Maxim 8907 regulator. Instantiate this.
The voltage settings were derived from the schematic. The only exception
is the BBAT voltage; the schematic says 1.2v, but the HW can't go that
low, so use the HW default of 2.4v instead.
Almost all regulators list all driven supply signal names in their
regulator-names property. The exception is nvvdd_sv3, which is in turn
named 12 more different names on the schematic, so these were omitted
for brevity.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Stephen Warren [Thu, 21 Jun 2012 20:24:57 +0000 (14:24 -0600)]
ARM: dt: tegra: paz00: add regulators
The Toshiba AC100/PAZ00 uses a TPS6586x regulator. Instantiate this.
Three data sources were used for the data encoded here:
* The HW defaults, as extracted from real HW.
* The schematic, which specifies a voltage for each rail in the signal
names.
* The AC100 kernel used by the Ubuntu port:
For many rails, the constraints in that tree specified differing min
and max voltages. In all cases, the min value was ignored, since
there's no need currently to vary any of the voltages at run-time.
DVFS might change this in the future.
In most cases these sources all matched. Differences are:
sm0: HW defaults and schematic match at 1.2v. marvin24's kernel had a max
of 1.3v, but this higher voltage was only applied to HW by DVFS code,
which isn't currently supported in mainline.
sm1: HW defaults and schematic match at 1.0v. marvin24's kernel had a max
of 1.125v, but this higher voltage was only applied to HW by DVFS code,
which isn't currently supported in mainline.
ldo3: The HW default is on. marvin24's kernel didn't specify always-on,
but since the board wasn't marked as having fully constrained regulators,
the rail was not turned off, so the difference had no effect. The rail
is needed for USB.
ldo6: The HW default is 2.85v. The schematics indicate 2.85v. However,
since this regulator is used for the same purpose as on other boards that
require 1.8v, this is set to 1.8v. Note that this regulator feeds the CRT
VDAC on Tegra, and so in practice is unlikely to be used, even though it
is actaully hooked up in HW.
Portions based on work by Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com> Tested-by: Marc Dietrich <marvin24@gmx.de> # v2 Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
Stephen Warren [Wed, 20 Jun 2012 21:58:34 +0000 (15:58 -0600)]
ARM: dt: tegra: seaboard: add regulators
Seaboard uses a TPS6586x regulator. Instantiate this, and hook up a
couple of fixed GPIO-controlled regulators too.
Two data sources were used for the data encoded here:
* The HW defaults, as extracted from real HW.
* The schematic, which specifies a voltage for each LDO rail.
In most cases these sources matched. The only differences is:
ldo6: The HW default on Springbank is 2.85v. The HW default on Seaboard
is 1.8v. The schematics for both Springbank and Seaboard match at 2.85v.
However, internal research indicates that the schematics are incorrectly
labelled, and 1.8v is correct. The ChromeOS kernel also uses 1.8v.
Note that these settings don't entirely match those in the ChromeOS
kernel found at the URL below. However, the selected values generally
cause no behavior change in the kernel, and so were picked to avoid
regressions.
Laxman Dewangan [Thu, 9 Aug 2012 11:00:39 +0000 (16:30 +0530)]
ARM: tegra: cardhu: add dt entry for fixed regulators
Cadhu have multiple power rails which are controlled by
GPIOs. Add support of these power rail control through
fixed regulators. Add entry for all fixed regulators for
cardhu-a02 and a04.
The details are taken from downstream kernel.
Some points on this change are:
* Add the tps65910-LDO5 entry and make it always ON
to supply power to SDMMC. Once the sd driver support
regulator handling, this flag will be remove.
* Dropping registration of rail vdd_sdmmc1 as the gpio
is used by sdhci power-gpio. This need to fix in
sdhci driver and then need to add the registration
mechanism. Just removing power-gpio and adding fixed
regulator with this gpio is causing the sd access to
fail because first probe call of this regulator fails
due to non-available of parent and so it calls
gpio_free() which disable the pins in gpio mode make
pin output to LOW causes power to OFF. In probe retry,
it got success and it powered-on but it again need to
do again numeration of card here.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Laxman Dewangan [Thu, 9 Aug 2012 11:00:38 +0000 (16:30 +0530)]
ARM: dt: tegra: cardhu: split dts file for support multiple board versions
There is multiple version of cardhu starting from A01 to A07.
Cardhu A01 and A03 are not supported. Cardhu A02 will have
different sets of GPIOs for fixed regulator compare to
cardhu A04. The Cardhu A05, A06, A07 are compatibe with A04.
Based on cardhu version, the related dts file need to be chosen
like for cardhu A02, use tegra30-cardhu-a02.dts, cardhu A04 and
more, use tegra30-cardhu-a04.dts.
This patch create the DTS file A02 and A04 and convert tegra30-cardhu.dts
as dts include file.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Laxman Dewangan [Thu, 9 Aug 2012 11:00:37 +0000 (16:30 +0530)]
ARM: dt: tegra: cardhu: add entry for PMIC TPS65911.
Tegra30 based platform "cardhu" have the power management
IC TPS65911 for the regulator.
Adding DT entry for this device.
Data are chosen from downstream kernel and making the
voltage output as require by default for device to
operate.
The default interrupt line is HIGH from PMIC device and so
inverting the interrupt detection line of PMU interrupt
through configuring PMC.
In this patch, do not registering LDO5 because the input
supply for this rail is different for different version of
cardhu i..e A02 and A04. The registration will be done once
the dts file for cardhu A02 and A04 are added in follow on
patches.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Marc Dietrich [Sat, 18 Aug 2012 17:10:41 +0000 (19:10 +0200)]
ARM: tegra: update defconfig to support more paz00 hardware
This update adds various devices found on the usb bus on PAZ00 boards:
- Wifi chip (rt3070)
- Bluetooth (btusb)
- Camera (uvcvideo)
- 3G modem (acm and wdm)
These are enabled as modules because they are not needed for boot and
will not be used on other boards. Wifi also needs to be module because
of the firmware loader.
The update also enabled support for the rfkill switch, the Wifi LED and
the nvec power and led driver which got lost in the past.
Finally, devtmpfs and tmpfs acls are enabled because they are mandatory
on modern linux distros.
Signed-off-by: Marc Dietrich <marvin24@gmx.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Cc: Thierry Reding <thierry.reding@avionic-design.de> Cc: Marc Dietrich <marvin24@gmx.de>
Laxman Dewangan [Sat, 18 Aug 2012 19:17:47 +0000 (00:47 +0530)]
i2c: tegra: dynamically control fast clk
Tegra I2C driver enables the fast clock during initialization
and does not disable till driver removed.
Enable this clock before transfer and disable after transfer done.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Wolfram Sang <w.sang@pengutronix.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Laxman Dewangan [Sat, 18 Aug 2012 19:17:46 +0000 (00:47 +0530)]
i2c: tegra: I2_M_NOSTART functionality not supported in Tegra20
Tegra20 i2c controller does not support the continue transfer
which implements the I2C_M_NOSTART functionality of i2c
protocol mangling.
Removing the I2C_M_NOSTART functionality support for Tegra20.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Wolfram Sang <w.sang@pengutronix.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Laxman Dewangan [Wed, 8 Aug 2012 07:51:34 +0000 (13:21 +0530)]
ARM: tegra: clock: remove unused clock entry for i2c
Tegra20 clock table have the entry for clock (tegra_i2c.x, "i2c")
which is no more require as driver acquire clock with name of
"div-clk" and "fast-clk".
Remove these entries from table.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Laxman Dewangan [Wed, 8 Aug 2012 07:51:32 +0000 (13:21 +0530)]
i2c: tegra: pass proper name for getting clock
Tegra's i2c controller require two clock sources named as
div_clk and fast_clk.
This change make sure that driver pass the correct clock's
name when it acquires clock handle. Also change the
variable name to reflect the correct clock handles.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Acked-by: Wolfram Sang <w.sang@pengutronix.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Laxman Dewangan [Wed, 8 Aug 2012 07:51:31 +0000 (13:21 +0530)]
ARM: tegra: clock: add i2c fast clock entry in clock table
Tegra's i2c controller require two clock sources named as
div-clk and fast-clk for proper operation.
Currently, the entry of fast-clk is missing in tegra30
clock table and it is incorrectly named in the tegra20
clock table.
Adds aliases to enable lookups for "fast-clk" to succeed.
A later patch will remove the incorrectly named clock,
once the driver is modified to use the new name.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Joseph Lo [Thu, 16 Aug 2012 09:31:52 +0000 (17:31 +0800)]
ARM: tegra20: add CPU hotplug support
Hotplug function put CPU in offline or online mode at runtime.
When the CPU been put into offline, it was been clock gated. The
offline CPU can be power gated, when the remaining CPU goes into
LP2.
Based on the worked by:
Colin Cross <ccross@android.com>
Gary King <gking@nvidia.com>
Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Joseph Lo [Thu, 16 Aug 2012 09:31:51 +0000 (17:31 +0800)]
ARM: tegra30: add CPU hotplug support
Hotplug function put CPUs in offline or online state at runtime.
When the CPU been put in the offline state, it was been clock and
power gated. Except primary CPU other CPUs can be hotplugged.
Based on the work by:
Scott Williams <scwilliams@nvidia.com>
Colin Cross <ccross@android.com>
Gary King <gking@nvidia.com>
Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Joseph Lo [Thu, 16 Aug 2012 09:31:50 +0000 (17:31 +0800)]
ARM: tegra: clean up the common assembly macros into sleep.h
There are some common macros for Tegra low-level assembly code. Clean
up them into one header file and move the definitions that will be
re-used into it as well.
Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Joseph Lo [Thu, 16 Aug 2012 09:31:49 +0000 (17:31 +0800)]
ARM: tegra: replace the CPU CAR access code by tegra_cpu_car_ops
Replacing the code that directly access to CAR registers with
tegra_cpu_car_ops. This ops hides CPU CAR access inside and
provides control interface for it.
Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
The tegra_cpu_car_ops provide the interface for CPU to control
it's clock gating and reset status. The other drivers should use
this for CPU control. And should not directly access CAR registers
to control CPU.
Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Joseph Lo [Fri, 17 Aug 2012 06:54:10 +0000 (14:54 +0800)]
ARM: tegra30: clocks: fix the wrong tegra_audio_sync_clk_ops name
It should use tegra30_audio_sync_clk_ops for tegra30. It will cause
the tegra30 use the wrong audio_sync_clk_ops when build a kernel with
a tegra20 and tegra30 both supported kernel. And building error when
a tegra30-only kernel.
Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Joseph Lo [Fri, 17 Aug 2012 06:51:21 +0000 (14:51 +0800)]
ARM: tegra: clocks: separate tegra_clk_32k_ops from Tegra20 and Tegra30
Currently the tegra20 and tegra30 share the same symbol for
tegra_clk_32k_ops. This will cause a compile error when building
a tegra20-only kernel image. Add tegra_clk_32k_ops for tegra20 and
modify tegra30_clk_32k_ops for tegra30.
Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
This patch converts tegra clock code to generic clock framework in following way:
- Implement clk_ops as required by generic clk framework. (tegraXX_clocks.c)
- Use platform specific struct clk_tegra in clk_ops implementation instead of struct clk.
- Initialize all clock data statically. (tegraXX_clocks_data.c)
Legacy framework did not have recalc_rate and is_enabled functions. Implemented these functions.
Removed init function. It's functionality is splitted into recalc_rate and is_enabled.
Static initialization is used since slab is not up in .init_early and clock
is needed to be initialized before clockevent/clocksource initialization.
Macros redefined for clk_tegra.
Also, single struct clk_tegra is used for all type of clocks (PLL, peripheral etc.). This
is to move quickly to generic common clock framework so that other dependent features will
not be blocked (such as DT binding).
Enabling COMMON_CLOCK config moved to ARCH_TEGRA since it is enabled for both Tegra20
and Tegra30.
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Stephen Warren [Tue, 24 Jul 2012 21:48:12 +0000 (15:48 -0600)]
ARM: tegra: fix U16 divider range check
A U16 divider can divide a clock by 1..64K. However, the range-check
in clk_div16_get_divider() limited the range to 1..256. Fix this. NVIDIA's
downstream kernels already have the fixed range-check.
In practice this is a problem on Whistler's I2C bus, which uses a bus
clock rate of 100KHz (rather than the more common 400KHz on Tegra boards),
which requires a HW module clock of 8*100KHz. The parent clock is 216MHz,
leading to a desired divider of 270. Prior to conversion to the common
clock framework, this range error was somehow ignored/irrelevant and
caused no problems. However, the common clock framework evidently has
more rigorous error-checking, so this failure causes the I2C bus to fail
to operate correctly.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Stephen Warren [Tue, 24 Jul 2012 21:44:11 +0000 (15:44 -0600)]
ARM: tegra: turn on UART A clock at boot
Some boards use UART D for the main serial console, and some use UART A.
UART D's clock is listed in board-dt-tegra20.c's clock table, whereas
UART A's clock is not. This causes the clock code to think UART A's
clock is unsed. The common clock framework turns off unused clocks at
boot time. This makes the kernel appear to hang. Add UART A's clock into
the clock table to prevent this. Eventually, this requirement should be
handled by the UART driver, and/or properties in a board-specific device
tree file.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Laxman Dewangan [Fri, 10 Aug 2012 13:03:02 +0000 (18:33 +0530)]
ARM: tegra: use IO_ADDRESS for getting virtual address
Use macro IO_ADDRESS for getting virtual address of
corresponding physical address to make the consistency
with rest of Tegra code-base.
This macro calls the IO_TO_VIRT() which is defined in
arch/arm/mach-tegra/include/mach/iomap.h
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Device have SYS rail which is always ON. It is system power bus. LDO5
and LDO_RTC get powered through this rail internally. Add support for
this rail and make the LDO5/LDO_RTC supply by it. Update document
accordingly.
[swarren: Instantiate the sys regulator from board-harmony-power.c to
avoid regression.]
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
John Stultz [Fri, 31 Aug 2012 17:30:06 +0000 (13:30 -0400)]
time: Move ktime_t overflow checking into timespec_valid_strict
Andreas Bombe reported that the added ktime_t overflow checking added to
timespec_valid in commit 4e8b14526ca7 ("time: Improve sanity checking of
timekeeping inputs") was causing problems with X.org because it caused
timeouts larger then KTIME_T to be invalid.
Previously, these large timeouts would be clamped to KTIME_MAX and would
never expire, which is valid.
This patch splits the ktime_t overflow checking into a new
timespec_valid_strict function, and converts the timekeeping codes
internal checking to use this more strict function.
Reported-and-tested-by: Andreas Bombe <aeb@debian.org> Cc: Zhouping Liu <zliu@redhat.com> Cc: Ingo Molnar <mingo@kernel.org> Cc: Prarit Bhargava <prarit@redhat.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: stable@vger.kernel.org Signed-off-by: John Stultz <john.stultz@linaro.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Merge tag 'parisc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/parisc-2.6
Pull PARISC fixes from James Bottomley:
"This is a set of two bug fixes. One is the ATOMIC problem which is
now causing a compile failure in certain situations. The other is
mishandling of PER_LINUX32 which may also cause user visible effects.
Signed-off-by: James Bottomley <JBottomley@Parallels.com>"
* tag 'parisc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/parisc-2.6:
[PARISC] fix personality flag check in copy_thread()
[PARISC] Redefine ATOMIC_INIT and ATOMIC64_INIT to drop the casts
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux
Pull s390 fixes from Martin Schwidefsky:
"A couple of s390 bug fixes for 3.5-rc4"
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux:
s390/32: Don't clobber personality flags on exec
s390/smp: add missing smp_store_status() for !SMP
s390/dasd: fix ioctl return value
s390: Always use "long" for ssize_t to match size_t
Linus Torvalds [Thu, 30 Aug 2012 16:11:33 +0000 (09:11 -0700)]
Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux
Pull drm fixes from Dave Airlie:
"A bunch of scattered fixes ati/intel/nouveau, couple of core ones,
nothing too shocking or different."
* 'drm-fixes' of git://people.freedesktop.org/~airlied/linux:
drm: Add EDID_QUIRK_FORCE_REDUCED_BLANKING for ASUS VW222S
gma500: Consider CRTC initially active.
drm/radeon: fix dig encoder selection on DCE61
drm/radeon: fix double free in radeon_gpu_reset
drm/radeon: force dma32 to fix regression rs4xx,rs6xx,rs740
drm/radeon: rework panel mode setup
drm/radeon/atom: powergating fixes for DCE6
drm/radeon/atom: rework DIG modesetting on DCE3+
drm/radeon: don't disable plls that are in use by other crtcs
drm/radeon: add proper checking of RESOLVE_BOX command for r600-r700
drm/radeon: initialize tracked CS state
drm/radeon: fix reading CB_COLORn_MASK from the CS
drm/nvc0/copy: check PUNITS to determine which copy engines are disabled
i915: Quirk no_lvds on Gigabyte GA-D525TUD ITX motherboard
drm/i915: Use the correct size of the GTT for placing the per-process entries
drm: Check for invalid cursor flags
drm: Initialize object type when using DRM_MODE() macro
drm/i915: fix color order for BGR formats on IVB
drm/i915: fix wrong order of parameters in port checking functions
Heiko Carstens [Tue, 28 Aug 2012 08:02:08 +0000 (10:02 +0200)]
s390/32: Don't clobber personality flags on exec
In native 32 bit mode the personality flags were not correctly inherited.
This is the s390 version of 59e4c3a2 "powerpc/32: Don't clobber personality
flags on exec".
Reported-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=17629 Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Cc: <dri-devel@lists.freedesktop.org> Cc: Adam Jackson <ajax@redhat.com> Cc: Ian Pilcher <arequipeno@gmail.com> Cc: <stable@vger.kernel.org> Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 30 Aug 2012 00:35:34 +0000 (10:35 +1000)]
Merge branch 'drm-fixes-3.6' of git://people.freedesktop.org/~agd5f/linux into drm-fixes
Alex writes:
Highlights:
- fix a gart regression on older IGP chips
- more MSAA fixes
- fix a double free in gpu reset code
- modesetting fixes
- trinity dig encoder fix.
* 'drm-fixes-3.6' of git://people.freedesktop.org/~agd5f/linux:
drm/radeon: fix dig encoder selection on DCE61
drm/radeon: fix double free in radeon_gpu_reset
drm/radeon: force dma32 to fix regression rs4xx,rs6xx,rs740
drm/radeon: rework panel mode setup
drm/radeon/atom: powergating fixes for DCE6
drm/radeon/atom: rework DIG modesetting on DCE3+
drm/radeon: don't disable plls that are in use by other crtcs
drm/radeon: add proper checking of RESOLVE_BOX command for r600-r700
drm/radeon: initialize tracked CS state
drm/radeon: fix reading CB_COLORn_MASK from the CS
Forest Bond [Mon, 13 Aug 2012 16:31:24 +0000 (16:31 +0000)]
gma500: Consider CRTC initially active.
[this one ideally should make 3.6 - it fixes the very annoying mode setting bug]
This causes the pipe to be forced off prior to initial mode set, which
roughly mirrors the behavior of the i915 driver. It fixes initial mode
setting on my Intel DN2800MT (Cedarview) board. Without it, mode
setting triggers an out-of-range error from the monitor for most modes,
but only on initial configuration (i.e. they can be configured
successfully from userspace after that).
Signed-off-by: Forest Bond <forest.bond@rapidrollout.com> Signed-off-by: Alan Cox <alan@linux.intel.com> Cc: stable <stable@vger.kernel.org> Signed-off-by: Dave Airlie <airlied@redhat.com>
Linus Torvalds [Wed, 29 Aug 2012 18:36:22 +0000 (11:36 -0700)]
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mason/linux-btrfs
Pull btrfs fixes from Chris Mason:
"I've split out the big send/receive update from my last pull request
and now have just the fixes in my for-linus branch. The send/recv
branch will wander over to linux-next shortly though.
The largest patches in this pull are Josef's patches to fix DIO
locking problems and his patch to fix a crash during balance. They
are both well tested.
The rest are smaller fixes that we've had queued. The last rc came
out while I was hacking new and exciting ways to recover from a
misplaced rm -rf on my dev box, so these missed rc3."
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mason/linux-btrfs: (25 commits)
Btrfs: fix that repair code is spuriously executed for transid failures
Btrfs: fix ordered extent leak when failing to start a transaction
Btrfs: fix a dio write regression
Btrfs: fix deadlock with freeze and sync V2
Btrfs: revert checksum error statistic which can cause a BUG()
Btrfs: remove superblock writing after fatal error
Btrfs: allow delayed refs to be merged
Btrfs: fix enospc problems when deleting a subvol
Btrfs: fix wrong mtime and ctime when creating snapshots
Btrfs: fix race in run_clustered_refs
Btrfs: don't run __tree_mod_log_free_eb on leaves
Btrfs: increase the size of the free space cache
Btrfs: barrier before waitqueue_active
Btrfs: fix deadlock in wait_for_more_refs
btrfs: fix second lock in btrfs_delete_delayed_items()
Btrfs: don't allocate a seperate csums array for direct reads
Btrfs: do not strdup non existent strings
Btrfs: do not use missing devices when showing devname
Btrfs: fix that error value is changed by mistake
Btrfs: lock extents as we map them in DIO
...
David Rientjes [Wed, 29 Aug 2012 02:57:21 +0000 (19:57 -0700)]
mm, slab: lock the correct nodelist after reenabling irqs
cache_grow() can reenable irqs so the cpu (and node) can change, so ensure
that we take list_lock on the correct nodelist.
This fixes an issue with commit 072bb0aa5e06 ("mm: sl[au]b: add
knowledge of PFMEMALLOC reserve pages") where list_lock for the wrong
node was taken after growing the cache.
Reported-and-tested-by: Haggai Eran <haggaie@mellanox.com> Signed-off-by: David Rientjes <rientjes@google.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Christian König [Wed, 29 Aug 2012 11:24:15 +0000 (13:24 +0200)]
drm/radeon: fix double free in radeon_gpu_reset
radeon_ring_restore is freeing the memory for the saved
ring data. We need to remember that, otherwise we try to
restore the ring data again on the next try. Additional
to that it shouldn't try the reset infinitely if we have
saved ring data.
Signed-off-by: Christian König <deathsimple@vodafone.de> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Jerome Glisse [Tue, 28 Aug 2012 20:50:22 +0000 (16:50 -0400)]
drm/radeon: force dma32 to fix regression rs4xx,rs6xx,rs740
It seems some of those IGP dislike non dma32 page despite what
documentation says. Fix regression since we allowed non dma32
pages. It seems it only affect some revision of those IGP chips
as we don't know which one just force dma32 for all of them.
Alex Deucher [Mon, 27 Aug 2012 21:48:18 +0000 (17:48 -0400)]
drm/radeon: rework panel mode setup
Adjust the panel mode setup to match the behavior
of the vbios. Rather than checking for specific
bridge chip ids, just check the eDP configuration register.
This saves extra aux transactions and works across
DP bridge chips without requiring additional per chip
id checking.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 24 Aug 2012 22:21:21 +0000 (18:21 -0400)]
drm/radeon/atom: powergating fixes for DCE6
Power gating is per crtc pair, but the powergating registers
should be called individually. The hw handles power up/down
properly. The pair is powered up if either crtc in the pair
is powered up and the pair is not powered down until both
crtcs in the pair are powered down. This simplifies
programming and should save additional power as the previous
code never actually power gated the crtc pair.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
Alex Deucher [Wed, 22 Aug 2012 13:54:56 +0000 (09:54 -0400)]
drm/radeon/atom: rework DIG modesetting on DCE3+
The ordering is important and the current drm code
wasn't cutting it for modern DIG encoders. We need
to have information about crtc before setting up
the encoders so I've shifted the ordering a bit.
Probably we'll need a full rework akin to danvet's
recent intel patchs. This patch fixes numerous
issues with DP bridge chips and makes link training
much more reliable.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
Marek Olšák [Fri, 24 Aug 2012 12:27:36 +0000 (14:27 +0200)]
drm/radeon: add proper checking of RESOLVE_BOX command for r600-r700
Checking of the second colorbuffer was skipped on r700, because
CB_TARGET_MASK was 0xf. With r600, CB_TARGET_MASK is changed to 0xff,
so we must set the number of samples of the second colorbuffer to 1 in order
to pass the CS checker.
The DRM version is bumped, because RESOLVE_BOX is always rejected without this
fix on r600.
Signed-off-by: Marek Olšák <maraeo@gmail.com> Reviewed-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dave Airlie [Wed, 29 Aug 2012 10:09:23 +0000 (20:09 +1000)]
Merge branch 'drm-intel-fixes' of git://people.freedesktop.org/~danvet/drm-intel into drm-fixes
Daniel writes:
"Just a few smaller things:
- Fix up a pipe vs. plane confusion from a refactoring, fixes a regression
from 3.1 (Anhua Xu).
- Fix ivb sprite pixel formats (Vijay).
- Fixup ppgtt pde placement for machines where the Bios artifically limits
the availbale gtt space in the name of ... product differentiation
(Chris). This fixes an oops.
- Yet another no_lvds quirk entry."
* 'drm-intel-fixes' of git://people.freedesktop.org/~danvet/drm-intel:
i915: Quirk no_lvds on Gigabyte GA-D525TUD ITX motherboard
drm/i915: Use the correct size of the GTT for placing the per-process entries
drm/i915: fix color order for BGR formats on IVB
drm/i915: fix wrong order of parameters in port checking functions
Ben Skeggs [Mon, 27 Aug 2012 06:22:49 +0000 (16:22 +1000)]
drm/nvc0/copy: check PUNITS to determine which copy engines are disabled
On some Fermi chipsets (NVCE particularly) PCOPY1 doesn't exist. And if
what I've seen on Kepler is true of Fermi too, chipsets of the same type
can have different PCOPY units available.
This should fix a v3.5 regression reported by a number of people effecting
suspend/resume on NVC8/NVCE chipsets.
Cc: stable@vger.kernel.org [3.5] Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Stefan Behrens [Fri, 10 Aug 2012 14:58:21 +0000 (08:58 -0600)]
Btrfs: fix that repair code is spuriously executed for transid failures
If verify_parent_transid() fails for all mirrors, the current code
calls repair_io_failure() anyway which means:
- that the disk block is rewritten without repairing anything and
- that a kernel log message is printed which misleadingly claims
that a read error was corrected.
This is an example:
parent transid verify failed on 615015833600 wanted 110423 found 110424
parent transid verify failed on 615015833600 wanted 110423 found 110424
btrfs read error corrected: ino 1 off 615015833600 (dev /dev/...)
It is wrong to ignore the results from verify_parent_transid() and to
call repair_eb_io_failure() when the verification of the transids failed.
This commit fixes the issue.
Signed-off-by: Stefan Behrens <sbehrens@giantdisaster.de> Signed-off-by: Chris Mason <chris.mason@oracle.com>
In dio write, we should unlock the section which we didn't do IO on in case that
we fall back to buffered write. But we need to not only unlock the section
but also cleanup reserved space for the section.
This bug was found while running xfstests 133, with this 133 no longer complains.
Signed-off-by: Liu Bo <bo.li.liu@oracle.com> Signed-off-by: Chris Mason <chris.mason@oracle.com>
Josef Bacik [Fri, 24 Aug 2012 18:53:03 +0000 (12:53 -0600)]
Btrfs: fix deadlock with freeze and sync V2
We can deadlock with freeze right now because we unconditionally start a
transaction in our ->sync_fs() call. To fix this just check and see if we
have a running transaction to commit. This saves us from the deadlock
because at this point we'll have the umount sem for the sb so we're safe
from freezes coming in after we've done our check. With this patch the
freeze xfstests no longer deadlocks. Thanks,
Signed-off-by: Josef Bacik <jbacik@fusionio.com> Signed-off-by: Chris Mason <chris.mason@oracle.com>
Stefan Behrens [Mon, 27 Aug 2012 14:30:03 +0000 (08:30 -0600)]
Btrfs: revert checksum error statistic which can cause a BUG()
Commit 442a4f6308e694e0fa6025708bd5e4e424bbf51c added btrfs device
statistic counters for detected IO and checksum errors to Linux 3.5.
The statistic part that counts checksum errors in
end_bio_extent_readpage() can cause a BUG() in a subfunction:
"kernel BUG at fs/btrfs/volumes.c:3762!"
That part is reverted with the current patch.
However, the counting of checksum errors in the scrub context remains
active, and the counting of detected IO errors (read, write or flush
errors) in all contexts remains active.
Cc: stable <stable@vger.kernel.org> # 3.5 Signed-off-by: Stefan Behrens <sbehrens@giantdisaster.de> Signed-off-by: Chris Mason <chris.mason@oracle.com>
Stefan Behrens [Wed, 1 Aug 2012 11:45:52 +0000 (05:45 -0600)]
Btrfs: remove superblock writing after fatal error
With commit acce952b0, btrfs was changed to flag the filesystem with
BTRFS_SUPER_FLAG_ERROR and switch to read-only mode after a fatal
error happened like a write I/O errors of all mirrors.
In such situations, on unmount, the superblock is written in
btrfs_error_commit_super(). This is done with the intention to be able
to evaluate the error flag on the next mount. A warning is printed
in this case during the next mount and the log tree is ignored.
The issue is that it is possible that the superblock points to a root
that was not written (due to write I/O errors).
The result is that the filesystem cannot be mounted. btrfsck also does
not start and all the other btrfs-progs tools fail to start as well.
However, mount -o recovery is working well and does the right things
to recover the filesystem (i.e., don't use the log root, clear the
free space cache and use the next mountable root that is stored in the
root backup array).
This patch removes the writing of the superblock when
BTRFS_SUPER_FLAG_ERROR is set, and removes the handling of the error
flag in the mount function.
These lines can be used to reproduce the issue (using /dev/sdm):
SCRATCH_DEV=/dev/sdm
SCRATCH_MNT=/mnt
echo 0 25165824 linear $SCRATCH_DEV 0 | dmsetup create foo
ls -alLF /dev/mapper/foo
mkfs.btrfs /dev/mapper/foo
mount /dev/mapper/foo $SCRATCH_MNT
echo bar > $SCRATCH_MNT/foo
sync
echo 0 25165824 error | dmsetup reload foo
dmsetup resume foo
ls -alF $SCRATCH_MNT
touch $SCRATCH_MNT/1
ls -alF $SCRATCH_MNT
sleep 35
echo 0 25165824 linear $SCRATCH_DEV 0 | dmsetup reload foo
dmsetup resume foo
sleep 1
umount $SCRATCH_MNT
btrfsck /dev/mapper/foo
dmsetup remove foo
Signed-off-by: Stefan Behrens <sbehrens@giantdisaster.de> Signed-off-by: Jan Schmidt <list.btrfs@jan-o-sch.net>
Josef Bacik [Tue, 7 Aug 2012 20:00:32 +0000 (16:00 -0400)]
Btrfs: allow delayed refs to be merged
Daniel Blueman reported a bug with fio+balance on a ramdisk setup.
Basically what happens is the balance relocates a tree block which will drop
the implicit refs for all of its children and adds a full backref. Once the
block is relocated we have to add the implicit refs back, so when we cow the
block again we add the implicit refs for its children back. The problem
comes when the original drop ref doesn't get run before we add the implicit
refs back. The delayed ref stuff will specifically prefer ADD operations
over DROP to keep us from freeing up an extent that will have references to
it, so we try to add the implicit ref before it is actually removed and we
panic. This worked fine before because the add would have just canceled the
drop out and we would have been fine. But the backref walking work needs to
be able to freeze the delayed ref stuff in time so we have this ever
increasing sequence number that gets attached to all new delayed ref updates
which makes us not merge refs and we run into this issue.
So to fix this we need to merge delayed refs. So everytime we run a
clustered ref we need to try and merge all of its delayed refs. The backref
walking stuff locks the delayed ref head before processing, so if we have it
locked we are safe to merge any refs inside of the sequence number. If
there is no sequence number we can merge all refs. Doing this not only
fixes our bug but keeps the delayed ref code from adding and removing
useless refs and batching together multiple refs into one search instead of
one search per delayed ref, which will really help our commit times. I ran
this with Daniels test and 276 and I haven't seen any problems. Thanks,
Reported-by: Daniel J Blueman <daniel@quora.org> Signed-off-by: Josef Bacik <jbacik@fusionio.com>
Josef Bacik [Wed, 8 Aug 2012 16:12:59 +0000 (10:12 -0600)]
Btrfs: fix enospc problems when deleting a subvol
Subvol delete is a special kind of awful where we use the global reserve to
cover the ENOSPC requirements. The problem is once we're done removing
everything we do a btrfs_update_inode(), which by default will try to do the
delayed update stuff which will use it's own reserve. There will be no
space in this reserve and we'll return ENOSPC. So instead use
btrfs_update_inode_fallback() which will just fallback to updating the inode
item in the case of enospc. This is fine because the global reserve covers
the space requirements for this. With this patch I can now delete a subvol
on a problem image Dave Sterba sent me. Thanks,
Reported-by: David Sterba <dave@jikos.cz> Signed-off-by: Josef Bacik <jbacik@fusionio.com> Signed-off-by: Chris Mason <chris.mason@fusionio.com>
I added a window where the delayed_ref's head->ref_mod code can diverge
from the sum of the remaining refs, because we release the head->mutex
in the middle. This leads to btrfs_lookup_extent_info returning wrong
numbers. This patch fixes this by adjusting the head's ref_mod with each
delayed ref we run.
Signed-off-by: Arne Jansen <sensille@gmx.net> Signed-off-by: Chris Mason <chris.mason@fusionio.com>
Chris Mason [Tue, 7 Aug 2012 19:34:49 +0000 (15:34 -0400)]
Btrfs: don't run __tree_mod_log_free_eb on leaves
When we split a leaf, we may end up inserting a new root on top of that
leaf. The reflog code was incorrectly assuming the old root was always
a node. This makes sure we skip over leaves.
Signed-off-by: Chris Mason <chris.mason@fusionio.com>
Josef Bacik [Mon, 6 Aug 2012 19:46:38 +0000 (13:46 -0600)]
Btrfs: increase the size of the free space cache
Arne was complaining about the space cache having mismatching generation
numbers when debugging a deadlock. This is because we can run out of space
in our preallocated range for our space cache if you have a pretty
fragmented amount of space in your pinned space. So just increase the
amount of space we preallocate for space cache so we can be sure to have
enough space. This will only really affect data ranges since their the only
chunks that end up larger than 256MB. Thanks,
Signed-off-by: Josef Bacik <jbacik@fusionio.com> Signed-off-by: Chris Mason <chris.mason@fusionio.com>
Josef Bacik [Wed, 1 Aug 2012 19:36:24 +0000 (15:36 -0400)]
Btrfs: barrier before waitqueue_active
We need a barrir before calling waitqueue_active otherwise we will miss
wakeups. So in places that do atomic_dec(); then atomic_read() use
atomic_dec_return() which imply a memory barrier (see memory-barriers.txt)
and then add an explicit memory barrier everywhere else that need them.
Thanks,
Arne Jansen [Mon, 6 Aug 2012 20:18:51 +0000 (14:18 -0600)]
Btrfs: fix deadlock in wait_for_more_refs
Commit a168650c introduced a waiting mechanism to prevent busy waiting in
btrfs_run_delayed_refs. This can deadlock with btrfs_run_ordered_operations,
where a tree_mod_seq is held while waiting for the io to complete, while
the end_io calls btrfs_run_delayed_refs.
This whole mechanism is unnecessary. If not enough runnable refs are
available to satisfy count, just return as count is more like a guideline
than a strict requirement.
In case we have to run all refs, commit transaction makes sure that no
other threads are working in the transaction anymore, so we just assert
here that no refs are blocked.
Signed-off-by: Arne Jansen <sensille@gmx.net> Signed-off-by: Chris Mason <chris.mason@fusionio.com>
Josef Bacik [Fri, 3 Aug 2012 20:49:19 +0000 (16:49 -0400)]
Btrfs: don't allocate a seperate csums array for direct reads
We've been allocating a big array for csums instead of storing them in the
io_tree like we do for buffered reads because previously we were locking the
entire range, so we didn't have an extent state for each sector of the
range. But now that we do the range locking as we map the buffers we can
limit the mapping lenght to sectorsize and use the private part of the
io_tree for our csums. This allows us to avoid an extra memory allocation
for direct reads which could incur latency. Thanks,
projects / karo-tx-linux.git / log