Richard Zhu [Fri, 6 Sep 2013 04:33:31 +0000 (12:33 +0800)]
ENGR00278492 imx: pcie: delay is required after REF_CLK_EN is set
delay is required after REF_CLK_EN of GPR1 is set.
otherwise, system would be hang when access the registers
of PCIe RC when the EARLY_PRINTK is not enabled.
ENGR00277843-04 ARM: dts: Add sii902x in imx6sl evk dts
- Add sii902x driver to imx6sl-evk.dts
- Set LCD_RESET pin work in GPIO mode, the pin is not
use by imx6sl evk lcd panel.
- Enable sii902x in imx_v7_defconfig
ENGR00277843-02 imx6sl: Enable sii902x hdmi function
- Add sii902x hdmi chip driver.
- Sii902x initialized as I2C device.
- Support resolution change by application or FB command line.
- Max support resolution 1080p60.
- Support read EDID from hdmi sink.
- Support hdmi cable hotplug.
- Support default video mode read from dts.
ENGR00277843-01 mxsfb: Allocate frame buffer from DMA pool
- Original frame buffer size is fixed in SZ_2M when driver probing,
that can not support more resolution, such as 720p and 1080p.
Add function mxsfb_map_videomem/mxsfb_unmap_videomem to replace
fixed frame buffer size. Frame buffer size can change with resolution
change and application requirement.
- Add fb_mmap function implement.
- Remove member variable sync from struct mxsfb_info, align the sync
definition with mxc_cea_mode[] in mxc_edid.c.
- Set recovery from underflow bit.
- Fix xres_virtual yres_virtual check issue in function mxsfb_check_var().
Use platform_device_add() which can pass drvdata correctly: previously
we register the dma_dev first and pass its drvdata, but this would fail
to pass its drvdata correctly when using loadable module, because the
probe() hdmi dma driver would be executed right after the register()
and before set_drvdata(). Then the drvdata actually failed to be set
to the hdmi dma driver. While platform_device_add() has no such issue
because it would finish the set_drvdata() before its execution.
This patch also move codec driver registering into CPU DAI driver.
When using autoload module, the codec driver would alwasy fail to
be detected due to its registering located in manchine driver.
Thus move this to CPU DAI driver.
ENGR00277715-8 ARM: dts: Add WM8962 support for imx6sl-evk
Add WM8962 support for imx6sl-evk:
* Add missing baud clock for ssi
* Drop fifo-depth which would cause odd-number watermark
* Add pinctrl group for audmux on evk board
* Add WM8962-related devictree binding for evk board
ENGR00277715-2 ASoC: fsl: Drop constraint in startup() of ssi driver
The constraint would disavow two simultaineous streams, eg: arecord | aplay.
Since the hw_params() have the SSIEN checking, the stccr register would not
be modified during a actual procedure of one stream, we can safely drop this
one in startup().
Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <b42378@freescale.com>
Peter Chen [Wed, 4 Sep 2013 07:06:21 +0000 (15:06 +0800)]
ENGR00278097-2 usb: chipidea: imx: Add usb_phy_shutdown at probe's error path
If not, the PHY will be active even the controller is not in use.
We find this issue due to the PHY's clock refcount is not correct
due to -EPROBE_DEFER return after phy's init.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
ENGR00277955-2 rtc: rtc-snvs: support wakeup system from freeze mode
To support wakeup system from freeze mode of suspend,
device's irq can NOT be disabled during devices suspend,
so we need to add IRQF_NO_SUSPEND flag to irqflags.
ENGR00277955-1 keyboard: gpio_keys: support wakeup system from freeze mode
To support wakeup system from freeze mode of suspend,
device's irq can NOT be disabled during devices suspend,
so we need to add IRQF_NO_SUSPEND flag to irqflags.
Currently, we use different dts files to support ldo-bypass or ldo-enable, then
we need add both dts files for the boards which can support ldo-bypass mode(all
boards support ldo-enable at least). So for below boards we need add ldo-enable
dts file so that we can use this to easily support ldo-enable mode:
1)mx6q-sabresd board: ldo-bypass dts->mx6q-sabresd.dtb,
ldo-enable dts->mx6q-sabresd-ldo.dtb
2)mx6q-sabresd board: ldo-bypass dts->mx6dl-sabresd.dtb,
ldo-enable dts->mx6dl-sabresd-ldo.dtb
3)mx6sl-evk board: ldo-bypass dts->mx6sl-evk.dtb,
ldo-enable dts->mx6sl-evk-ldo.dtb
ENGR00278098 Make gpu modulable driver passing build
Gpu driver requires to do cache invalid, clean and flush operation.
But in 3.10 kernel, these APIs are not supposed to be called from
device driver. To avoid too much code change, Revert "ARM: Fix bad
merge bd1274dc005 (Merge branch 'v6v7' into devel)" to make the
situation the same as 3.0.35 kernel.
Robby Cai [Thu, 22 Aug 2013 10:01:59 +0000 (18:01 +0800)]
ENGR00275033-1 mx6sl: pxp/v4l: port v4l2 output driver to 3.10
port v4l2 output driver to 3.10 kernel
- replace .ioctl with .unlocked_ioctl
- add .vfl_dir flag - VFL_DIR_TX (newly introduced) for video_device
- drop __devinit, __devexit, __exit and __exit_p
- replace mxc_elcdif_frame_addr_setup() with pxp_show_buf(), where pan_display
be called due to the adoption of mxsfb.c from community
- change the fb id to be compared due to use new mxsfb.c
- mark the s_crop() and s_fbuf() third parameter const
- move local fbi variable to struct pxps
- use module_platform_driver()
Sascha Hauer [Mon, 26 Aug 2013 11:48:36 +0000 (13:48 +0200)]
cpufreq: imx6q: Fix clock enable balance
For changing the cpu frequency the i.MX6q has to be switched to some
intermediate clock during the PLL reprogramming. The driver tries
to be clever to keep the enable count correct but gets it wrong. If
the cpufreq is increased it calls clk_disable_unprepare twice
on pll2_pfd2_396m. This puts all other devices which get their clock
from pll2_pfd2_396m into a nonworking state.
Fix this by removing the clk enabling/disabling altogether since the
clk core will do this automatically during a reparent.
[shawn.guo: The driver assumes that cpu always boots with 800MHz, and
the first transition on 400MHz must be entering 400MHz setpoint. But
it turns out that's not always the case. In some system, cpu boots up
at 400MHz and then the first transition on 400MHz will be leaving
400MHz setpoint rather than entering. In this case, the use count of
pll2_pfd2_396m will be wrong. Anyway, since clock framework has been
nicely handling the clk enabling during reparent, we should not need
to worry about it.]
ENGR00277697 cpufreq: imx: increase cpufreq during suspend/resume
During suspend/resume, when cpufreq driver try to increase
voltage/freq, it needs to control I2C/SPI to communicate with
external PMIC to adjust voltage, but these I2C/SPI devices may
be already suspended, to avoid such scenario, we just increase
cpufreq to highest setpoint before suspend.
As this pm notification's updating cpu policy may work together
with cpufreq governor, both of them may call set_target at same
time, so we need to add mutex lock to prevent this scenario,
otherwise, the clock use count will be wrong.
Peter Chen [Fri, 23 Aug 2013 07:00:08 +0000 (15:00 +0800)]
ENGR00277805-3 usb: chipidea: udc: fix the oops after rmmod gadget
When we rmmod gadget, the ci->driver needs to be cleared.
Otherwise, when we plug in usb cable again, the driver will
consider gadget is there, and go to enumeration procedure,
but in fact, it was removed.
Peter Chen [Wed, 10 Jul 2013 09:21:23 +0000 (17:21 +0800)]
ENGR00277805-2 usb: chipidea: udc: Consolidate the call of disconnect
The udc-core will call gadget's driver->disconnect, so we should avoid
calling gadget's disconnect again at ci_udc_stop in case the gadget's
unbind free some structs which is still used at gadget's disconnect.
Tested-by: Marek Vasut <marex@denx.de> Signed-off-by: Peter Chen <peter.chen@freescale.com>
Robby Cai [Mon, 2 Sep 2013 12:58:52 +0000 (20:58 +0800)]
ENGR00277750-1 ARM: clk-imx6sl: correct some clock parent selections
This might not be documented clearly or correctly in IC RM (Rev. 1, 04/2013).
There's one document describing the CCM change on imx6sl, which is
available at
http://compass.freescale.net/livelink/livelink?func=ll&objId=223814333&objAction=browse
This patch does
- split csi_lcdif_sels since 2'b00 for CSI means 'osc' while for LCDIF
means 'pll2_bus'.
- split epdc_pxp_sels since 3'b101 for EPDC means 'pll3_pfd2' while for PXP
means 'pll3_pfd3'
- correct 2'b10 for lcdif_axi_sels, should be 'pll3_usb_otg' instead of 'pll3_120m'
Signed-off-by: Robby Cai <R63905@freescale.com> Acked-by: Shawn Guo <shawn.guo@freescale.com>
Add max8903 chager in dts. Below is difference with the full function on
Sabresd:
1.no adc converter on imx6sl-evk, so disable it.
2.DOK connected with UOK, that say whatever USB or DC charger plug in, always
report DC charger detect.
ENGR00276199 ARM: imx: Update VDDARM_CAP's voltag for cpufreq table
According to datasheet, VDD_CACHE_CAP must not exceed VDDARM_CAP
by more than 200mV, as all of our i.MX6Q boards' VDD_CACHE_CAP
are connected to VDDSOC_CAP, so we need to follow this rule by
increasing VDDARM_CAP's voltage when necessary.
Nicolin Chen [Thu, 29 Aug 2013 10:08:51 +0000 (18:08 +0800)]
ENGR00277299-1 dma: imx-sdma: Add other script for hdmi audio support
There's a missing script for hdmi audio support in current sdma driver,
thus add it.
This HDMI script doesn't use bd to copy memory like a normal one does
but only to update the memory address for HDMI internal AHB DMA and
then trigger its procedure automatically.
The ocotp also plays as a fuse device beside the system controller we
already have in device tree. Let's add a device node for the fuse
device for imx6qdl and imx6sl.
While at it, the patch also drops "fsl,imx6q-ocotp" and
"fsl,imx6sl-ocotp" from system controller compatible string, since
it's not used, and use node name ocotp-ctrl and ocotp-fuse for system
controller and fuse device respectively.
The slave_config is not initialized, so some of its fields may
be set with random data which may causes the failure in the following
dmaengine_prep_slave_sg().
Robby Cai [Wed, 28 Aug 2013 02:05:20 +0000 (10:05 +0800)]
ENGR00276832-6 epdc: move timing paramater into the driver
Although now in 3.10 there's display timing dts framework but for epdc
driver there are other timing parameters besides the fb_videomode. It also
makes sense to move the timing parameters in epdc driver.
Robby Cai [Wed, 14 Aug 2013 06:12:43 +0000 (14:12 +0800)]
ENGR00276832-5 epdc: set epdc/pxp axi clock to maximum 200MHz
set epdc pix clock's parent clock to pll5_video for imx6sl
set epdc/pxp axi clock's parent clock to pll2_pfd2 for imx6dl
set epdc/pxp axi clock to 200MHz for both imx6dl and imx6sl
(on imx6dl, epdc/pxp axi clock is same one, named 'ipu2')
Robby Cai [Wed, 14 Aug 2013 06:12:43 +0000 (14:12 +0800)]
ENGR00276832-4 epdc: port the driver to 3.10 kernel
merge the mach/epdc.h into linux/mxcfb_epdc.h
drop VM_RESERVED flag as deprecated.
drop VM_IO flag as it's automatically set in remap_pfn_range()
use <linux/platform_data/dma-imx.h> instead of <mach/dma.h>
use module_platform_driver()
add binding dts document for epdc fb driver
change the devname for interrupt from 'fb_dma' to 'epdc' to make it clear
Nicolin Chen [Fri, 30 Aug 2013 08:02:35 +0000 (16:02 +0800)]
ENGR00277471 ASoC: fsl: Fix set-mute-failed issue after WM8962 capture
We only need to mute WM8962 after playback, so add direction check
before doing mute.
And a mute failure would cause hw_free() abruptly return after it,
which might drop the essential procedure code for FLL controlling.
Thus put mute before FLL controlling code and drop its return check.
Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <b42378@freescale.com>
Nicolin Chen [Wed, 28 Aug 2013 04:04:46 +0000 (12:04 +0800)]
ASoC: fsl: Add S/PDIF machine driver
This patch implements a device-tree-only machine driver for Freescale
i.MX series Soc. It works with spdif_transmitter/spdif_receiver and
fsl_spdif.c drivers.
Signed-off-by: Nicolin Chen <b42378@freescale.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Mark Brown <broonie@linaro.org>
Anson Huang [Thu, 29 Aug 2013 20:36:54 +0000 (16:36 -0400)]
ENGR00277271 ARM: imx: Disable WAIT mode for i.MX6SL during kernel boot up
WAIT mode is enabled by default due to hardware reset,
so we need to disable it during kernel boot up, otherwise,
system may crash without proper setting for WAIT mode.
CPUIdle driver will enable WAIT mode later. Below is the
stack dump when crash, this patch fix it:
Currently RBC is enabled right before DSM in asm code
and disabled after resume, as the RBC enable didn't call
imx6_enable_rbc function, so everytime disabling RBC will
be skipped by the logic inside imx6_enable_rbc, this will
disobey the RBC rules: RBC counter should be cleared
after resume and adding at least 2 CKIL(32KHz) clocks with
all wakeup sources masked in GPC;
Nicolin Chen [Thu, 29 Aug 2013 06:27:32 +0000 (14:27 +0800)]
ENGR00276567-5 mfd: si476x: Add two involatile registers support
These two regsiters would be used by si476x-codec driver. Setting them as
involatile registers would allow codec driver to set the value into cache
and to sync them after power-up.
Nicolin Chen [Fri, 23 Aug 2013 11:42:56 +0000 (19:42 +0800)]
ENGR00276567-3 ARM: imx6q: Set pll4 as ssi's parent
PLL4 is a flexible pll that can be set to a value as we need,
so we set it to an value that can easily derive 44.1K and 48K
and then put ssi baud clock as its child clock.
projects / karo-tx-linux.git / log