Dave Airlie [Wed, 10 Sep 2014 08:23:07 +0000 (18:23 +1000)]
drm: split ati_pcigart.h out of drmP.h
Just move this into a separate header file, and make the
two users use it.
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Fri, 12 Sep 2014 03:58:27 +0000 (13:58 +1000)]
Merge branch 'drm-next-3.18' of git://people.freedesktop.org/~agd5f/linux into drm-next
concurrent buffer reads.
* 'drm-next-3.18' of git://people.freedesktop.org/~agd5f/linux:
drm/radeon: allow concurrent buffer reads
drm/radeon: add the infrastructure for concurrent buffer access
drm/ttm: allow fence to be added as shared
The userspace drm.h include doesn't prefix the drm directory. This can lead
to compile failures as /usr/include/drm/ isn't in the standard gcc include
paths. Fix it to be <drm/drm.h>, which matches the rest of the driver drm
header files that get installed into /usr/include/drm.
Red Hat Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=1138759
Dave Airlie [Thu, 11 Sep 2014 10:53:57 +0000 (20:53 +1000)]
Merge branch 'msm-next' of git://people.freedesktop.org/~robclark/linux into drm-next
1) add LVDS support for mdp4 (tested with auo B101XTN01.0 panel)
2) add B101XTN01.0 panel
3) bit of gpu refactoring to prepare for addition of addition gpu
generations beyond just a3xx
* 'msm-next' of git://people.freedesktop.org/~robclark/linux:
drm/msm/adreno: push dump/show stuff to base class
drm/msm/adreno: bit of init refactoring
drm/msm/adreno: move decision about what gpu to to load
drm/msm/adreno: split adreno device out into it's own file
drm/panel/simple: add optronics B101XTN01.0 (v3)
drm/msm/mdp4: add LVDS panel support
drm/msm/mdp4: fix blend setup with multiple crtcs
drm/msm: update generated headers
Dave Airlie [Thu, 11 Sep 2014 09:58:32 +0000 (19:58 +1000)]
Merge branch 'drm-next-3.18' of git://people.freedesktop.org/~agd5f/linux into drm-next
A few more radeon patches for 3.18. This patch set gives us more
flexibility with respect to buffer placement in vram with respect
to CPU access. E.g., if you know you will not need CPU access, we can
now pin outside of the CPU window, reducing contention for the
CPU window space.
* 'drm-next-3.18' of git://people.freedesktop.org/~agd5f/linux:
drm/radeon: add RADEON_GEM_NO_CPU_ACCESS BO creation flag (v4)
drm/radeon: Clean up assignment of TTM placement lpfn member for pinning
drm/radeon: Add RADEON_GEM_CPU_ACCESS BO creation flag
Michel Dänzer [Thu, 28 Aug 2014 06:56:00 +0000 (15:56 +0900)]
drm/radeon: Add RADEON_GEM_CPU_ACCESS BO creation flag
This flag is a hint that userspace expects the BO to be accessed by the
CPU. We can use that hint to prevent such BOs from ever being stored in
the CPU inaccessible part of VRAM.
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rob Clark [Fri, 5 Sep 2014 19:05:38 +0000 (15:05 -0400)]
drm/msm/adreno: push dump/show stuff to base class
Add ptr to list of interesting registers to 'struct adreno_gpu' and use
that to move most of the debugfs show and register dump bits down into
adreno_gpu. This will avoid duplication as support for additional
adreno generations is added.
Rob Clark [Fri, 1 Aug 2014 17:08:11 +0000 (13:08 -0400)]
drm/msm/mdp4: add LVDS panel support
LVDS panel support uses the LCDC (parallel) encoder. Unlike with HDMI,
there is not a separate LVDS block, so no need to split things into a
bridge+connector. Nor is there is anything re-used with mdp5.
Note that there can be some regulators shared between HDMI and LVDS (in
particular, on apq8064, ext_3v3p), so we should not use the _exclusive()
variants of devm_regulator_get().
The drm_panel framework is used for panel-specific driver.
Rob Clark [Wed, 6 Aug 2014 11:43:12 +0000 (07:43 -0400)]
drm/msm/mdp4: fix blend setup with multiple crtcs
In particular, blend_setup() should not overwrite the other crtc's mixer
settings. Also, the encoder needs to be able to specify the mixer-id
explicitly, since both LVDS and DTV use 'INTF_LVDC_DTV', so we cannot
guess the mixer-id from the interface.
David Herrmann [Fri, 29 Aug 2014 10:12:43 +0000 (12:12 +0200)]
drm: add driver->set_busid() callback
One step closer to dropping all the drm_bus_* code:
Add a driver->set_busid() callback and make all drivers use the generic
helpers. Nouveau is the only driver that uses two different bus-types with
the same drm_driver. This is totally broken if both buses are available on
the same machine (unlikely, but lets be safe). Therefore, we create two
different drivers for each platform during module_init() and set the
set_busid() callback respectively.
Signed-off-by: David Herrmann <dh.herrmann@gmail.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
David Herrmann [Fri, 29 Aug 2014 10:12:41 +0000 (12:12 +0200)]
drm: simplify drm_*_set_unique()
Lets use kasprintf() to avoid pre-allocating the buffer. This is really
nothing to optimize for speed and the input is trusted, so kasprintf() is
just fine.
Signed-off-by: David Herrmann <dh.herrmann@gmail.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Dave Airlie <airlied@redhat.com>
David Herrmann [Fri, 29 Aug 2014 10:12:40 +0000 (12:12 +0200)]
drm: move remaining includes in drmP.h to the top
Including headers somewhere else but at the top is ugly, deprecated and
was used in early days only to speed up compile-times. Those days are
over. Make headers independent and then move the inclusions to the top.
Signed-off-by: David Herrmann <dh.herrmann@gmail.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
David Herrmann [Fri, 29 Aug 2014 10:12:38 +0000 (12:12 +0200)]
drm: drop DRM_DEBUG_CODE
DRM_DEBUG_CODE is currently always set, so distributions enable it. The
only reason to keep support in code is if developers wanted to disable
debug support. Sounds unlikely.
All the DRM_DEBUG() printks are still guarded by a drm_debug read. So if
its cacheline is read once, they're discarded pretty fast.. There should
hardly be any performance penalty, it's even guarded by unlikely().
Signed-off-by: David Herrmann <dh.herrmann@gmail.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
David Herrmann [Fri, 29 Aug 2014 10:12:37 +0000 (12:12 +0200)]
drm: order includes alphabetically in drmP.h
It is hardly possible to review the drmP.h includes, anymore. Order them
alphabetically, linux/ first, then asm/ and then local drm/ includes.
Since a long time ago, kernel headers have been converted to include
required headers themselves. No-one cares whether that means the compiler
has to include a header multiple times. In fact, GCC already does some
optimization regarding multiple inclusions if a sorrounding #ifndef is
present.
Signed-off-by: David Herrmann <dh.herrmann@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
David Herrmann [Fri, 29 Aug 2014 10:12:36 +0000 (12:12 +0200)]
drm: move __OS_HAS_AGP into drm_agpsupport.h
With drm_memory.h gone, there is no header left that uses __OS_HAS_AGP.
Move it into drm_agpsupport.h (which is itself included from drmP.h) to
hide it harder from public eyes.
Signed-off-by: David Herrmann <dh.herrmann@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
David Herrmann [Fri, 29 Aug 2014 10:12:35 +0000 (12:12 +0200)]
drm: merge drm_memory.h into drm_memory.c
The drm_memory.h header is only used to define PAGE_AGP, which is only
used in drm_memory.c. Fold the header into drm_memory.c and drop it.
Signed-off-by: David Herrmann <dh.herrmann@gmail.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Dave Airlie <airlied@redhat.com>
David Herrmann [Fri, 29 Aug 2014 10:12:33 +0000 (12:12 +0200)]
drm: replace weird conditional includes
pte_wrprotect() is only used by drm_vm.c, so move the include there. Also
include it unconditionally, all architectures provide this header!
Furthermore, replace asm/current.h with sched.h, which includes
asm/current.h unconditionally. This way we get the same effect and avoid
direct asm/ includes. Furthermore, drop the weird __alpha__ protection.
It's safe to include sched.h everywhere (and the wait.h comment doesn't
apply, anyway).
Signed-off-by: David Herrmann <dh.herrmann@gmail.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
David Herrmann [Fri, 29 Aug 2014 10:12:32 +0000 (12:12 +0200)]
drm: move AGP definitions harder
Move drm_agp_head to drm_agpsupport.h and drm_agp_mem into drm_legacy.h.
Unfortunately, drivers still heavily access drm_agp_head so we cannot
move it to drm_legacy.h. However, at least it's no longer visible in
drmP.h now (it's directly included from it, though).
Signed-off-by: David Herrmann <dh.herrmann@gmail.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
David Herrmann [Fri, 29 Aug 2014 10:12:30 +0000 (12:12 +0200)]
drm: move "struct drm_magic_entry" to drm_auth.c
In drm_release(), we currently call drm_remove_magic() if the drm_file
has a drm-magic attached. Therefore, once drm_master_release() is called,
the magic-list _must_ be empty.
By dropping the no-op cleanup, we can move "struct drm_magic_entry" to
drm_auth.c and avoid exposing it to all of DRM.
Signed-off-by: David Herrmann <dh.herrmann@gmail.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
David Herrmann [Fri, 29 Aug 2014 10:12:29 +0000 (12:12 +0200)]
drm: move "struct drm_vma_entry" to drm_vm.c
Make all the drm_vma_entry handling local to drm_vm.c and hide it from
global headers. This requires to extract the inlined legacy drm_vma_entry
cleanup into a small helper and also move a weirdly placed drm_vma_info
helper into drm_vm.c.
Signed-off-by: David Herrmann <dh.herrmann@gmail.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
The locking of release_lock was stupid; t should have been be called with
fence_lock_irq if it was legitimately used. Unfortunately it never protected
anything except the fence implementation correctly.
Andreas Pokorny [Fri, 8 Aug 2014 08:40:56 +0000 (10:40 +0200)]
drm/qxl: enables gem prime helpers for qxl using dummy driver callbacks
As there should not be any other virtual device that might share buffers,
the callbacks remain empty stubs. Still prime can be used to transfer buffers
between processes that use qxl.
Signed-off-by: Andreas Pokorny <andreas.pokorny@canonical.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Wed, 3 Sep 2014 00:12:24 +0000 (10:12 +1000)]
Merge branch 'for-airlied-next' of git://people.freedesktop.org/~mlankhorst/linux into drm-next
Merge the move to generic fences for TTM using drivers.
* 'for-airlied-next' of git://people.freedesktop.org/~mlankhorst/linux:
drm/nouveau: use shared fences for readable objects
drm/nouveau: Keep only a single list for validation.
drm/ttm: use rcu in core ttm
drm/vmwgfx: use rcu in vmw_user_dmabuf_synccpu_grab
drm/radeon: use rcu waits in some ioctls
drm/nouveau: use rcu in nouveau_gem_ioctl_cpu_prep
drm/ttm: flip the switch, and convert to dma_fence
drm/qxl: rework to new fence interface
drm/nouveau: rework to new fence interface
drm/vmwgfx: rework to new fence interface, v2
drm/vmwgfx: get rid of different types of fence_flags entirely
drm/radeon: use common fence implementation for fences, v4
drm/ttm: kill off some members to ttm_validate_buffer
drm/ttm: add interruptible parameter to ttm_eu_reserve_buffers
drm/ttm: kill fence_lock
drm/ttm: call ttm_bo_wait while inside a reservation
drm/nouveau: require reservations for nouveau_fence_sync and nouveau_bo_fence
drm/nouveau: add reservation to nouveau_gem_ioctl_cpu_prep
Dave Airlie [Tue, 2 Sep 2014 22:30:48 +0000 (08:30 +1000)]
Merge tag 'drm-intel-next-2014-09-01' of git://anongit.freedesktop.org/drm-intel into drm-next
drm-intel-next-2014-08-22:
- basic code for execlist, which is the fancy new cmd submission on gen8. Still
disabled by default (Ben, Oscar Mateo, Thomas Daniel et al)
- remove the useless usage of console_lock for I915_FBDEV=n (Chris)
- clean up relations between ctx and ppgtt
- clean up ppgtt lifetime handling (Michel Thierry)
- various cursor code improvements from Ville
- execbuffer code cleanups and secure batch fixes (Chris)
- prep work for dev -> dev_priv transition (Chris)
- some of the prep patches for the seqno -> request object transition (Chris)
- various small improvements all over
* tag 'drm-intel-next-2014-09-01' of git://anongit.freedesktop.org/drm-intel: (86 commits)
drm/i915: fix suspend/resume for GENs w/o runtime PM support
drm/i915: Update DRIVER_DATE to 20140822
drm: fix plane rotation when restoring fbdev configuration
drm/i915/bdw: Disable execlists by default
drm/i915/bdw: Enable Logical Ring Contexts (hence, Execlists)
drm/i915/bdw: Document Logical Rings, LR contexts and Execlists
drm/i915/bdw: Print context state in debugfs
drm/i915/bdw: Display context backing obj & ringbuffer info in debugfs
drm/i915/bdw: Display execlists info in debugfs
drm/i915/bdw: Disable semaphores for Execlists
drm/i915/bdw: Make sure gpu reset still works with Execlists
drm/i915/bdw: Don't write PDP in the legacy way when using LRCs
drm/i915: Track cursor changes as frontbuffer tracking flushes
drm/i915/bdw: Help out the ctx switch interrupt handler
drm/i915/bdw: Avoid non-lite-restore preemptions
drm/i915/bdw: Handle context switch events
drm/i915/bdw: Two-stage execlist submit process
drm/i915/bdw: Write the tail pointer, LRC style
drm/i915/bdw: Implement context switching (somewhat)
drm/i915/bdw: Emission of requests with logical rings
...
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
---
Changes since v1:
Fix a sleeping function called from invalid context in enable_signaling.
Steve Longerbeam [Thu, 26 Jun 2014 01:05:53 +0000 (18:05 -0700)]
gpu: ipu-v3: Add more planar formats support
Adds support for the following planar and partial-planar formats:
YUV422
NV12
NV16
Signed-off-by: Dmitry Eremin-Solenikov <dmitry_eremin@mentor.com> Signed-off-by: Mohsin Kazmi <mohsin_kazmi@mentor.com> Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Unified base offset and Y plane offset into a single variable,
moved all ipu_cpmem_set_buffer calls to a single location.
Removed NV21 and NV61 for now. The IDMAC doesn't understand U/V
order for chroma interleaved formats, so we'd need to work around
this by implenting U/V switching via the CSC unit.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Steve Longerbeam [Thu, 26 Jun 2014 01:05:44 +0000 (18:05 -0700)]
gpu: ipu-v3: Add ipu_idmac_enable_watermark()
Adds the function ipu_idmac_enable_watermark(), which enables or disables
watermarking in the IDMAC channel. Enabling watermarking can increase a
channel's AXI bus arbitration priority.
Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Adds __ipu_idmac_reset_current_buffer() that resets a channel's
internal current buffer pointer so that transfers start from buffer
0 on the next channel enable.
This operation is required for channel linking to work correctly,
for instance video capture pipelines that carry out image rotations
will fail after the first streaming unless this function is called
for each channel before re-enabling the channels.
Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Steve Longerbeam [Thu, 26 Jun 2014 01:05:40 +0000 (18:05 -0700)]
gpu: ipu-v3: Add ipu_idmac_buffer_is_ready()
Add ipu_idmac_buffer_is_ready(), returns true if the given buffer in
the given channel is set ready (owned by IPU), or false if not ready
(owned by CPU core).
Support has been added for third buffer, there is no support yet for
triple-buffering in idmac channels, but this function checks
buffer-ready for third buffer in case this support is added later.
Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Steve Longerbeam [Thu, 26 Jun 2014 01:05:39 +0000 (18:05 -0700)]
gpu: ipu-v3: Move IDMAC channel names to imx-ipu-v3.h
Move the IDMAC channel names to imx-ipu-v3.h, to make the names
available outside IPU. Add a couple new channels in the process
(async display BG/FG, channels 24 and 29).
Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
- ipu_degrees_to_rot_mode(): converts a degrees, hflip, and vflip setting
to an IPU rotation mode.
- ipu_rot_mode_to_degrees(): converts an IPU rotation mode with given hflip
and vflip settings to degrees.
Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Steve Longerbeam [Thu, 26 Jun 2014 01:05:34 +0000 (18:05 -0700)]
gpu: ipu-v3: smfc: Convert to per-channel
Convert the smfc object to be specific to a single smfc channel.
Add ipu_smfc_{get|put} to retrieve and release a single smfc channel
for exclusive use, and add use counter to ipu_smfc_{enable|disable}.
Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Steve Longerbeam [Mon, 11 Aug 2014 11:04:50 +0000 (13:04 +0200)]
gpu: ipu-v3: Add Image Converter unit
Adds the Image Converter (IC) unit.
Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Condensed the three CSC setup functions into a single one that
uses static tables to set up the CSC task parameters.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Steve Longerbeam [Tue, 19 Aug 2014 17:52:40 +0000 (10:52 -0700)]
gpu: ipu-v3: Add Camera Sensor Interface unit
Adds the Camera Sensor Interface (CSI) unit required for video capture.
Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Removed the unused clk_get_rate in ipu_csi_init_interface and the
ipu_csi_ccir_err_detection_enable/disable functions.
Checkpatch cleanup.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
drm/radeon: use common fence implementation for fences, v4
Changes since v1:
- Kill the sw interrupt dance, add and use
radeon_irq_kms_sw_irq_get_delayed instead.
- Change custom wait function, lockdep complained about it.
Holding exclusive_lock in the wait function might cause deadlocks.
Instead do all the processing in .enable_signaling, and wait
on the global fence_queue to pick up gpu resets.
- Process all fences in radeon_gpu_reset after reset to close a race
with the trylock in enable_signaling.
Changes since v2:
- Small changes to work with the rewritten lockup recovery patches.
Changes since v3:
- Call radeon_fence_schedule_check when exclusive_lock cannot be
acquired to always cause a wake up.
- Reset irqs from hangup check.
- Drop reading seqno in the callback, use cached value.
- Fix indentation in radeon_fence_default_wait
- Add a radeon_test_signaled function, drop a few test_bit calls.
- Make to_radeon_fence global.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com> Reviewed-by: Christian König <christian.koenig@amd.com>
drm/nouveau: add reservation to nouveau_gem_ioctl_cpu_prep
Apart from some code inside ttm itself and nouveau_bo_vma_del,
this is the only place where ttm_bo_wait is used without a reservation.
Fix this so we can remove the fence_lock later on.
After the switch to rcu the reservation lock will be
removed again.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com> Acked-by: Ben Skeggs <bskeggs@redhat.com>
Dave Airlie [Thu, 28 Aug 2014 03:45:45 +0000 (13:45 +1000)]
Merge branch 'drm-next-3.18' of git://people.freedesktop.org/~agd5f/linux into drm-next
Just clearing out my -next queue before I go on vacation. Two UVD
improvements that depend on the ttm change you just merged.
* 'drm-next-3.18' of git://people.freedesktop.org/~agd5f/linux:
drm/radeon: preallocate mem for UVD create/destroy msg
drm/radeon: allow UVD to use a second 256MB segment
Christian König [Fri, 22 Aug 2014 12:25:55 +0000 (14:25 +0200)]
drm/radeon: preallocate mem for UVD create/destroy msg
llocating memory for UVD create and destroy messages can fail, which is
rather annoying when this happens in the middle of a GPU reset. Try to
avoid this condition by preallocating a page for those dummy messages.
Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dave Airlie [Thu, 28 Aug 2014 01:39:11 +0000 (11:39 +1000)]
Merge branch 'drm-next-3.18' of git://people.freedesktop.org/~agd5f/linux into drm-next
More radeon changes for drm-next. Highlights:
- UVD support for older asics
- Reset rework in preparation for Maarten's fence patches
I have a few more patches which depend on Christian's ttm changes,
I'll send them out separately once you've merged the ttm changes.
* 'drm-next-3.18' of git://people.freedesktop.org/~agd5f/linux:
drm/radeon: drop doing resets in a work item
drm/radeon: drop RADEON_FENCE_SIGNALED_SEQ v2
drm/radeon: add timeout argument to radeon_fence_wait_seq v2
drm/radeon: handle lockup in delayed work, v5
drm/radeon: take exclusive_lock in read mode during ring tests, v5
drm/radeon: force fence completion only on problematic rings (v2)
drm/radeon: wake up all fences on manual reset
drm/radeon: add UVD fw names for older asic
drm/radeon: enable RB_ARB before resetting the VCPU
drm/radeon: 760G/780V/880V don't have UVD
drm/radeon: implement UVD hw workarounds for R6xx v3
drm/radeon: add UVD support for older asics v4
drm/radeon: add set_uvd_clocks callback for r6xx v4
drm/radeon: properly init UVD MC bits on R600
drm/radeon: force UVD buffers into VRAM on RS[78]80 v2
drm/radeon: move the IB test after the AGP fallback
Christian König [Wed, 27 Aug 2014 13:22:01 +0000 (15:22 +0200)]
drm/radeon: drop doing resets in a work item
Blocking completely innocent processes with a GPU reset is
a pretty bad idea. Just set needs_reset and let the next
command submission or fence wait do the job.
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Maarten Lankhorst <maarten.lankhorst@canonical.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Wed, 27 Aug 2014 13:22:00 +0000 (15:22 +0200)]
drm/radeon: drop RADEON_FENCE_SIGNALED_SEQ v2
It's causing issues with VMID handling and comparing the
fence value two times actually doesn't make handling faster.
v2: rebased on reset changes
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Maarten Lankhorst <maarten.lankhorst@canonical.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/radeon: add timeout argument to radeon_fence_wait_seq v2
This makes it possible to wait for a specific amount of time,
rather than wait until infinity.
v2 (chk): rebased on other changes
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com> Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Wed, 27 Aug 2014 13:21:58 +0000 (15:21 +0200)]
drm/radeon: handle lockup in delayed work, v5
v5 (chk): complete rework, start when the first fence is emitted,
stop when the last fence is signalled, make it work
correctly with GPU resets, cleanup radeon_fence_wait_seq
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com> Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/radeon: take exclusive_lock in read mode during ring tests, v5
This is needed for the next commit, because the lockup detection
will need the read lock to run.
v4 (chk): split out forced fence completion, remove unrelated changes,
add and handle in_reset flag
v5 (agd5f): rebase fix
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com> Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Wed, 27 Aug 2014 13:21:56 +0000 (15:21 +0200)]
drm/radeon: force fence completion only on problematic rings (v2)
Instead of resetting all fence numbers, only reset the
number of the problematic ring. Split out from a patch
from Maarten Lankhorst <maarten.lankhorst@canonical.com>
v2 (agd5f): rebase build fix
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Maarten Lankhorst <maarten.lankhorst@canonical.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Wed, 27 Aug 2014 13:21:53 +0000 (15:21 +0200)]
drm/radeon: wake up all fences on manual reset
Wake up all fences when we manually trigger a reset.
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Maarten Lankhorst <maarten.lankhorst@canonical.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>