Daniel Lezcano [Thu, 8 May 2014 21:57:30 +0000 (06:57 +0900)]
ARM: EXYNOS: Cleanup all unneeded headers from cpuidle.c
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Daniel Lezcano [Thu, 8 May 2014 21:56:24 +0000 (06:56 +0900)]
ARM: EXYNOS: Move S5P_CHECK_SLEEP into pm.c
This macro is only used there.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Daniel Lezcano [Thu, 8 May 2014 21:53:00 +0000 (06:53 +0900)]
ARM: EXYNOS: Move the AFTR state function into pm.c
In order to remove depedency on pm code, let's move the 'exynos_enter_aftr'
function into the pm.c file as well as the other helper functions.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Daniel Lezcano [Thu, 8 May 2014 21:52:59 +0000 (06:52 +0900)]
ARM: EXYNOS: Encapsulate the AFTR code into a function
Let's encapsulate the AFTR state specific call into a single function.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Daniel Lezcano [Thu, 8 May 2014 21:52:59 +0000 (06:52 +0900)]
ARM: EXYNOS: Disable cpuidle for exynos5440
There is no point to register the cpuidle driver for the 5440 as it has only
one WFI state which is the default idle function when the cpuidle driver is
disabled.
By disabling cpuidle we prevent to enter to the governor computation for
nothing, thus saving a lot of processing time.
The only drawback is the statistic via sysfs on this state which is lost but
it is meaningless and it could be retrieved from the ftrace easily.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Acked-by: Amit Kucheria <amit.kucheria@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Daniel Lezcano [Thu, 8 May 2014 21:52:59 +0000 (06:52 +0900)]
ARM: EXYNOS: Encapsulate boot vector code into a function for cpuidle
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Daniel Lezcano [Thu, 8 May 2014 21:52:59 +0000 (06:52 +0900)]
ARM: EXYNOS: Pass wakeup mask parameter to function for cpuidle
Pass the wakeup mask to 'exynos_set_wakeupmask' as this function could
be used for different idle states with different mask.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Daniel Lezcano [Thu, 8 May 2014 21:43:27 +0000 (06:43 +0900)]
ARM: EXYNOS: Move some code inside the idle_finisher for cpuidle
Move the code around to differentiate different section of code and
prepare it to be factored out in the next patches.
The call order changed but hat doesn't have a side effect because
they are independent. The important call is cpu_do_idle() which must
be done the last.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org> Reviewed-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
ARM: EXYNOS: Move arm core power down clock to exynos5250 common clock
Now with common clock support added for exynos5250 it is necessary to
move this code to exynos5250 common clock driver as clock registers
should be handled there. This change is tested in exynos5250 based
arndale platform.
Cc: Abhilash Kesavan <a.kesavan@samsung.com> Cc: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Kukjin Kim <kgene.kim@samsugn.com> Reviewed-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Signed-off-by: Amit Daniel Kachhap <amit.daniel@samsung.com>
[t.figa: Rebased onto current kernel sources.] Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Alim Akhtar [Mon, 19 May 2014 13:15:08 +0000 (22:15 +0900)]
clk: exynos5420: Add 5800 specific clocks
Exynos5800 clock structure is mostly similar to 5420 with only
a small delta changes. So the 5420 clock file is re-used for
5800 also. The common clocks for both are seggreagated and few
clocks which are different for both are separately initialized.
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Arun Kumar K <arun.kk@samsung.com> Acked-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Chanwoo Choi [Fri, 16 May 2014 22:37:37 +0000 (07:37 +0900)]
dt-bindings: add documentation for Exynos3250 clock controller
The Exynos3250 clocks are statically listed and registered using the
Samsung specific common clock helper functions. Both device tree based
clock lookup and clkdev based clock lookups are supported.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Signed-off-by: Tomasz Figa <t.figa@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Cc: Mike Turquette <mturquette@linaro.org> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: Randy Dunlap <rdunlap@infradead.org> Acked-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Kukjin Kim [Fri, 16 May 2014 22:10:49 +0000 (07:10 +0900)]
Merge branch 'for_3.16/exynos5260' of git://git.kernel.org/pub/scm/linux/kernel/git/tfiga/samsung-clk into v3.16-next/clk-samsung
Pull Samsung clock exynos5260 from Tomasz Figa:
"This pull request contains patches preparing Samsung Common Clock Framework
helpers to support Exynos5260 by adding support for multiple clock providers
and then adding clock driver for Exynos5260."
Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Abhilash Kesavan [Thu, 15 May 2014 19:26:30 +0000 (04:26 +0900)]
ARM: EXYNOS: Add MCPM call-back functions
Add machine-dependent MCPM call-backs for Exynos5420. These are used
to power up/down the secondary CPUs during boot, shutdown, s2r and
switching.
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> Signed-off-by: Inderpal Singh <inderpal.s@samsung.com> Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Reviewed-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Sachin Kamat [Mon, 12 May 2014 22:13:44 +0000 (07:13 +0900)]
ARM: EXYNOS: Map SYSRAM through generic DT bindings
Instead of hardcoding the SYSRAM details for each SoC,
pass this information through device tree (DT) and make
the code SoC agnostic. Generic DT SRAM bindings are
used for achieving this.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Tomasz Figa [Tue, 13 May 2014 13:05:06 +0000 (22:05 +0900)]
clk: samsung: exynos3250: Add clocks using common clock framework
This patch add new the clock drvier of Exynos3250 SoC based on Cortex-A7
using common clock framework. The CMU (Clock Management Unit) of Exynos3250
control PLLs(Phase Locked Loops) and generate system clocks for CPU, buses,
and function clocks for individual IPs.
The CMU of Exynos3250 includes following clock doamins:
- CPU block for Cortex-A7 MPCore processor
- LEFTBUS/RIGHTBUS block
- TOP block for G3D/MFC/LCD0/ISP/CAM/FSYS/MFC/PERIL/PERIR
Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Signed-off-by: Hyunhee Kim <hyunhee.kim@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com> Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Karol Wrona <k.wrona@samsung.com> Signed-off-by: YoungJun Cho <yj44.cho@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Cc: Mike Turquette <mturquette@linaro.org> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org>
Pankaj Dubey [Thu, 8 May 2014 04:07:11 +0000 (13:07 +0900)]
drivers: clk: use COMMON_CLK_SAMSUNG for Samsung clock support
This patch replaces PLAT_SAMSUNG with COMMON_CLK_SAMSUNG for Samsung
common clock support. Any Samsung SoC want to use Samsung common clock
infrastructure can simply select COMMON_CLK_SAMSUNG.
CC: Mike Turquette <mturquette@linaro.org> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com> Signed-off-by: Tomasz Figa <t.figa@samsung.com>
This patch moves S3C24XX specific clock Kconfig options into
"clk/samsung/Kconfig" and also removes COMMON_CLK selection from
"mach-s3c24xx/Kconfig" as S3C24XX_COMMON_CLK is selecting it's dependency.
CC: Ben Dooks <ben-linux@fluff.org> CC: Kukjin Kim <kgene.kim@samsung.com> CC: Russell King <linux@arm.linux.org.uk> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com> Signed-off-by: Tomasz Figa <t.figa@samsung.com>
clk: samsung: exynos5420: update clocks for PERIC block
This patch includes,
1] renaming of the HSI2C clocks
2] renaming of spi clocks according to the datasheet
3] fixes for child-parent relationships
4] adding of more clocks related to PERIC block
5] use GATE_IP_* offsets instead of GATE_BUS_*
This patch renames the mux parent arrays as per the naming
convension followed by the other exynos specific clock drivers.
And it also renames "mout_cpu_kfc" clock to "mout_kfc".
This patch adds the required clocks for ARM Mali IP
in Exynos5250.
Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
[t.figa: Changed clock ID to avoid conflict with CLK_SSS] Signed-off-by: Tomasz Figa <t.figa@samsung.com>
clk: samsung: exynos4: Use single clock ID for CLK_MDMA gate clocks
Exynos4210 and Exynos4x12 SoCs have the PL330 MDMA IP block clock
defined exactly in same way in documentation. Using different
names for these clocks is a bit misleading. Since there is no users
of CLK_MDMA2 in existing dts files this patch drops CLK_MDMA2 and
replaces it with CLK_MDMA in the driver. This ensures PL330 MDMA
has correct clock assigned on Exynos4x12 SoCs.
Suggested-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Tomasz Figa <t.figa@samsung.com>
clk: samsung: exynos5250/5420: Add gate clock for SSS module
This patch adds gating clock for SSS(Security SubSystem)
module on Exynos5250/5420.
Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
[t.figa: Fixed sort order and group name.] Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Tomasz Figa [Thu, 6 Feb 2014 18:33:11 +0000 (19:33 +0100)]
clk: samsung: Initialize clock table with error pointers
Before this patch, the driver was simply zeroing the clock table, which
is incorrect, because invalid clock numbers returned NULL instead of
error pointers. This patch fixes this by changing the driver to
initialize the array with PTR_ERR(-ENOENT).
Signed-off-by: Tomasz Figa <t.figa@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Rahul Sharma [Wed, 12 Mar 2014 14:56:44 +0000 (20:26 +0530)]
clk/samsung: add support for multiple clock providers
Samsung CCF helper functions do not provide support to
register multiple Clock Providers for a given SoC. Due to
this limitation, SoC platforms are not able to use these
helpers for registering multiple clock providers and are
forced to bypass this layer.
This layer is modified accordingly to enable the support
for multiple clock providers.
Clock file for exynos4, exynos5250, exynos5420, exynos5440,
S3c64xx, S3c24xx are also modified as per changed helper functions.
Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
[t.figa: Modified s3c2410 clock driver as well] Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Heiko Stuebner [Thu, 8 May 2014 20:49:19 +0000 (05:49 +0900)]
ARM: S3C24XX: convert s3c2440 and s3c2442 to common clock framework
Convert all machines using these cpus to use the ccf clock driver
instead of the legacy Samsung clock implementation.
Some of the more esotheric machines will probably need a fixup, as they
do strange things to the clkout outputs, that I did not really understand
nor have the hardware to check.
Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Heiko Stuebner [Thu, 8 May 2014 20:49:14 +0000 (05:49 +0900)]
ARM: S3C24XX: add platform code for conversion to the common clock framework
This adds the necessary init functions to init the clocks from the common
clock framework and necessary CONFIG_SAMSUNG_CLOCK ifdefs around the legacy
clock code.
This also includes empty stubs for the *_setup_clocks functions that are
called from the cpufreq driver on resume.
Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Heiko Stuebner [Thu, 8 May 2014 20:49:10 +0000 (05:49 +0900)]
clk: samsung: add clock controller driver for s3c2410, s3c2440 and s3c2442
This driver can handle the clock controllers of the socs mentioned above,
as they share a common clock tree with only small differences.
The clock structure is built according to the manuals of the included
SoCs and might include changes in comparison to the previous clock
structure.
As pll-rate-tables only the 12mhz variants are currently included.
The original code was wrongly checking for 169mhz xti values [a 0 to much
at the end], so the original 16mhz pll table would have never been
included and its values are so obscure that I have no possibility to
at least check their sane-ness. When using the formula from the manual
the resulting frequency is near the table value but still slightly off.
Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Heiko Stuebner [Thu, 8 May 2014 20:48:57 +0000 (05:48 +0900)]
ARM: S3C24XX: enable usage of common dclk if common clock framework is enabled
Add platform device and select the correct implementation automatically
depending on wether the old samsung_clock or the common clock framework
is enabled.
This is only done for machines already using the old dclk implementation,
as everybody else should move to use dt anyway.
The machine-specific settings for the external clocks will have to be set
by somebody with knowledge about the specific hardware.
Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Tomasz Figa <t.figa@samsung.com>
[pebolle@tiscali.nl: pointed out typo and fixed] Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Arun Kumar K [Thu, 8 May 2014 21:06:25 +0000 (06:06 +0900)]
ARM: dts: Add exynos5420 peach-pit board support
Adds the google peach-pit board dts file which uses
exynos5420 SoC.
Signed-off-by: Arun Kumar K <arun.kk@samsung.com> Signed-off-by: Doug Anderson <dianders@chromium.org> Reviewed-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Arun Kumar K [Thu, 8 May 2014 21:06:24 +0000 (06:06 +0900)]
ARM: dts: Add node labels to exynos5420
Adding labels to nodes which do not have it yet in exynos5420.
This is done so as to use reference based node updation in board
files.
Signed-off-by: Arun Kumar K <arun.kk@samsung.com> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Reviewed-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Arun Kumar K [Thu, 8 May 2014 21:06:10 +0000 (06:06 +0900)]
ARM: dts: Add pwmX_out pinctrl nodes to exynos5420
Adds the PWM nodes to 5420 pinctrl dtsi file.
Signed-off-by: Arun Kumar K <arun.kk@samsung.com> Reviewed-by: Doug Anderson <dianders@chromium.org> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
ARM: dts: Add rear camera nodes for exynos4412-trats2
This patch enables the rear facing camera (s5c73m3) on TRATS2 board
by adding the I2C0 bus controller, s5c73m3 sensor, MIPI CSI-2 receiver
and the sensor's voltage regulator supply nodes.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
ARM: dts: Update camera nodes for exynos4 and exynos4412-trats2
Remove unused /camera/clock-controller node and add required clock
properties to the camera node. This is required for a clock provider
that will be referenced by image sensor devices.
Also add required clock related changes to s5k6a3 device node and
afvdd regulator supply.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
ARM: dts: rename alias for i2c_ak8975 label for exynos4412-trats2
The i2c_ak8975 controller uses label i2c8.
This alias is already used for I2C controller 8 defined
in file arch/arm/boot/dts/exynos4.dtsi.
This patch renames a label for i2c_ak8975 to i2c9.
Signed-off-by: Tomasz Stanislawski <t.stanislaws@samsung.com> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch adds missing pinctrls for I2C controllers 2-7.
Signed-off-by: Tomasz Stanislawski <t.stanislaws@samsung.com> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Heiko Stuebner [Thu, 8 May 2014 20:48:51 +0000 (05:48 +0900)]
clk: samsung: add clock driver for external clock outputs
This adds a driver for controlling the external clock outputs of
s3c24xx architectures including the dclk muxes and dividers.
The driver at the moment only supports the legacy non-dt boards using these
clock outputs. The clock-output control itself is part of the system-controller
mainly controlled by the pinctrl drivers. So it should most likely be
integrated there for dt platforms.
Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Heiko Stuebner [Thu, 8 May 2014 20:48:44 +0000 (05:48 +0900)]
ARM: S3C24XX: cpufreq-utils: don't write raw values to MPLLCON when using ccf
The s3c24xx cpufreq driver needs to change the mpll speed and was doing
this by writing raw values from a translation table into the MPLLCON
register.
Change this to use a regular clk_set_rate call when using the common
clock framework and only write the raw value in the samsung_clock case.
The s3c cpufreq driver does already aquire the mpll, so simply add a reference
to struct s3c_cpufreq_config to let set_fvco access it.
While struct clk is opaque the differenciation between samsung clock and
common clock is kept, as the samsung-clock mpll clk does not implement a
real set_rate.
Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Heiko Stuebner [Tue, 25 Feb 2014 00:50:43 +0000 (09:50 +0900)]
ARM: S3C24XX: only store clock registers when old clock code is active
The Samsung ccf driver already handles the save and restore of the clock
registers on suspend and resume. The architecture code should not
duplicate this when the ccf is active.
Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Heiko Stuebner [Wed, 19 Feb 2014 00:25:54 +0000 (09:25 +0900)]
ARM: S3C24XX: prevent conflicts between ccf and non-ccf s3c24xx-socs
As the conversion to the common-clock-framework is done in multiple
steps, it is necessary to prevent conflicts between the different
struct clk implementations.
For this include the s3c24xx_setup_clocks function only when
SAMSUNG_CLOCK is selected and make the socs we don't convert this
time explicitly depend on SAMSUNG_CLOCK, which gets only selected
automatically if COMMON_CLK is not enabled.
Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Heiko Stuebner [Wed, 19 Feb 2014 00:25:49 +0000 (09:25 +0900)]
clk: samsung: add clock-driver for s3c2416, s3c2443 and s3c2450
The three SoCs share a common clock tree which only differs in the
existence of some special clocks.
As with all parts common to these three SoCs the driver is named
after the s3c2443, as it was the first SoC introducing this structure
and there exists no other label to describe this s3c24xx epoch.
The clock structure is built according to the manuals of the included
SoCs and might include changes in comparison to the previous clock
structure. As an example the sclk_uart gate was never handled previously
and the div_uart was made to be the clock used by the serial driver.
Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Heiko Stuebner [Wed, 19 Feb 2014 00:25:45 +0000 (09:25 +0900)]
dt-bindings: add binding for clock-controller of s3c2443 and following
Starting with the s3c2443 the s3c24xx series got a new clock tree
compared to the previous s3c24xx socs. This binding describes the
clock controller found in the s3c2443, s3c2416 and s3c2450 socs.
Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Heiko Stuebner [Wed, 19 Feb 2014 00:25:36 +0000 (09:25 +0900)]
clk: samsung: add pll_6552 variant for s3c2416
According to the manual s3c2416 and s3c2450 use a pll 6552 and 6553
and while the pll_6553 matches exactly the one already implemented
the pll_6552 differs to the one from the s3c64xx series.
The change is solely in the bit locations of the mdiv and pdiv values.
All calculations are the same for both implementatons and even the
proposed divider-values for specific frequencies in the manuals are
the same.
Therefore implement a variant that simply uses the changed bit
locations if necessary.
Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Tomasz Figa <t.figa@samsung.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
projects / linux-beck.git / log