]> git.karo-electronics.de Git - karo-tx-linux.git/commit
irqchip: gic: use dmb ishst instead of dsb when raising a softirq
authorWill Deacon <will.deacon@arm.com>
Thu, 20 Feb 2014 17:42:07 +0000 (17:42 +0000)
committerArnd Bergmann <arnd@arndb.de>
Tue, 25 Feb 2014 18:36:03 +0000 (19:36 +0100)
commit8adbf57fc4294588e9785069215d445a98e6c23a
treebeb95f1d6e8d29a87a593bf25030404b9d17671b
parent38dbfb59d1175ef458d006556061adeaa8751b72
irqchip: gic: use dmb ishst instead of dsb when raising a softirq

When sending an SGI to another CPU, we require a barrier to ensure that
any pending stores to normal memory are made visible to the recipient
before the interrupt arrives.

Rather than use a vanilla dsb() (which will soon cause an assembly error
on arm64) before the writel_relaxed, we can instead use dsb(ishst),
since we just need to ensure that any pending normal writes are visible
within the inner-shareable domain before we poke the GIC.

With this observation, we can then further weaken the barrier to a
dmb(ishst), since other CPUs in the inner-shareable domain must observe
the write to the distributor before the SGI is generated.

Cc: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
drivers/irqchip/irq-gic.c