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cxgb4/cxgb4vf: Add code to calculate T5 BAR2 Offsets for SGE Queue Registers
authorHariprasad Shenai <hariprasad@chelsio.com>
Wed, 3 Dec 2014 14:02:52 +0000 (19:32 +0530)
committerDavid S. Miller <davem@davemloft.net>
Tue, 9 Dec 2014 18:32:00 +0000 (13:32 -0500)
commite85c9a7abfa407ed99f8516cf6a10d397247315a
treea27ce166a69cebc36034f598cec38a1d69f71366tree | snapshot
parente0a8b34a9cc486f52d95ed60a45768f1befb33f8commit | diff
cxgb4/cxgb4vf: Add code to calculate T5 BAR2 Offsets for SGE Queue Registers

Add new Common Code facilities for calculating T5 BAR2 Offsets for SGE Queue
Registers. This new code can handle situations where

    Queues Per Page * SGE BAR2 Queue Register Area Size > Page Size

Based on original work by Casey Leedom <leedom@chelsio.com>

Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/chelsio/cxgb4/cxgb4.h diff | blob | history
drivers/net/ethernet/chelsio/cxgb4/t4_hw.c diff | blob | history
drivers/net/ethernet/chelsio/cxgb4/t4_regs.h diff | blob | history
drivers/net/ethernet/chelsio/cxgb4vf/t4vf_common.h diff | blob | history
drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c diff | blob | history
Beck SC1x5 Kernel